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--- a/drivers/serial/8250.c
+++ b/drivers/serial/8250.c
@@ -298,9 +298,9 @@ static const struct serial8250_config ua
},
};
-#if defined (CONFIG_SERIAL_8250_AU1X00)
+#if defined (CONFIG_SERIAL_8250_AU1X00) || defined (CONFIG_SERIAL_8250_RT288X)
-/* Au1x00 UART hardware has a weird register layout */
+/* Au1x00 and RT288x UART hardware has a weird register layout */
static const u8 au_io_in_map[] = {
[UART_RX] = 0,
[UART_IER] = 2,
@@ -418,7 +418,7 @@ static unsigned int mem32_serial_in(stru
return readl(p->membase + offset);
}
-#ifdef CONFIG_SERIAL_8250_AU1X00
+#if defined(CONFIG_SERIAL_8250_AU1X00) || defined(CONFIG_SERIAL_8250_RT288X)
static unsigned int au_serial_in(struct uart_port *p, int offset)
{
offset = map_8250_in_reg(p, offset) << p->regshift;
@@ -499,7 +499,7 @@ static void set_io_from_upio(struct uart
p->serial_out = mem32_serial_out;
break;
-#ifdef CONFIG_SERIAL_8250_AU1X00
+#if defined (CONFIG_SERIAL_8250_AU1X00) || defined (CONFIG_SERIAL_8250_RT288X)
case UPIO_AU:
p->serial_in = au_serial_in;
p->serial_out = au_serial_out;
@@ -531,7 +531,7 @@ serial_out_sync(struct uart_8250_port *u
switch (p->iotype) {
case UPIO_MEM:
case UPIO_MEM32:
-#ifdef CONFIG_SERIAL_8250_AU1X00
+#if defined (CONFIG_SERIAL_8250_AU1X00) || defined (CONFIG_SERIAL_8250_RT288X)
case UPIO_AU:
#endif
case UPIO_DWAPB:
@@ -569,8 +569,8 @@ static inline void _serial_dl_write(stru
serial_outp(up, UART_DLM, value >> 8 & 0xff);
}
-#if defined(CONFIG_SERIAL_8250_AU1X00)
-/* Au1x00 haven't got a standard divisor latch */
+#if defined (CONFIG_SERIAL_8250_AU1X00) || defined (CONFIG_SERIAL_8250_RT288X)
+/* Au1x00 and RT288x haven't got a standard divisor latch */
static int serial_dl_read(struct uart_8250_port *up)
{
if (up->port.iotype == UPIO_AU)
@@ -777,22 +777,19 @@ static int size_fifo(struct uart_8250_po
*/
static unsigned int autoconfig_read_divisor_id(struct uart_8250_port *p)
{
- unsigned char old_dll, old_dlm, old_lcr;
+ unsigned char old_lcr;
+ unsigned int old_dl;
unsigned int id;
old_lcr = serial_inp(p, UART_LCR);
serial_outp(p, UART_LCR, UART_LCR_DLAB);
- old_dll = serial_inp(p, UART_DLL);
- old_dlm = serial_inp(p, UART_DLM);
+ old_dl = serial_dl_read(p);
- serial_outp(p, UART_DLL, 0);
- serial_outp(p, UART_DLM, 0);
+ serial_dl_write(p, 0);
+ id = serial_dl_read(p);
- id = serial_inp(p, UART_DLL) | serial_inp(p, UART_DLM) << 8;
-
- serial_outp(p, UART_DLL, old_dll);
- serial_outp(p, UART_DLM, old_dlm);
+ serial_dl_write(p, old_dl);
serial_outp(p, UART_LCR, old_lcr);
return id;
@@ -1214,7 +1211,7 @@ static void autoconfig(struct uart_8250_
}
#endif
-#ifdef CONFIG_SERIAL_8250_AU1X00
+#if defined (CONFIG_SERIAL_8250_AU1X00) || defined (CONFIG_SERIAL_8250_RT288X)
/* if access method is AU, it is a 16550 with a quirk */
if (up->port.type == PORT_16550A && up->port.iotype == UPIO_AU)
up->bugs |= UART_BUG_NOMSR;
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -266,6 +266,14 @@ config SERIAL_8250_AU1X00
say Y to this option. The driver can handle up to 4 serial ports,
depending on the SOC. If unsure, say N.
+config SERIAL_8250_RT288X
+ bool "Ralink RT288x/RT305x serial port support"
+ depends on SERIAL_8250 != n && (SOC_RT288X || SOC_RT305X)
+ help
+ If you have a Ralink RT288x/RT305x SoC based board and want to use the
+ serial port, say Y to this option. The driver can handle up to 2 serial
+ ports. If unsure, say N.
+
config SERIAL_8250_RM9K
bool "Support for MIPS RM9xxx integrated serial port"
depends on SERIAL_8250 != n && SERIAL_RM9000
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -281,7 +281,7 @@ struct uart_port {
#define UPIO_HUB6 (1)
#define UPIO_MEM (2)
#define UPIO_MEM32 (3)
-#define UPIO_AU (4) /* Au1x00 type IO */
+#define UPIO_AU (4) /* Au1x00 and RT288x type IO */
#define UPIO_TSI (5) /* Tsi108/109 type IO */
#define UPIO_DWAPB (6) /* DesignWare APB UART */
#define UPIO_RM9000 (7) /* RM9000 type IO */
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