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From a9f65413f9ea81ef2208da66a3db9cb8a9020eef Mon Sep 17 00:00:00 2001
From: Maxime Bizon <mbizon@freebox.fr>
Date: Fri, 18 Jul 2008 15:53:08 +0200
Subject: [PATCH] [MIPS] BCM63XX: Add Broadcom 63xx CPU definitions.
Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
---
arch/mips/kernel/cpu-probe.c | 25 +++++++++++++++++++++++++
arch/mips/mm/tlbex.c | 4 ++++
include/asm-mips/cpu.h | 7 +++++++
3 files changed, 36 insertions(+), 0 deletions(-)
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -153,6 +153,10 @@ void __init check_wait(void)
case CPU_25KF:
case CPU_PR4450:
case CPU_BCM3302:
+ case CPU_BCM6338:
+ case CPU_BCM6348:
+ case CPU_BCM6358:
cpu_wait = r4k_wait;
break;
@@ -802,11 +806,28 @@ static inline void cpu_probe_broadcom(st
decode_configs(c);
switch (c->processor_id & 0xff00) {
case PRID_IMP_BCM3302:
+ /* same as PRID_IMP_BCM6338 */
c->cputype = CPU_BCM3302;
break;
case PRID_IMP_BCM4710:
c->cputype = CPU_BCM4710;
break;
+ case PRID_IMP_BCM6345:
+ c->cputype = CPU_BCM6345;
+ break;
+ case PRID_IMP_BCM6348:
+ c->cputype = CPU_BCM6348;
+ break;
+ case PRID_IMP_BCM4350:
+ switch (c->processor_id & 0xf0) {
+ case PRID_REV_BCM6358:
+ c->cputype = CPU_BCM6358;
+ break;
+ default:
+ c->cputype = CPU_UNKNOWN;
+ break;
+ }
+ break;
default:
c->cputype = CPU_UNKNOWN;
break;
@@ -892,6 +913,10 @@ static __cpuinit const char *cpu_to_name
case CPU_SR71000: name = "Sandcraft SR71000"; break;
case CPU_BCM3302: name = "Broadcom BCM3302"; break;
case CPU_BCM4710: name = "Broadcom BCM4710"; break;
+ case CPU_BCM6338: name = "Broadcom BCM6338"; break;
+ case CPU_BCM6345: name = "Broadcom BCM6345"; break;
+ case CPU_BCM6348: name = "Broadcom BCM6348"; break;
+ case CPU_BCM6358: name = "Broadcom BCM6358"; break;
case CPU_PR4450: name = "Philips PR4450"; break;
case CPU_LOONGSON2: name = "ICT Loongson-2"; break;
default:
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -317,6 +317,10 @@ static void __cpuinit build_tlb_write_en
case CPU_BCM3302:
case CPU_BCM4710:
case CPU_LOONGSON2:
+ case CPU_BCM6338:
+ case CPU_BCM6345:
+ case CPU_BCM6348:
+ case CPU_BCM6358:
if (m4kc_tlbp_war())
uasm_i_nop(p);
tlbw(p);
--- a/include/asm-mips/cpu.h
+++ b/include/asm-mips/cpu.h
@@ -112,6 +112,12 @@
#define PRID_IMP_BCM4710 0x4000
#define PRID_IMP_BCM3302 0x9000
+#define PRID_IMP_BCM6338 0x9000
+#define PRID_IMP_BCM6345 0x8000
+#define PRID_IMP_BCM6348 0x9100
+#define PRID_IMP_BCM4350 0xA000
+#define PRID_REV_BCM6358 0x0010
+#define PRID_REV_BCM6368 0x0030
/*
* Definitions for 7:0 on legacy processors
@@ -198,6 +204,7 @@ enum cpu_type_enum {
CPU_4KC, CPU_4KEC, CPU_4KSC, CPU_24K, CPU_34K, CPU_1004K, CPU_74K,
CPU_AU1000, CPU_AU1100, CPU_AU1200, CPU_AU1210, CPU_AU1250, CPU_AU1500,
CPU_AU1550, CPU_PR4450, CPU_BCM3302, CPU_BCM4710,
+ CPU_BCM6338, CPU_BCM6345, CPU_BCM6348, CPU_BCM6358,
/*
* MIPS64 class processors
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