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path: root/target/linux/mpc83xx/patches-3.7/111-etsec27_war.patch
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Diffstat (limited to 'target/linux/mpc83xx/patches-3.7/111-etsec27_war.patch')
-rw-r--r--target/linux/mpc83xx/patches-3.7/111-etsec27_war.patch20
1 files changed, 20 insertions, 0 deletions
diff --git a/target/linux/mpc83xx/patches-3.7/111-etsec27_war.patch b/target/linux/mpc83xx/patches-3.7/111-etsec27_war.patch
new file mode 100644
index 0000000000..0fbae2b84b
--- /dev/null
+++ b/target/linux/mpc83xx/patches-3.7/111-etsec27_war.patch
@@ -0,0 +1,20 @@
+--- a/drivers/net/ethernet/freescale/gianfar.c
++++ b/drivers/net/ethernet/freescale/gianfar.c
+@@ -1009,7 +1009,16 @@ static int gfar_probe(struct platform_de
+ /* We need to delay at least 3 TX clocks */
+ udelay(2);
+
+- tempval = (MACCFG1_TX_FLOW | MACCFG1_RX_FLOW);
++ if ((mfspr(SPRN_SVR) & 0xffff) >= 0x0011) {
++ tempval = (MACCFG1_TX_FLOW | MACCFG1_RX_FLOW);
++ } else {
++ /*
++ * Do not enable flow control on chips earlier than rev 1.1,
++ * because of the eTSEC27 erratum
++ */
++ tempval = 0;
++ }
++
+ gfar_write(&regs->maccfg1, tempval);
+
+ /* Initialize MACCFG2. */