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authornbd <nbd@3c298f89-4303-0410-b956-a3cf2f4a3e73>2014-02-19 19:20:10 +0000
committernbd <nbd@3c298f89-4303-0410-b956-a3cf2f4a3e73>2014-02-19 19:20:10 +0000
commitec9ce90c2a9a936fd60ccccb1a0ee78bdd159ab4 (patch)
treee4a32fad556b3957e5f2f9175dc5d5950382bd62 /toolchain/gcc/patches/4.6-linaro/800-arm_v5te_no_ldrd_strd.patch
parent5b8f91c57d8a29027f6125541289ddb1003fe6e4 (diff)
gcc: prevent the use of LDRD/STRD on ARMv5TE
These instructions are for 64-bit load/store. On ARMv5TE, the CPU requires addresses to be aligned to 64-bit. When misaligned, behavior is undefined (effectively either loads the same word twice on LDRD, or corrupts surrounding memory on STRD). On ARMv6 and newer, unaligned access is safe. Removing these instructions for ARMv5TE is necessary, because GCC ignores alignment information in pointers and does unsafe optimizations that have shown up as bugs in various places. Signed-off-by: Felix Fietkau <nbd@openwrt.org> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@39638 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'toolchain/gcc/patches/4.6-linaro/800-arm_v5te_no_ldrd_strd.patch')
-rw-r--r--toolchain/gcc/patches/4.6-linaro/800-arm_v5te_no_ldrd_strd.patch11
1 files changed, 11 insertions, 0 deletions
diff --git a/toolchain/gcc/patches/4.6-linaro/800-arm_v5te_no_ldrd_strd.patch b/toolchain/gcc/patches/4.6-linaro/800-arm_v5te_no_ldrd_strd.patch
new file mode 100644
index 0000000000..4b7770d5d9
--- /dev/null
+++ b/toolchain/gcc/patches/4.6-linaro/800-arm_v5te_no_ldrd_strd.patch
@@ -0,0 +1,11 @@
+--- a/gcc/config/arm/arm.h
++++ b/gcc/config/arm/arm.h
+@@ -232,7 +232,7 @@ extern void (*arm_lang_output_object_att
+ #define TARGET_BACKTRACE (leaf_function_p () \
+ ? TARGET_TPCS_LEAF_FRAME \
+ : TARGET_TPCS_FRAME)
+-#define TARGET_LDRD (arm_arch5e && ARM_DOUBLEWORD_ALIGN)
++#define TARGET_LDRD (arm_arch6 && ARM_DOUBLEWORD_ALIGN)
+ #define TARGET_AAPCS_BASED \
+ (arm_abi != ARM_ABI_APCS && arm_abi != ARM_ABI_ATPCS)
+