diff options
| author | florian <florian@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2010-08-01 12:41:16 +0000 |
|---|---|---|
| committer | florian <florian@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2010-08-01 12:41:16 +0000 |
| commit | b0a16a20fefab7ff137254f9746d7c7ed1460902 (patch) | |
| tree | 46be53d921b3fd15c930fb1ba4cec6f5ee45524f /target/linux/octeon/patches-2.6.34/003-sched_clock_no_gcc44x_inline.patch | |
| parent | 23b5e584a92845efb584d4e9f91390d872924a2f (diff) | |
[octeon] add 2.6.34 support
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@22452 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/octeon/patches-2.6.34/003-sched_clock_no_gcc44x_inline.patch')
| -rw-r--r-- | target/linux/octeon/patches-2.6.34/003-sched_clock_no_gcc44x_inline.patch | 40 |
1 files changed, 40 insertions, 0 deletions
diff --git a/target/linux/octeon/patches-2.6.34/003-sched_clock_no_gcc44x_inline.patch b/target/linux/octeon/patches-2.6.34/003-sched_clock_no_gcc44x_inline.patch new file mode 100644 index 0000000000..2920de260e --- /dev/null +++ b/target/linux/octeon/patches-2.6.34/003-sched_clock_no_gcc44x_inline.patch @@ -0,0 +1,40 @@ +When building with a toolchain that is configured to produce 32-bits executable +by default, we will produce __lshrti3 in sched_clock() which is never resolved +so the kernel fails to link. Unconditionally use the inline assemble version +as suggested by David Daney, which works around the issue. + +CC: David Daney <ddaney@caviumnetworks.com> +Signed-off-by: Florian Fainelli <florian@openwrt.org> +--- + arch/mips/cavium-octeon/csrc-octeon.c | 8 -------- + 1 files changed, 0 insertions(+), 8 deletions(-) + +diff --git a/arch/mips/cavium-octeon/csrc-octeon.c b/arch/mips/cavium-octeon/csrc-octeon.c +index 0bf4bbe..36400d2 100644 +--- a/arch/mips/cavium-octeon/csrc-octeon.c ++++ b/arch/mips/cavium-octeon/csrc-octeon.c +@@ -53,7 +53,6 @@ static struct clocksource clocksource_mips = { + unsigned long long notrace sched_clock(void) + { + /* 64-bit arithmatic can overflow, so use 128-bit. */ +-#if (__GNUC__ < 4) || ((__GNUC__ == 4) && (__GNUC_MINOR__ <= 3)) + u64 t1, t2, t3; + unsigned long long rv; + u64 mult = clocksource_mips.mult; +@@ -73,13 +72,6 @@ unsigned long long notrace sched_clock(void) + : [cnt] "r" (cnt), [mult] "r" (mult), [shift] "r" (shift) + : "hi", "lo"); + return rv; +-#else +- /* GCC > 4.3 do it the easy way. */ +- unsigned int __attribute__((mode(TI))) t; +- t = read_c0_cvmcount(); +- t = t * clocksource_mips.mult; +- return (unsigned long long)(t >> clocksource_mips.shift); +-#endif + } + + void __init plat_time_init(void) +-- +1.7.1 + |