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authorjuhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73>2013-02-21 20:39:22 +0000
committerjuhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73>2013-02-21 20:39:22 +0000
commit6f8f9a35d5414ee8080ef40821d8b22aaf5262e2 (patch)
tree7a6fe0df776b7af66908fac4bd1953c78cdd6208 /target/linux/mpc83xx/patches-3.8/111-etsec27_war.patch
parent0eb050dd6c947aaa51769a9c256608f4472d9f1c (diff)
mpc83xx: add support for 3.8
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@35736 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/mpc83xx/patches-3.8/111-etsec27_war.patch')
-rw-r--r--target/linux/mpc83xx/patches-3.8/111-etsec27_war.patch20
1 files changed, 20 insertions, 0 deletions
diff --git a/target/linux/mpc83xx/patches-3.8/111-etsec27_war.patch b/target/linux/mpc83xx/patches-3.8/111-etsec27_war.patch
new file mode 100644
index 0000000000..44686ab515
--- /dev/null
+++ b/target/linux/mpc83xx/patches-3.8/111-etsec27_war.patch
@@ -0,0 +1,20 @@
+--- a/drivers/net/ethernet/freescale/gianfar.c
++++ b/drivers/net/ethernet/freescale/gianfar.c
+@@ -1005,7 +1005,16 @@ static int gfar_probe(struct platform_de
+ /* We need to delay at least 3 TX clocks */
+ udelay(2);
+
+- tempval = (MACCFG1_TX_FLOW | MACCFG1_RX_FLOW);
++ if ((mfspr(SPRN_SVR) & 0xffff) >= 0x0011) {
++ tempval = (MACCFG1_TX_FLOW | MACCFG1_RX_FLOW);
++ } else {
++ /*
++ * Do not enable flow control on chips earlier than rev 1.1,
++ * because of the eTSEC27 erratum
++ */
++ tempval = 0;
++ }
++
+ gfar_write(&regs->maccfg1, tempval);
+
+ /* Initialize MACCFG2. */