diff options
| author | blogic <blogic@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2011-07-06 17:27:17 +0000 |
|---|---|---|
| committer | blogic <blogic@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2011-07-06 17:27:17 +0000 |
| commit | a408b75fbaff555cef9536924a1864a69cea8ed9 (patch) | |
| tree | acca62cbd1cedc68c360a8af26d56b7207e82b6e /target/linux/lantiq/patches-3.0/400-spi1.patch | |
| parent | 90433b3461130f8a4913b3530938e5c552f6b23f (diff) | |
[lantiq] get ready for 3.0
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@27496 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/lantiq/patches-3.0/400-spi1.patch')
| -rw-r--r-- | target/linux/lantiq/patches-3.0/400-spi1.patch | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/target/linux/lantiq/patches-3.0/400-spi1.patch b/target/linux/lantiq/patches-3.0/400-spi1.patch new file mode 100644 index 0000000000..c3c9330219 --- /dev/null +++ b/target/linux/lantiq/patches-3.0/400-spi1.patch @@ -0,0 +1,36 @@ +From: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> +Date: Thu, 3 Mar 2011 17:15:58 +0000 (+0100) +Subject: MIPS: lantiq: Add platform data for Lantiq SoC SPI controller driver +X-Git-Url: http://nbd.name/gitweb.cgi?p=lantiq.git;a=commitdiff_plain;h=3d21b04682ae8eb1c1965aba39d1796e8c5ad84b;hp=06b420500fe98e37662837e78d8e51aead8aea81 + +MIPS: lantiq: Add platform data for Lantiq SoC SPI controller driver + +Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> +--- + +--- a/arch/mips/include/asm/mach-lantiq/lantiq_platform.h ++++ b/arch/mips/include/asm/mach-lantiq/lantiq_platform.h +@@ -50,4 +50,13 @@ struct ltq_eth_data { + int mii_mode; + }; + ++ ++struct ltq_spi_platform_data { ++ u16 num_chipselect; ++}; ++ ++struct ltq_spi_controller_data { ++ unsigned gpio; ++}; ++ + #endif +--- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h ++++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h +@@ -75,6 +75,7 @@ + + #define PMU_DMA 0x0020 + #define PMU_USB 0x8041 ++#define PMU_SPI 0x0100 + #define PMU_LED 0x0800 + #define PMU_GPT 0x1000 + #define PMU_PPE 0x2000 |