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| author | juhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2011-04-07 20:52:53 +0000 |
|---|---|---|
| committer | juhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2011-04-07 20:52:53 +0000 |
| commit | 2c08ed8f8b96b2e903002d0c717a4b83f9973a09 (patch) | |
| tree | c8072fc57c42388c6a193a266eda95855beffaf8 /target/linux/lantiq/image | |
| parent | c5000fc993567f7898b25d22c2944c6152b7d152 (diff) | |
ar71xx: add AR934x specific UART clock initialization
Signed-off-by: Jaiganesh Narayanan <jnarayanan@atheros.com>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@26511 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/lantiq/image')
0 files changed, 0 insertions, 0 deletions