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authorjogo <jogo@3c298f89-4303-0410-b956-a3cf2f4a3e73>2012-05-27 13:22:33 +0000
committerjogo <jogo@3c298f89-4303-0410-b956-a3cf2f4a3e73>2012-05-27 13:22:33 +0000
commitd1683ec919940d2ac308df6bfecba784586be1a4 (patch)
tree389c5c8400bf1a2522ef36843c02af78fb346d63 /target/linux/brcm63xx/patches-3.3/420-MIPS-BCM63XX-Register-SPI-flash-if-present.patch
parent35f8e3124329099e4cc9c3f760c6ff627099c99c (diff)
bcm63xx: add support for the HSSPI controller
Add support for the HSSPI controller found on bcm6328 and SPI attached flash. git-svn-id: svn://svn.openwrt.org/openwrt/trunk@31879 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/brcm63xx/patches-3.3/420-MIPS-BCM63XX-Register-SPI-flash-if-present.patch')
-rw-r--r--target/linux/brcm63xx/patches-3.3/420-MIPS-BCM63XX-Register-SPI-flash-if-present.patch89
1 files changed, 89 insertions, 0 deletions
diff --git a/target/linux/brcm63xx/patches-3.3/420-MIPS-BCM63XX-Register-SPI-flash-if-present.patch b/target/linux/brcm63xx/patches-3.3/420-MIPS-BCM63XX-Register-SPI-flash-if-present.patch
new file mode 100644
index 0000000000..f83dbcffd7
--- /dev/null
+++ b/target/linux/brcm63xx/patches-3.3/420-MIPS-BCM63XX-Register-SPI-flash-if-present.patch
@@ -0,0 +1,89 @@
+From a1e3ef9af3e3a7283ced5fd079ef7e8bc4e2deca Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Sun, 3 Jul 2011 15:00:38 +0200
+Subject: [PATCH 55/79] MIPS: BCM63XX: Register SPI flash if present
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ arch/mips/bcm63xx/dev-flash.c | 29 +++++++++++++++++++--
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 1 +
+ 2 files changed, 28 insertions(+), 2 deletions(-)
+
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -15,9 +15,12 @@
+ #include <linux/mtd/mtd.h>
+ #include <linux/mtd/partitions.h>
+ #include <linux/mtd/physmap.h>
++#include <linux/spi/spi.h>
++#include <linux/spi/flash.h>
+
+ #include <bcm63xx_cpu.h>
+ #include <bcm63xx_dev_flash.h>
++#include <bcm63xx_dev_hsspi.h>
+ #include <bcm63xx_regs.h>
+ #include <bcm63xx_io.h>
+
+@@ -54,12 +57,28 @@ static struct platform_device mtd_dev =
+ },
+ };
+
++static struct flash_platform_data bcm63xx_flash_data = {
++ .part_probe_types = bcm63xx_part_types,
++};
++
++static struct spi_board_info bcm63xx_spi_flash_info[] = {
++ {
++ .bus_num = 0,
++ .chip_select = 0,
++ .mode = 0,
++ .max_speed_hz = 781000,
++ .modalias = "m25p80",
++ .platform_data = &bcm63xx_flash_data,
++ },
++};
++
+ static int __init bcm63xx_detect_flash_type(void)
+ {
+ u32 val;
+
+ switch (bcm63xx_get_cpu_id()) {
+ case BCM6328_CPU_ID:
++ bcm63xx_spi_flash_info[0].max_speed_hz = 40000000;
+ val = bcm_misc_readl(MISC_STRAPBUS_6328_REG);
+ if (val & STRAPBUS_6328_BOOT_SEL_SERIAL)
+ return BCM63XX_FLASH_TYPE_SERIAL;
+@@ -78,6 +97,9 @@ static int __init bcm63xx_detect_flash_t
+ return BCM63XX_FLASH_TYPE_SERIAL;
+ case BCM6368_CPU_ID:
+ val = bcm_gpio_readl(GPIO_STRAPBUS_REG);
++ if (val & STRAPBUS_6368_SPI_CLK_FAST)
++ bcm63xx_spi_flash_info[0].max_speed_hz = 20000000;
++
+ switch (val & STRAPBUS_6368_BOOT_SEL_MASK) {
+ case STRAPBUS_6368_BOOT_SEL_NAND:
+ return BCM63XX_FLASH_TYPE_NAND;
+@@ -109,8 +131,11 @@ int __init bcm63xx_flash_register(void)
+
+ return platform_device_register(&mtd_dev);
+ case BCM63XX_FLASH_TYPE_SERIAL:
+- pr_warn("unsupported serial flash detected\n");
+- return -ENODEV;
++ if (BCMCPU_IS_6328())
++ bcm63xx_flash_data.max_transfer_len = HS_SPI_BUFFER_LEN;
++
++ return spi_register_board_info(bcm63xx_spi_flash_info,
++ ARRAY_SIZE(bcm63xx_spi_flash_info));
+ case BCM63XX_FLASH_TYPE_NAND:
+ pr_warn("unsupported NAND flash detected\n");
+ return -ENODEV;
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -555,6 +555,7 @@
+ #define GPIO_STRAPBUS_REG 0x40
+ #define STRAPBUS_6358_BOOT_SEL_PARALLEL (1 << 1)
+ #define STRAPBUS_6358_BOOT_SEL_SERIAL (0 << 1)
++#define STRAPBUS_6368_SPI_CLK_FAST (1 << 6)
+ #define STRAPBUS_6368_BOOT_SEL_MASK 0x3
+ #define STRAPBUS_6368_BOOT_SEL_NAND 0
+ #define STRAPBUS_6368_BOOT_SEL_SERIAL 1