diff options
| author | jogo <jogo@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2014-01-13 12:13:26 +0000 |
|---|---|---|
| committer | jogo <jogo@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2014-01-13 12:13:26 +0000 |
| commit | d9cfd89c1c69ed25f52a17e1941937a9f5e29505 (patch) | |
| tree | 3ffc41c34c855ff2829472c16f816c9f0b1b056c /target/linux/brcm63xx/patches-3.10/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch | |
| parent | c26ce10c2d6e0365e6789a665d27eb417cfd33ea (diff) | |
brcm63xx: add support for chip variants
Some SoCs have variants which are mostly the same, but use a different
chip id (or not). Add code for detecting them and handling them as
their standard counterparts.
This adds support for e.g. BCM6369.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@39269 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/brcm63xx/patches-3.10/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch')
| -rw-r--r-- | target/linux/brcm63xx/patches-3.10/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/target/linux/brcm63xx/patches-3.10/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch b/target/linux/brcm63xx/patches-3.10/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch index 516becdece..cdaae990aa 100644 --- a/target/linux/brcm63xx/patches-3.10/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch +++ b/target/linux/brcm63xx/patches-3.10/411-MIPS-BCM63XX-Register-SPI-flash-if-present.patch @@ -87,7 +87,7 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> return -ENODEV; --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h -@@ -672,6 +672,7 @@ +@@ -674,6 +674,7 @@ #define GPIO_STRAPBUS_REG 0x40 #define STRAPBUS_6358_BOOT_SEL_PARALLEL (1 << 1) #define STRAPBUS_6358_BOOT_SEL_SERIAL (0 << 1) @@ -95,7 +95,7 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> #define STRAPBUS_6368_BOOT_SEL_MASK 0x3 #define STRAPBUS_6368_BOOT_SEL_NAND 0 #define STRAPBUS_6368_BOOT_SEL_SERIAL 1 -@@ -1513,6 +1514,7 @@ +@@ -1515,6 +1516,7 @@ #define STRAPBUS_6362_BOOT_SEL_NAND (0 << 15) #define MISC_STRAPBUS_6328_REG 0x240 |