diff options
author | jogo <jogo@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2014-01-13 12:13:15 +0000 |
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committer | jogo <jogo@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2014-01-13 12:13:15 +0000 |
commit | c26ce10c2d6e0365e6789a665d27eb417cfd33ea (patch) | |
tree | 65fc3c7ac0bf2dcd0baa25251499d5319ac680fb /target/linux/brcm63xx/patches-3.10/310-MIPS-BCM63XX-remove-RUNTIME_DETECT-code-from-registe.patch | |
parent | bcd764a55058935d0f2c01c37921f2929a0e4be5 (diff) |
brcm63xx: remove non runtime detect and refresh affinity patches
Remove the non runtime detect code since its effectiveness is dubious
and almost never used.
Also update affinity patches to work on top of it.
Signed-off-by: Jonas Gorski <jogo@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@39268 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/brcm63xx/patches-3.10/310-MIPS-BCM63XX-remove-RUNTIME_DETECT-code-from-registe.patch')
-rw-r--r-- | target/linux/brcm63xx/patches-3.10/310-MIPS-BCM63XX-remove-RUNTIME_DETECT-code-from-registe.patch | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/target/linux/brcm63xx/patches-3.10/310-MIPS-BCM63XX-remove-RUNTIME_DETECT-code-from-registe.patch b/target/linux/brcm63xx/patches-3.10/310-MIPS-BCM63XX-remove-RUNTIME_DETECT-code-from-registe.patch new file mode 100644 index 0000000000..04b34266b1 --- /dev/null +++ b/target/linux/brcm63xx/patches-3.10/310-MIPS-BCM63XX-remove-RUNTIME_DETECT-code-from-registe.patch @@ -0,0 +1,61 @@ +From 082a49f0490008b999db80e3ccf1521c7dd21cec Mon Sep 17 00:00:00 2001 +From: Jonas Gorski <jogo@openwrt.org> +Date: Mon, 2 Dec 2013 12:32:44 +0100 +Subject: [PATCH 1/8] MIPS: BCM63XX: remove !RUNTIME_DETECT code from register + sets + +Signed-off-by: Jonas Gorski <jogo@openwrt.org> +--- + arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 33 ------------------------ + 1 file changed, 33 deletions(-) + +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h +@@ -598,10 +598,6 @@ enum bcm63xx_regs_set { + + extern const unsigned long *bcm63xx_regs_base; + +-#define __GEN_RSET_BASE(__cpu, __rset) \ +- case RSET_## __rset : \ +- return BCM_## __cpu ##_## __rset ##_BASE; +- + #define __GEN_RSET(__cpu) \ + switch (set) { \ + __GEN_RSET_BASE(__cpu, DSL_LMEM) \ +@@ -693,36 +689,7 @@ extern const unsigned long *bcm63xx_regs + + static inline unsigned long bcm63xx_regset_address(enum bcm63xx_regs_set set) + { +-#ifdef BCMCPU_RUNTIME_DETECT + return bcm63xx_regs_base[set]; +-#else +-#ifdef CONFIG_BCM63XX_CPU_3368 +- __GEN_RSET(3368) +-#endif +-#ifdef CONFIG_BCM63XX_CPU_6328 +- __GEN_RSET(6328) +-#endif +-#ifdef CONFIG_BCM63XX_CPU_6338 +- __GEN_RSET(6338) +-#endif +-#ifdef CONFIG_BCM63XX_CPU_6345 +- __GEN_RSET(6345) +-#endif +-#ifdef CONFIG_BCM63XX_CPU_6348 +- __GEN_RSET(6348) +-#endif +-#ifdef CONFIG_BCM63XX_CPU_6358 +- __GEN_RSET(6358) +-#endif +-#ifdef CONFIG_BCM63XX_CPU_6362 +- __GEN_RSET(6362) +-#endif +-#ifdef CONFIG_BCM63XX_CPU_6368 +- __GEN_RSET(6368) +-#endif +-#endif +- /* unreached */ +- return 0; + } + + /* |