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authornbd <nbd@3c298f89-4303-0410-b956-a3cf2f4a3e73>2008-08-05 16:42:43 +0000
committernbd <nbd@3c298f89-4303-0410-b956-a3cf2f4a3e73>2008-08-05 16:42:43 +0000
commit32bf325b697a579ee7769eb266bb4c93f8ce75fd (patch)
tree26ab8d9ab478994a7e30b553c880b8a915ab5afc /target/linux/atheros/files/arch/mips
parent59e1467430f941ae6a976a72777af731e8d3e248 (diff)
atheros: fix setting the gpio interrupt level when registering a gpio interrupt
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@12139 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/atheros/files/arch/mips')
-rw-r--r--target/linux/atheros/files/arch/mips/atheros/gpio.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/linux/atheros/files/arch/mips/atheros/gpio.c b/target/linux/atheros/files/arch/mips/atheros/gpio.c
index 26fba06446..c51de6164d 100644
--- a/target/linux/atheros/files/arch/mips/atheros/gpio.c
+++ b/target/linux/atheros/files/arch/mips/atheros/gpio.c
@@ -162,7 +162,7 @@ static void ar5315_gpio_intr_enable(unsigned int irq) {
/* Set the gpio level trigger mode */
/* reg &= ~(AR5315_GPIO_INT_LVL_M(i)); */
- reg |= AR5315_GPIO_INT_LVL(i);
+ reg |= AR5315_GPIO_INT_LVL(def_lvl);
/* Enable the gpio pin */
reg &= ~(AR5315_GPIO_INT_M);