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authorjuhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73>2009-07-01 19:32:48 +0000
committerjuhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73>2009-07-01 19:32:48 +0000
commitfc8502c6311f402f8e53615476dd9ee82efd3a61 (patch)
tree74ad13e2a583fcab4c4ffe1977c82c29e728eba8 /target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h
parentea22991291584ff192c3c0519f5d08ac8daa196f (diff)
[ar71xx] add AR7240 specific definitions
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@16644 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h')
-rw-r--r--target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h30
1 files changed, 20 insertions, 10 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h
index 145ea21308..198c4bfc01 100644
--- a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h
+++ b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h
@@ -103,6 +103,7 @@ enum ar71xx_soc_type {
AR71XX_SOC_AR7130,
AR71XX_SOC_AR7141,
AR71XX_SOC_AR7161,
+ AR71XX_SOC_AR7240,
AR71XX_SOC_AR9130,
AR71XX_SOC_AR9132
};
@@ -389,16 +390,25 @@ void ar71xx_ddr_flush(u32 reg);
#define RESET_MODULE_PCI_BUS BIT(1)
#define RESET_MODULE_PCI_CORE BIT(0)
-#define REV_ID_MASK 0xff
-#define REV_ID_CHIP_MASK 0xf3
-#define REV_ID_CHIP_AR7130 0xa0
-#define REV_ID_CHIP_AR7141 0xa1
-#define REV_ID_CHIP_AR7161 0xa2
-#define REV_ID_CHIP_AR9130 0xb0
-#define REV_ID_CHIP_AR9132 0xb1
-
-#define REV_ID_REVISION_MASK 0x3
-#define REV_ID_REVISION_SHIFT 2
+#define REV_ID_MAJOR_MASK 0xf0
+#define REV_ID_MAJOR_AR71XX 0xa0
+#define REV_ID_MAJOR_AR913X 0xb0
+#define REV_ID_MAJOR_AR724X 0xc0
+
+#define AR71XX_REV_ID_MINOR_MASK 0x3
+#define AR71XX_REV_ID_MINOR_AR7130 0x0
+#define AR71XX_REV_ID_MINOR_AR7141 0x1
+#define AR71XX_REV_ID_MINOR_AR7161 0x2
+#define AR71XX_REV_ID_REVISION_MASK 0x3
+#define AR71XX_REV_ID_REVISION_SHIFT 2
+
+#define AR91XX_REV_ID_MINOR_MASK 0x3
+#define AR91XX_REV_ID_MINOR_AR9130 0x0
+#define AR91XX_REV_ID_MINOR_AR9132 0x1
+#define AR91XX_REV_ID_REVISION_MASK 0x3
+#define AR91XX_REV_ID_REVISION_SHIFT 2
+
+#define AR724X_REV_ID_REVISION_MASK 0x3
extern void __iomem *ar71xx_reset_base;