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path: root/target/linux/ar71xx/patches-3.2/603-MIPS-ath79-ap121-fixes.patch
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--- a/arch/mips/ath79/mach-ap121.c
+++ b/arch/mips/ath79/mach-ap121.c
@@ -1,19 +1,23 @@
 /*
  *  Atheros AP121 board support
  *
- *  Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
+ *  Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
  *
  *  This program is free software; you can redistribute it and/or modify it
  *  under the terms of the GNU General Public License version 2 as published
  *  by the Free Software Foundation.
  */
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
 
-#include "machtypes.h"
+#include "dev-eth.h"
 #include "dev-gpio-buttons.h"
 #include "dev-leds-gpio.h"
+#include "dev-m25p80.h"
 #include "dev-spi.h"
 #include "dev-usb.h"
 #include "dev-wmac.h"
+#include "machtypes.h"
 
 #define AP121_GPIO_LED_WLAN		0
 #define AP121_GPIO_LED_USB		1
@@ -24,7 +28,82 @@
 #define AP121_KEYS_POLL_INTERVAL	20	/* msecs */
 #define AP121_KEYS_DEBOUNCE_INTERVAL	(3 * AP121_KEYS_POLL_INTERVAL)
 
-#define AP121_CAL_DATA_ADDR	0x1fff1000
+#define AP121_MAC0_OFFSET		0x0000
+#define AP121_MAC1_OFFSET		0x0006
+#define AP121_CALDATA_OFFSET		0x1000
+#define AP121_WMAC_MAC_OFFSET		0x1002
+
+#define AP121_MINI_GPIO_LED_WLAN	0
+#define AP121_MINI_GPIO_BTN_JUMPSTART	12
+#define AP121_MINI_GPIO_BTN_RESET	11
+
+static struct mtd_partition ap121_parts[] = {
+	{
+		.name		= "u-boot",
+		.offset		= 0,
+		.size		= 0x010000,
+		.mask_flags	= MTD_WRITEABLE,
+	},
+	{
+		.name		= "rootfs",
+		.offset		= 0x010000,
+		.size		= 0x130000,
+	},
+	{
+		.name		= "uImage",
+		.offset		= 0x140000,
+		.size		= 0x0a0000,
+	},
+	{
+		.name		= "NVRAM",
+		.offset		= 0x1e0000,
+		.size		= 0x010000,
+	},
+	{
+		.name		= "ART",
+		.offset		= 0x1f0000,
+		.size		= 0x010000,
+		.mask_flags	= MTD_WRITEABLE,
+	},
+};
+
+static struct mtd_partition ap121_mini_parts[] = {
+	{
+		.name		= "u-boot",
+		.offset		= 0,
+		.size		= 0x040000,
+		.mask_flags	= MTD_WRITEABLE,
+	},
+	{
+		.name		= "u-boot-env",
+		.offset		= 0x040000,
+		.size		= 0x010000,
+		.mask_flags	= MTD_WRITEABLE,
+	},
+	{
+		.name		= "rootfs",
+		.offset		= 0x050000,
+		.size		= 0x2b0000,
+	},
+	{
+		.name		= "uImage",
+		.offset		= 0x300000,
+		.size		= 0x0e0000,
+	},
+	{
+		.name		= "NVRAM",
+		.offset		= 0x3e0000,
+		.size		= 0x010000,
+	},
+	{
+		.name		= "ART",
+		.offset		= 0x3f0000,
+		.size		= 0x010000,
+		.mask_flags	= MTD_WRITEABLE,
+	},
+};
+
+static struct flash_platform_data ap121_flash_data;
 
 static struct gpio_led ap121_leds_gpio[] __initdata = {
 	{
@@ -58,41 +137,84 @@ static struct gpio_keys_button ap121_gpi
 	}
 };
 
-static struct ath79_spi_controller_data ap121_spi0_data = {
-	.cs_type = ATH79_SPI_CS_TYPE_INTERNAL,
-	.cs_line = 0,
+static struct gpio_led ap121_mini_leds_gpio[] __initdata = {
+	{
+		.name		= "ap121:green:wlan",
+		.gpio		= AP121_MINI_GPIO_LED_WLAN,
+		.active_low	= 0,
+	},
 };
 
-static struct spi_board_info ap121_spi_info[] = {
-	{
-		.bus_num	= 0,
-		.chip_select	= 0,
-		.max_speed_hz	= 25000000,
-		.modalias	= "mx25l1606e",
-		.controller_data = &ap121_spi0_data,
+static struct gpio_keys_button ap121_mini_gpio_keys[] __initdata = {
+	{
+		.desc		= "jumpstart button",
+		.type		= EV_KEY,
+		.code		= KEY_WPS_BUTTON,
+		.debounce_interval = AP121_KEYS_DEBOUNCE_INTERVAL,
+		.gpio		= AP121_MINI_GPIO_BTN_JUMPSTART,
+		.active_low	= 1,
+	},
+	{
+		.desc		= "reset button",
+		.type		= EV_KEY,
+		.code		= KEY_RESTART,
+		.debounce_interval = AP121_KEYS_DEBOUNCE_INTERVAL,
+		.gpio		= AP121_MINI_GPIO_BTN_RESET,
+		.active_low	= 1,
 	}
 };
 
-static struct ath79_spi_platform_data ap121_spi_data = {
-	.bus_num	= 0,
-	.num_chipselect	= 1,
-};
+static void __init ap121_common_setup(void)
+{
+	u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
+
+	ath79_register_m25p80(&ap121_flash_data);
+	ath79_register_wmac(art + AP121_CALDATA_OFFSET,
+			    art + AP121_WMAC_MAC_OFFSET);
+
+	ath79_init_mac(ath79_eth0_data.mac_addr, art + AP121_MAC0_OFFSET, 0);
+	ath79_init_mac(ath79_eth1_data.mac_addr, art + AP121_MAC1_OFFSET, 0);
+
+	ath79_register_mdio(0, 0x0);
+
+	/* LAN ports */
+	ath79_register_eth(1);
+
+	/* WAN port */
+	ath79_register_eth(0);
+}
 
 static void __init ap121_setup(void)
 {
-	u8 *cal_data = (u8 *) KSEG1ADDR(AP121_CAL_DATA_ADDR);
+	ap121_flash_data.parts = ap121_parts;
+	ap121_flash_data.nr_parts = ARRAY_SIZE(ap121_parts);
+
+	ap121_common_setup();
 
 	ath79_register_leds_gpio(-1, ARRAY_SIZE(ap121_leds_gpio),
 				 ap121_leds_gpio);
 	ath79_register_gpio_keys_polled(-1, AP121_KEYS_POLL_INTERVAL,
 					ARRAY_SIZE(ap121_gpio_keys),
 					ap121_gpio_keys);
-
-	ath79_register_spi(&ap121_spi_data, ap121_spi_info,
-			   ARRAY_SIZE(ap121_spi_info));
 	ath79_register_usb();
-	ath79_register_wmac(cal_data, NULL);
 }
 
 MIPS_MACHINE(ATH79_MACH_AP121, "AP121", "Atheros AP121 reference board",
 	     ap121_setup);
+
+static void __init ap121_mini_setup(void)
+{
+	ap121_flash_data.parts = ap121_mini_parts;
+	ap121_flash_data.nr_parts = ARRAY_SIZE(ap121_mini_parts);
+
+	ap121_common_setup();
+
+	ath79_register_leds_gpio(-1, ARRAY_SIZE(ap121_mini_leds_gpio),
+				 ap121_mini_leds_gpio);
+	ath79_register_gpio_keys_polled(-1, AP121_KEYS_POLL_INTERVAL,
+					ARRAY_SIZE(ap121_mini_gpio_keys),
+					ap121_mini_gpio_keys);
+}
+
+MIPS_MACHINE(ATH79_MACH_AP121_MINI, "AP121-MINI", "Atheros AP121-MINI",
+	     ap121_mini_setup);
--- a/arch/mips/ath79/Kconfig
+++ b/arch/mips/ath79/Kconfig
@@ -5,9 +5,10 @@ menu "Atheros AR71XX/AR724X/AR913X machi
 config ATH79_MACH_AP121
 	bool "Atheros AP121 reference board"
 	select SOC_AR933X
+	select ATH79_DEV_ETH
 	select ATH79_DEV_GPIO_BUTTONS
 	select ATH79_DEV_LEDS_GPIO
-	select ATH79_DEV_SPI
+	select ATH79_DEV_M25P80
 	select ATH79_DEV_USB
 	select ATH79_DEV_WMAC
 	help
--- a/arch/mips/ath79/machtypes.h
+++ b/arch/mips/ath79/machtypes.h
@@ -17,6 +17,7 @@
 enum ath79_mach_type {
 	ATH79_MACH_GENERIC = 0,
 	ATH79_MACH_AP121,		/* Atheros AP121 reference board */
+	ATH79_MACH_AP121_MINI,		/* Atheros AP121-MINI reference board */
 	ATH79_MACH_AP81,		/* Atheros AP81 reference board */
 	ATH79_MACH_DB120,		/* Atheros DB120 reference board */
 	ATH79_MACH_PB44,		/* Atheros PB44 reference board */