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diff -urN linux-2.6.22/arch/mips/Kconfig linux-2.6.22.new/arch/mips/Kconfig
--- linux-2.6.22/arch/mips/Kconfig 2007-07-09 01:32:17.000000000 +0200
+++ linux-2.6.22.new/arch/mips/Kconfig 2007-07-11 02:34:51.000000000 +0200
@@ -15,6 +15,21 @@
prompt "System type"
default SGI_IP22
+config AR7
+ bool "Texas Instruments AR7"
+ select BOOT_ELF32
+ select DMA_NONCOHERENT
+ select HW_HAS_PCI
+ select IRQ_CPU
+ select SWAP_IO_SPACE
+ select SYS_HAS_CPU_MIPS32_R1
+ select SYS_HAS_EARLY_PRINTK
+ select SYS_SUPPORTS_32BIT_KERNEL
+ select SYS_SUPPORTS_KGDB
+ select SYS_SUPPORTS_LITTLE_ENDIAN
+ select SYS_SUPPORTS_BIG_ENDIAN
+ select GENERIC_GPIO
+
config MACH_ALCHEMY
bool "Alchemy processor based machines"
diff -urN linux-2.6.22/arch/mips/kernel/traps.c linux-2.6.22.new/arch/mips/kernel/traps.c
--- linux-2.6.22/arch/mips/kernel/traps.c 2007-07-09 01:32:17.000000000 +0200
+++ linux-2.6.22.new/arch/mips/kernel/traps.c 2007-07-11 02:32:39.000000000 +0200
@@ -1074,11 +1074,23 @@ void *set_except_vector(int n, void *addr)
unsigned long old_handler = exception_handlers[n];
exception_handlers[n] = handler;
- if (n == 0 && cpu_has_divec) {
- *(volatile u32 *)(ebase + 0x200) = 0x08000000 |
- (0x03ffffff & (handler >> 2));
- flush_icache_range(ebase + 0x200, ebase + 0x204);
- }
+ if (n == 0 && cpu_has_divec)
+ if ((handler ^ (ebase + 4)) & 0xfc000000) {
+ /* lui k0, 0x0000 */
+ *(u32 *)(ebase + 0x200) = 0x3c1a0000 | (handler >> 16);
+ /* ori k0, 0x0000 */
+ *(u32 *)(ebase + 0x204) =
+ 0x375a0000 | (handler & 0xffff);
+ /* jr k0 */
+ *(u32 *)(ebase + 0x208) = 0x03400008;
+ /* nop */
+ *(u32 *)(ebase + 0x20C) = 0x00000000;
+ flush_icache_range(ebase + 0x200, ebase + 0x210);
+ } else {
+ *(volatile u32 *)(ebase + 0x200) =
+ 0x08000000 | (0x03ffffff & (handler >> 2));
+ flush_icache_range(ebase + 0x200, ebase + 0x204);
+ }
return (void *)old_handler;
}
diff -urN linux-2.6.22/arch/mips/Makefile linux-2.6.22.new/arch/mips/Makefile
--- linux-2.6.22/arch/mips/Makefile 2007-07-09 01:32:17.000000000 +0200
+++ linux-2.6.22.new/arch/mips/Makefile 2007-07-11 02:32:39.000000000 +0200
@@ -158,6 +158,13 @@
#
#
+# Texas Instruments AR7
+#
+core-$(CONFIG_AR7) += arch/mips/ar7/
+cflags-$(CONFIG_AR7) += -Iinclude/asm-mips/ar7
+load-$(CONFIG_AR7) += 0xffffffff94100000
+
+#
# Acer PICA 61, Mips Magnum 4000 and Olivetti M700.
#
core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/
diff -urN linux-2.6.22.4/include/asm-mips/page.h linux-2.6.22.4.new/include/asm-mips/page.h
--- linux-2.6.22.4/include/asm-mips/page.h 2007-08-21 12:33:06.000000000 +0800
+++ linux-2.6.22.4.new/include/asm-mips/page.h 2007-09-13 15:13:00.000000000 +0800
@@ -187,8 +187,10 @@
#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
-#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + UNCAC_BASE)
-#define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET)
+#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + UNCAC_BASE + \
+ PHYS_OFFSET)
+#define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET - \
+ PHYS_OFFSET)
#include <asm-generic/memory_model.h>
#include <asm-generic/page.h>
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