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path: root/target/linux/ar71xx/files/arch/mips/pci/pci-ar71xx.c
AgeCommit message (Collapse)Author
2009-10-01ar71xx: use ar71xx_pci_fixup on ar71xx SoCs onlyjuhosg
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@17807 3c298f89-4303-0410-b956-a3cf2f4a3e73
2009-07-05[ar71xx] reorganize PCI codejuhosg
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@16672 3c298f89-4303-0410-b956-a3cf2f4a3e73
2008-11-26[ar71xx] rename DDR registersjuhosg
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@13363 3c298f89-4303-0410-b956-a3cf2f4a3e73
2008-09-17[ar71xx] fix the PCI byte lane enable generation code, based on a patch by ↵juhosg
Chris Dearman git-svn-id: svn://svn.openwrt.org/openwrt/trunk@12617 3c298f89-4303-0410-b956-a3cf2f4a3e73
2008-07-21surprise :pjuhosg
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@11894 3c298f89-4303-0410-b956-a3cf2f4a3e73
generated by cgit v1.2.3 (git 2.46.0) at 2025-01-11 11:49:43 +0000