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path: root/target/linux/ar7/files/drivers/vlynq
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2009-05-25I recently came across an ar7 device which has the vlynq hardwiredflorian
so that the clocks are always generated by the remote device instead of the local one. Upon initialization the current version of vlynq driver disables remote clock generation and causes the entire bus to hang on my device. This patch adds support for detecting which device (local or remote) is responsible of clock generation and implements clock initialization based on detection result. Signed-off-by: Antti Seppala <a.seppala at gmail.com> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@16049 3c298f89-4303-0410-b956-a3cf2f4a3e73
2008-09-01Treat vlynq external divisor just like automatic, fix comment about it, ↵florian
thanks sn9 git-svn-id: svn://svn.openwrt.org/openwrt/trunk@12467 3c298f89-4303-0410-b956-a3cf2f4a3e73
2008-09-01Fix divisor calculation and configuration from previous commit, thanks sn9florian
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@12454 3c298f89-4303-0410-b956-a3cf2f4a3e73
2008-08-31Fix divisor settings for external devices like wireless devices, thanks sn9florian
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@12443 3c298f89-4303-0410-b956-a3cf2f4a3e73
2008-04-07ar7: remove unneeded packed and array initializationmatteo
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@10752 3c298f89-4303-0410-b956-a3cf2f4a3e73
2008-04-02vlynq: small fixesmatteo
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@10711 3c298f89-4303-0410-b956-a3cf2f4a3e73
2008-04-02add proper email addresses to the comment headersmatteo
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@10709 3c298f89-4303-0410-b956-a3cf2f4a3e73
2008-04-02Let authors holds copyright of the AR7 code (closes #2369)matteo
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@10708 3c298f89-4303-0410-b956-a3cf2f4a3e73
2008-04-02vlynq: probe for an external clock first, needed to enable acx on the ↵matteo
Leonardo board git-svn-id: svn://svn.openwrt.org/openwrt/trunk@10707 3c298f89-4303-0410-b956-a3cf2f4a3e73
2007-12-04Fix VLYNQ device enable for DG834Gv1nbd
This patch allows VLYNQ devices on the DG834Gv1 to be successfully enabled. Currently the "__vlynq_enable_device" function attempts to set the VLYNQ device clock divisor to values from 1 through 8 until a link is successfully established. On the DG834Gv1 (but not the DG834Gv2), setting the VLYNQ device clock divisor to 1 (full rate) results in all further VLYNQ operations failing (including software reset), so the device is never enabled. This patches changes the function to only attempt divisors 2 through 8, and hence the device is successfully enabled. Signed-off-by: Nick Forbes <nick.forbes@huntsworth.com> --------- git-svn-id: svn://svn.openwrt.org/openwrt/trunk@9656 3c298f89-4303-0410-b956-a3cf2f4a3e73
2007-10-05cleanup vlynq. drop vlynq-pciejka
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@9143 3c298f89-4303-0410-b956-a3cf2f4a3e73
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