diff options
Diffstat (limited to 'target/linux')
| -rw-r--r-- | target/linux/avr32/Makefile | 2 | ||||
| -rw-r--r-- | target/linux/avr32/config-default (renamed from target/linux/avr32/config-2.6.23) | 16 | ||||
| -rw-r--r-- | target/linux/avr32/patches/100-git_sync.patch | 17639 |
3 files changed, 11665 insertions, 5992 deletions
diff --git a/target/linux/avr32/Makefile b/target/linux/avr32/Makefile index 0530a49122..77b8c96f95 100644 --- a/target/linux/avr32/Makefile +++ b/target/linux/avr32/Makefile @@ -10,7 +10,7 @@ ARCH:=avr32 BOARD:=avr32 BOARDNAME:=Atmel AVR32 FEATURES:=squashfs -LINUX_VERSION:=2.6.23.1 +LINUX_VERSION:=2.6.24 include $(INCLUDE_DIR)/target.mk diff --git a/target/linux/avr32/config-2.6.23 b/target/linux/avr32/config-default index 75520b4569..f33525780e 100644 --- a/target/linux/avr32/config-2.6.23 +++ b/target/linux/avr32/config-default @@ -1,8 +1,9 @@ -CONFIG_AP7000_16_BIT_SMC=y -# CONFIG_AP7000_32_BIT_SMC is not set -# CONFIG_AP7000_8_BIT_SMC is not set +CONFIG_AP700X_16_BIT_SMC=y +# CONFIG_AP700X_32_BIT_SMC is not set +# CONFIG_AP700X_8_BIT_SMC is not set # CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set # CONFIG_ATM_DRIVERS is not set +# CONFIG_ATMEL_PWM is not set # CONFIG_ATMEL_SSC is not set CONFIG_AVR32=y CONFIG_BOARD_ATNGW100=y @@ -11,15 +12,17 @@ CONFIG_BOARD_ATNGW100=y # CONFIG_BROADCOM_PHY is not set # CONFIG_BT is not set CONFIG_CPU_AT32AP7000=y -CONFIG_CPU_FREQ=y +# CONFIG_CPU_FREQ is not set # CONFIG_CPU_FREQ_DEBUG is not set # CONFIG_CPU_FREQ_STAT is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y # CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set CONFIG_CPU_FREQ_GOV_PERFORMANCE=y # CONFIG_CPU_FREQ_GOV_POWERSAVE is not set # CONFIG_CPU_FREQ_GOV_USERSPACE is not set -CONFIG_CPU_FREQ_GOV_ONDEMAND=y +# CONFIG_CPU_FREQ_GOV_ONDEMAND is not set # CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set CONFIG_CPU_FREQ_AT32AP=y CONFIG_DW_DMAC=y @@ -36,6 +39,7 @@ CONFIG_HZ_250=y CONFIG_INITRAMFS_SOURCE="" CONFIG_LEDS_GPIO=y CONFIG_MACB=y +# CONFIG_MDIO_BITBANG is not set # CONFIG_MTD_ABSENT is not set CONFIG_MTD_BLKDEVS=y # CONFIG_MTD_BLOCK2MTD is not set @@ -85,6 +89,7 @@ CONFIG_MTD_PHYSMAP=y # CONFIG_MTD_ROM is not set # CONFIG_MTD_SLRAM is not set CONFIG_MTD=y +# CONFIG_NMI_DEBUGGING is not set # CONFIG_OWNERSHIP_TRACE is not set CONFIG_PHYS_OFFSET=0x10000000 CONFIG_PLATFORM_AT32AP=y @@ -92,6 +97,7 @@ CONFIG_PLATFORM_AT32AP=y # CONFIG_RTC is not set # CONFIG_SERIAL_8250 is not set CONFIG_SERIAL_ATMEL_CONSOLE=y +CONFIG_SERIAL_ATMEL_PDC=y # CONFIG_SERIAL_ATMEL_TTYAT is not set CONFIG_SERIAL_ATMEL=y # CONFIG_SMSC_PHY is not set diff --git a/target/linux/avr32/patches/100-git_sync.patch b/target/linux/avr32/patches/100-git_sync.patch index 6ce6259b6a..bfbc8c1d2b 100644 --- a/target/linux/avr32/patches/100-git_sync.patch +++ b/target/linux/avr32/patches/100-git_sync.patch @@ -1,136 +1,312 @@ - MAINTAINERS | 7 + - Makefile | 2 +- - arch/avr32/Kconfig | 7 + - arch/avr32/Makefile | 1 + - arch/avr32/boards/atngw100/Kconfig | 12 + - arch/avr32/boards/atngw100/flash.c | 5 +- - arch/avr32/boards/atngw100/setup.c | 26 +- - arch/avr32/boards/atstk1000/Kconfig | 12 + - arch/avr32/boards/atstk1000/atstk1002.c | 72 ++ - arch/avr32/boards/atstk1000/flash.c | 5 +- - arch/avr32/configs/atngw100_defconfig | 201 +++- - arch/avr32/configs/atstk1002_defconfig | 354 +++++- - arch/avr32/drivers/Makefile | 1 + - arch/avr32/drivers/dw-dmac.c | 761 ++++++++++++ - arch/avr32/drivers/dw-dmac.h | 42 + - arch/avr32/kernel/Makefile | 6 +- - arch/avr32/kernel/dma-controller.c | 34 + - arch/avr32/kernel/entry-avr32b.S | 26 +- - arch/avr32/kernel/setup.c | 2 +- - arch/avr32/kernel/vmlinux.lds.S | 143 +++ - arch/avr32/kernel/vmlinux.lds.c | 142 --- - arch/avr32/mach-at32ap/Kconfig | 7 + - arch/avr32/mach-at32ap/Makefile | 1 + - arch/avr32/mach-at32ap/at32ap7000.c | 241 ++++- - arch/avr32/mach-at32ap/clock.c | 116 ++ - arch/avr32/mach-at32ap/gpio-dev.c | 573 +++++++++ - arch/avr32/mach-at32ap/hsmc.c | 129 ++- - arch/avr32/mach-at32ap/pio.c | 80 ++ - arch/avr32/mach-at32ap/pm.h | 8 + - arch/avr32/mm/dma-coherent.c | 7 + - arch/avr32/mm/init.c | 12 +- - drivers/i2c/busses/Kconfig | 8 + - drivers/i2c/busses/Makefile | 1 + - drivers/i2c/busses/i2c-atmeltwi.c | 436 +++++++ - drivers/i2c/busses/i2c-atmeltwi.h | 117 ++ - drivers/misc/Kconfig | 9 + - drivers/misc/Makefile | 1 + - drivers/misc/atmel-ssc.c | 174 +++ - drivers/mmc/host/Kconfig | 10 + - drivers/mmc/host/Makefile | 1 + - drivers/mmc/host/atmel-mci.c | 1161 ++++++++++++++++++ - drivers/mmc/host/atmel-mci.h | 192 +++ - drivers/mtd/chips/cfi_cmdset_0001.c | 43 + - drivers/mtd/chips/cfi_cmdset_0002.c | 6 +- - drivers/spi/atmel_spi.c | 4 +- - drivers/usb/gadget/Kconfig | 26 +- - drivers/usb/gadget/Makefile | 1 + - drivers/usb/gadget/atmel_usba_udc.c | 2038 +++++++++++++++++++++++++++++++ - drivers/usb/gadget/atmel_usba_udc.h | 350 ++++++ - drivers/video/atmel_lcdfb.c | 6 +- - drivers/video/backlight/Kconfig | 12 + - drivers/video/backlight/Makefile | 2 + - drivers/video/backlight/ltv350qv.c | 339 +++++ - drivers/video/backlight/ltv350qv.h | 95 ++ - include/asm-avr32/arch-at32ap/board.h | 20 + - include/asm-avr32/arch-at32ap/portmux.h | 13 + - include/asm-avr32/arch-at32ap/smc.h | 51 +- - include/asm-avr32/dma-controller.h | 166 +++ - include/asm-avr32/dma-mapping.h | 17 +- - include/asm-avr32/system.h | 13 +- - include/asm-avr32/unistd.h | 13 + - include/linux/atmel-ssc.h | 312 +++++ - include/linux/spi/at73c213.h | 25 + - scripts/checkstack.pl | 5 + - sound/Kconfig | 6 + - sound/Makefile | 3 +- - sound/avr32/Kconfig | 11 + - sound/avr32/Makefile | 3 + - sound/avr32/ac97c.c | 914 ++++++++++++++ - sound/avr32/ac97c.h | 71 ++ - sound/oss/Kconfig | 4 + - sound/oss/Makefile | 1 + - sound/oss/at32_abdac.c | 722 +++++++++++ - sound/oss/at32_abdac.h | 59 + - sound/spi/Kconfig | 31 + - sound/spi/Makefile | 5 + - sound/spi/at73c213.c | 1121 +++++++++++++++++ - sound/spi/at73c213.h | 119 ++ - 78 files changed, 11500 insertions(+), 272 deletions(-) + Documentation/kernel-parameters.txt | 5 + + MAINTAINERS | 6 + + Makefile | 2 +- + arch/arm/mach-at91/at91sam9261_devices.c | 14 + + arch/arm/mach-at91/at91sam9rl_devices.c | 14 + + arch/arm/mach-at91/board-sam9261ek.c | 1 + + arch/arm/mach-at91/board-sam9263ek.c | 1 + + arch/avr32/Kconfig | 54 +- + arch/avr32/Kconfig.debug | 10 - + arch/avr32/Makefile | 4 +- + arch/avr32/boards/atngw100/Kconfig | 12 + + arch/avr32/boards/atngw100/setup.c | 14 +- + arch/avr32/boards/atstk1000/Kconfig | 101 ++- + arch/avr32/boards/atstk1000/Makefile | 2 + + arch/avr32/boards/atstk1000/atstk1000.h | 2 + + arch/avr32/boards/atstk1000/atstk1002.c | 129 +-- + arch/avr32/boards/atstk1000/atstk1003.c | 181 +++ + arch/avr32/boards/atstk1000/atstk1004.c | 152 +++ + arch/avr32/boards/atstk1000/setup.c | 64 + + arch/avr32/configs/atngw100_defconfig | 423 +++++--- + arch/avr32/configs/atstk1002_defconfig | 661 ++++++++--- + arch/avr32/configs/atstk1003_defconfig | 1032 ++++++++++++++++ + arch/avr32/configs/atstk1004_defconfig | 627 ++++++++++ + arch/avr32/drivers/Makefile | 1 + + arch/avr32/drivers/dw-dmac.c | 761 ++++++++++++ + arch/avr32/drivers/dw-dmac.h | 42 + + arch/avr32/kernel/Makefile | 4 +- + arch/avr32/kernel/cpu.c | 96 ++- + arch/avr32/kernel/dma-controller.c | 34 + + arch/avr32/kernel/irq.c | 11 + + arch/avr32/kernel/kprobes.c | 5 +- + arch/avr32/kernel/nmi_debug.c | 82 ++ + arch/avr32/kernel/ocd.c | 163 +++ + arch/avr32/kernel/process.c | 5 +- + arch/avr32/kernel/ptrace.c | 5 +- + arch/avr32/kernel/setup.c | 2 + + arch/avr32/kernel/signal.c | 7 - + arch/avr32/kernel/traps.c | 21 +- + arch/avr32/mach-at32ap/Kconfig | 19 +- + arch/avr32/mach-at32ap/Makefile | 5 +- + arch/avr32/mach-at32ap/at32ap7000.c | 1730 -------------------------- + arch/avr32/mach-at32ap/at32ap700x.c | 1809 ++++++++++++++++++++++++++++ + arch/avr32/mach-at32ap/extint.c | 59 +- + arch/avr32/mach-at32ap/gpio-dev.c | 573 +++++++++ + arch/avr32/mach-at32ap/pio.c | 76 ++ + arch/avr32/mm/dma-coherent.c | 7 + + arch/avr32/mm/tlb.c | 2 +- + arch/avr32/oprofile/Makefile | 8 + + arch/avr32/oprofile/op_model_avr32.c | 235 ++++ + drivers/i2c/busses/Kconfig | 8 + + drivers/i2c/busses/Makefile | 1 + + drivers/i2c/busses/i2c-atmeltwi.c | 436 +++++++ + drivers/i2c/busses/i2c-atmeltwi.h | 117 ++ + drivers/leds/Kconfig | 7 + + drivers/leds/Makefile | 1 + + drivers/leds/leds-atmel-pwm.c | 155 +++ + drivers/misc/Kconfig | 9 + + drivers/misc/Makefile | 1 + + drivers/misc/atmel_pwm.c | 409 +++++++ + drivers/mmc/host/Kconfig | 10 + + drivers/mmc/host/Makefile | 1 + + drivers/mmc/host/atmel-mci.c | 1176 ++++++++++++++++++ + drivers/mmc/host/atmel-mci.h | 192 +++ + drivers/mtd/chips/cfi_cmdset_0001.c | 43 + + drivers/mtd/chips/cfi_cmdset_0002.c | 6 +- + drivers/pcmcia/Kconfig | 7 + + drivers/pcmcia/Makefile | 1 + + drivers/pcmcia/at32_cf.c | 533 ++++++++ + drivers/serial/Kconfig | 15 + + drivers/serial/atmel_serial.c | 884 +++++++++++--- + drivers/spi/atmel_spi.c | 173 ++- + drivers/video/atmel_lcdfb.c | 149 +++- + drivers/video/backlight/Kconfig | 13 + + drivers/video/console/Kconfig | 2 +- + drivers/watchdog/Kconfig | 2 +- + include/asm-avr32/arch-at32ap/at32ap7000.h | 35 - + include/asm-avr32/arch-at32ap/at32ap700x.h | 35 + + include/asm-avr32/arch-at32ap/board.h | 11 +- + include/asm-avr32/arch-at32ap/cpu.h | 2 +- + include/asm-avr32/arch-at32ap/io.h | 4 +- + include/asm-avr32/arch-at32ap/portmux.h | 12 + + include/asm-avr32/dma-controller.h | 166 +++ + include/asm-avr32/irq.h | 5 + + include/asm-avr32/kdebug.h | 1 + + include/asm-avr32/ocd.h | 5 + + include/asm-avr32/processor.h | 14 + + include/asm-avr32/ptrace.h | 13 +- + include/asm-avr32/thread_info.h | 1 + + include/linux/atmel_pwm.h | 70 ++ + include/video/atmel_lcdc.h | 25 +- + kernel/ptrace.c | 2 + + sound/Kconfig | 2 + + sound/Makefile | 2 +- + sound/avr32/Kconfig | 11 + + sound/avr32/Makefile | 3 + + sound/avr32/ac97c.c | 914 ++++++++++++++ + sound/avr32/ac97c.h | 71 ++ + sound/oss/Kconfig | 4 + + sound/oss/Makefile | 1 + + sound/oss/at32_abdac.c | 722 +++++++++++ + sound/oss/at32_abdac.h | 59 + + 101 files changed, 13294 insertions(+), 2520 deletions(-) create mode 100644 arch/avr32/boards/atngw100/Kconfig + create mode 100644 arch/avr32/boards/atstk1000/atstk1003.c + create mode 100644 arch/avr32/boards/atstk1000/atstk1004.c + create mode 100644 arch/avr32/configs/atstk1003_defconfig + create mode 100644 arch/avr32/configs/atstk1004_defconfig create mode 100644 arch/avr32/drivers/Makefile create mode 100644 arch/avr32/drivers/dw-dmac.c create mode 100644 arch/avr32/drivers/dw-dmac.h create mode 100644 arch/avr32/kernel/dma-controller.c - create mode 100644 arch/avr32/kernel/vmlinux.lds.S - delete mode 100644 arch/avr32/kernel/vmlinux.lds.c + create mode 100644 arch/avr32/kernel/nmi_debug.c + create mode 100644 arch/avr32/kernel/ocd.c + delete mode 100644 arch/avr32/mach-at32ap/at32ap7000.c + create mode 100644 arch/avr32/mach-at32ap/at32ap700x.c create mode 100644 arch/avr32/mach-at32ap/gpio-dev.c + create mode 100644 arch/avr32/oprofile/Makefile + create mode 100644 arch/avr32/oprofile/op_model_avr32.c create mode 100644 drivers/i2c/busses/i2c-atmeltwi.c create mode 100644 drivers/i2c/busses/i2c-atmeltwi.h - create mode 100644 drivers/misc/atmel-ssc.c + create mode 100644 drivers/leds/leds-atmel-pwm.c + create mode 100644 drivers/misc/atmel_pwm.c create mode 100644 drivers/mmc/host/atmel-mci.c create mode 100644 drivers/mmc/host/atmel-mci.h - create mode 100644 drivers/usb/gadget/atmel_usba_udc.c - create mode 100644 drivers/usb/gadget/atmel_usba_udc.h - create mode 100644 drivers/video/backlight/ltv350qv.c - create mode 100644 drivers/video/backlight/ltv350qv.h + create mode 100644 drivers/pcmcia/at32_cf.c + delete mode 100644 include/asm-avr32/arch-at32ap/at32ap7000.h + create mode 100644 include/asm-avr32/arch-at32ap/at32ap700x.h create mode 100644 include/asm-avr32/dma-controller.h - create mode 100644 include/linux/atmel-ssc.h - create mode 100644 include/linux/spi/at73c213.h + create mode 100644 include/linux/atmel_pwm.h create mode 100644 sound/avr32/Kconfig create mode 100644 sound/avr32/Makefile create mode 100644 sound/avr32/ac97c.c create mode 100644 sound/avr32/ac97c.h create mode 100644 sound/oss/at32_abdac.c create mode 100644 sound/oss/at32_abdac.h - create mode 100644 sound/spi/Kconfig - create mode 100644 sound/spi/Makefile - create mode 100644 sound/spi/at73c213.c - create mode 100644 sound/spi/at73c213.h +diff --git a/Documentation/kernel-parameters.txt b/Documentation/kernel-parameters.txt +index c417877..17fc60e 100644 +--- a/Documentation/kernel-parameters.txt ++++ b/Documentation/kernel-parameters.txt +@@ -34,6 +34,7 @@ parameter is applicable: + ALSA ALSA sound support is enabled. + APIC APIC support is enabled. + APM Advanced Power Management support is enabled. ++ AVR32 AVR32 architecture is enabled. + AX25 Appropriate AX.25 support is enabled. + BLACKFIN Blackfin architecture is enabled. + DRM Direct Rendering Management support is enabled. +@@ -1123,6 +1124,10 @@ and is between 256 and 4096 characters. It is defined in the file + of returning the full 64-bit number. + The default is to return 64-bit inode numbers. + ++ nmi_debug= [KNL,AVR32] Specify one or more actions to take ++ when a NMI is triggered. ++ Format: [state][,regs][,debounce][,die] ++ + nmi_watchdog= [KNL,BUGS=X86-32] Debugging features for SMP kernels + + no387 [BUGS=X86-32] Tells the kernel to use the 387 maths diff --git a/MAINTAINERS b/MAINTAINERS -index 9a91d9e..587afe3 100644 +index 2340cfb..e349a9e 100644 --- a/MAINTAINERS +++ b/MAINTAINERS -@@ -669,6 +669,13 @@ P: Haavard Skinnemoen - M: hskinnemoen@atmel.com - S: Supported +@@ -671,6 +671,12 @@ W: http://www.atmel.com/products/AT91/ + W: http://www.at91.com/ + S: Maintained -+ATMEL USBA UDC DRIVER ++ATMEL AT91 / AT32 SERIAL DRIVER +P: Haavard Skinnemoen +M: hskinnemoen@atmel.com -+L: kernel@avr32linux.org -+W: http://avr32linux.org/twiki/bin/view/Main/AtmelUsbDeviceDriver ++L: linux-kernel@vger.kernel.org +S: Supported + - ATMEL WIRELESS DRIVER - P: Simon Kelley - M: simon@thekelleys.org.uk + ATMEL LCDFB DRIVER + P: Nicolas Ferre + M: nicolas.ferre@atmel.com +diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c +index 64979a9..bfa3d18 100644 +--- a/arch/arm/mach-at91/at91sam9261_devices.c ++++ b/arch/arm/mach-at91/at91sam9261_devices.c +@@ -530,6 +530,20 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) + at91_set_B_periph(AT91_PIN_PB27, 0); /* LCDD22 */ + at91_set_B_periph(AT91_PIN_PB28, 0); /* LCDD23 */ + ++#ifdef CONFIG_FB_INTSRAM ++ { ++ void __iomem *fb; ++ struct resource *fb_res = &lcdc_resources[2]; ++ size_t fb_len = fb_res->end - fb_res->start + 1; ++ ++ fb = ioremap_writecombine(fb_res->start, fb_len); ++ if (fb) { ++ memset(fb, 0, fb_len); ++ iounmap(fb, fb_len); ++ } ++ } ++#endif ++ + lcdc_data = *data; + platform_device_register(&at91_lcdc_device); + } +diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c +index 2bd60a3..84ee029 100644 +--- a/arch/arm/mach-at91/at91sam9rl_devices.c ++++ b/arch/arm/mach-at91/at91sam9rl_devices.c +@@ -375,6 +375,20 @@ void __init at91_add_device_lcdc(struct atmel_lcdfb_info *data) + at91_set_B_periph(AT91_PIN_PC24, 0); /* LCDD22 */ + at91_set_B_periph(AT91_PIN_PC25, 0); /* LCDD23 */ + ++#ifdef CONFIG_FB_INTSRAM ++ { ++ void __iomem *fb; ++ struct resource *fb_res = &lcdc_resources[2]; ++ size_t fb_len = fb_res->end - fb_res->start + 1; ++ ++ fb = ioremap_writecombine(fb_res->start, fb_len); ++ if (fb) { ++ memset(fb, 0, fb_len); ++ iounmap(fb, fb_len); ++ } ++ } ++#endif ++ + lcdc_data = *data; + platform_device_register(&at91_lcdc_device); + } +diff --git a/arch/arm/mach-at91/board-sam9261ek.c b/arch/arm/mach-at91/board-sam9261ek.c +index 550ae59..0d275bb 100644 +--- a/arch/arm/mach-at91/board-sam9261ek.c ++++ b/arch/arm/mach-at91/board-sam9261ek.c +@@ -322,6 +322,7 @@ static void at91_lcdc_power_control(int on) + + /* Driver datas */ + static struct atmel_lcdfb_info __initdata ek_lcdc_data = { ++ .lcdcon_is_backlight = true, + .default_bpp = 16, + .default_dmacon = ATMEL_LCDC_DMAEN, + .default_lcdcon2 = AT91SAM9261_DEFAULT_LCDCON2, +diff --git a/arch/arm/mach-at91/board-sam9263ek.c b/arch/arm/mach-at91/board-sam9263ek.c +index ab9dcc0..39bded2 100644 +--- a/arch/arm/mach-at91/board-sam9263ek.c ++++ b/arch/arm/mach-at91/board-sam9263ek.c +@@ -250,6 +250,7 @@ static void at91_lcdc_power_control(int on) + + /* Driver datas */ + static struct atmel_lcdfb_info __initdata ek_lcdc_data = { ++ .lcdcon_is_backlight = true, + .default_bpp = 16, + .default_dmacon = ATMEL_LCDC_DMAEN, + .default_lcdcon2 = AT91SAM9263_DEFAULT_LCDCON2, diff --git a/arch/avr32/Kconfig b/arch/avr32/Kconfig -index d12346a..ec6c7c5 100644 +index b77abce..3f09270 100644 --- a/arch/avr32/Kconfig +++ b/arch/avr32/Kconfig -@@ -116,6 +116,9 @@ endchoice +@@ -54,6 +54,9 @@ config ARCH_HAS_ILOG2_U32 + config ARCH_HAS_ILOG2_U64 + def_bool n + ++config ARCH_SUPPORTS_OPROFILE ++ def_bool y ++ + config GENERIC_HWEIGHT + def_bool y + +@@ -81,19 +84,23 @@ config PLATFORM_AT32AP + select MMU + select PERFORMANCE_COUNTERS + +-choice +- prompt "AVR32 CPU type" +- default CPU_AT32AP7000 ++# ++# CPU types ++# + +-config CPU_AT32AP7000 +- bool "AT32AP7000" ++# AP7000 derivatives ++config CPU_AT32AP700X ++ bool + select PLATFORM_AT32AP +-endchoice +- +-# +-# CPU Daughterboards for ATSTK1000 +-config BOARD_ATSTK1002 ++config CPU_AT32AP7000 ++ bool ++ select CPU_AT32AP700X ++config CPU_AT32AP7001 ++ bool ++ select CPU_AT32AP700X ++config CPU_AT32AP7002 + bool ++ select CPU_AT32AP700X + + choice + prompt "AVR32 board type" +@@ -101,15 +108,18 @@ choice + + config BOARD_ATSTK1000 + bool "ATSTK1000 evaluation board" +- select BOARD_ATSTK1002 if CPU_AT32AP7000 + + config BOARD_ATNGW100 + bool "ATNGW100 Network Gateway" ++ select CPU_AT32AP7000 + endchoice + if BOARD_ATSTK1000 source "arch/avr32/boards/atstk1000/Kconfig" endif @@ -140,10 +316,39 @@ index d12346a..ec6c7c5 100644 choice prompt "Boot loader type" -@@ -175,6 +178,10 @@ config OWNERSHIP_TRACE +@@ -123,15 +133,15 @@ source "arch/avr32/mach-at32ap/Kconfig" + + config LOAD_ADDRESS + hex +- default 0x10000000 if LOADER_U_BOOT=y && CPU_AT32AP7000=y ++ default 0x10000000 if LOADER_U_BOOT=y && CPU_AT32AP700X=y + + config ENTRY_ADDRESS + hex +- default 0x90000000 if LOADER_U_BOOT=y && CPU_AT32AP7000=y ++ default 0x90000000 if LOADER_U_BOOT=y && CPU_AT32AP700X=y + + config PHYS_OFFSET + hex +- default 0x10000000 if CPU_AT32AP7000=y ++ default 0x10000000 if CPU_AT32AP700X=y + + source "kernel/Kconfig.preempt" + +@@ -163,6 +173,20 @@ config OWNERSHIP_TRACE enabling Nexus-compliant debuggers to keep track of the PID of the currently executing task. ++config NMI_DEBUGGING ++ bool "NMI Debugging" ++ default n ++ help ++ Say Y here and pass the nmi_debug command-line parameter to ++ the kernel to turn on NMI debugging. Depending on the value ++ of the nmi_debug option, various pieces of information will ++ be dumped to the console when a Non-Maskable Interrupt ++ happens. ++ +config DW_DMAC + tristate "Synopsys DesignWare DMA Controller support" + default y if CPU_AT32AP7000 @@ -151,14 +356,52 @@ index d12346a..ec6c7c5 100644 # FPU emulation goes here source "kernel/Kconfig.hz" +@@ -219,6 +243,8 @@ source "drivers/Kconfig" + + source "fs/Kconfig" + ++source "kernel/Kconfig.instrumentation" ++ + source "arch/avr32/Kconfig.debug" + + source "security/Kconfig" +diff --git a/arch/avr32/Kconfig.debug b/arch/avr32/Kconfig.debug +index 64ace00..2283933 100644 +--- a/arch/avr32/Kconfig.debug ++++ b/arch/avr32/Kconfig.debug +@@ -6,14 +6,4 @@ config TRACE_IRQFLAGS_SUPPORT + + source "lib/Kconfig.debug" + +-config KPROBES +- bool "Kprobes" +- depends on DEBUG_KERNEL +- help +- Kprobes allows you to trap at almost any kernel address and +- execute a callback function. register_kprobe() establishes +- a probepoint and specifies the callback. Kprobes is useful +- for kernel debugging, non-intrusive instrumentation and testing. +- If in doubt, say "N". +- + endmenu diff --git a/arch/avr32/Makefile b/arch/avr32/Makefile -index dc6bc01..eb72198 100644 +index 8791864..2d7bacd 100644 --- a/arch/avr32/Makefile +++ b/arch/avr32/Makefile -@@ -31,6 +31,7 @@ core-$(CONFIG_BOARD_ATNGW100) += arch/avr32/boards/atngw100/ +@@ -16,7 +16,7 @@ KBUILD_AFLAGS += -mrelax -mno-pic + CFLAGS_MODULE += -mno-relax + LDFLAGS_vmlinux += --relax + +-cpuflags-$(CONFIG_CPU_AT32AP7000) += -mcpu=ap7000 ++cpuflags-$(CONFIG_PLATFORM_AT32AP) += -march=ap + + KBUILD_CFLAGS += $(cpuflags-y) + KBUILD_AFLAGS += $(cpuflags-y) +@@ -31,6 +31,8 @@ core-$(CONFIG_BOARD_ATNGW100) += arch/avr32/boards/atngw100/ core-$(CONFIG_LOADER_U_BOOT) += arch/avr32/boot/u-boot/ core-y += arch/avr32/kernel/ core-y += arch/avr32/mm/ ++drivers-$(CONFIG_OPROFILE) += arch/avr32/oprofile/ +drivers-y += arch/avr32/drivers/ libs-y += arch/avr32/lib/ @@ -181,41 +424,19 @@ index 0000000..5d922df + + Choose 'Y' here if you're having i2c-related problems and + want to rule out the i2c bus driver. -diff --git a/arch/avr32/boards/atngw100/flash.c b/arch/avr32/boards/atngw100/flash.c -index f9b32a8..b07ae63 100644 ---- a/arch/avr32/boards/atngw100/flash.c -+++ b/arch/avr32/boards/atngw100/flash.c -@@ -15,7 +15,7 @@ - - #include <asm/arch/smc.h> - --static struct smc_config flash_config __initdata = { -+static struct smc_timing flash_timing __initdata = { - .ncs_read_setup = 0, - .nrd_setup = 40, - .ncs_write_setup = 0, -@@ -28,7 +28,9 @@ static struct smc_config flash_config __initdata = { - - .read_cycle = 120, - .write_cycle = 120, -+}; - -+static struct smc_config flash_config __initdata = { - .bus_width = 2, - .nrd_controlled = 1, - .nwe_controlled = 1, -@@ -82,6 +84,7 @@ static int __init atngw100_flash_init(void) - { - int ret; - -+ smc_set_timing(&flash_config, &flash_timing); - ret = smc_set_configuration(0, &flash_config); - if (ret < 0) { - printk(KERN_ERR "atngw100: failed to set NOR flash timing\n"); diff --git a/arch/avr32/boards/atngw100/setup.c b/arch/avr32/boards/atngw100/setup.c -index ef80156..2a5f587 100644 +index 52987c8..383b825 100644 --- a/arch/avr32/boards/atngw100/setup.c +++ b/arch/avr32/boards/atngw100/setup.c +@@ -20,7 +20,7 @@ + #include <asm/io.h> + #include <asm/setup.h> + +-#include <asm/arch/at32ap7000.h> ++#include <asm/arch/at32ap700x.h> + #include <asm/arch/board.h> + #include <asm/arch/init.h> + #include <asm/arch/portmux.h> @@ -42,6 +42,11 @@ static struct spi_board_info spi0_board_info[] __initdata = { }, }; @@ -228,23 +449,15 @@ index ef80156..2a5f587 100644 /* * The next two functions should go away as the boot loader is * supposed to initialize the macb address registers with a valid -@@ -124,9 +129,13 @@ static struct platform_device ngw_gpio_leds = { +@@ -124,6 +129,7 @@ static struct platform_device ngw_gpio_leds = { } }; +#ifdef CONFIG_BOARD_ATNGW100_I2C_GPIO static struct i2c_gpio_platform_data i2c_gpio_data = { -- .sda_pin = GPIO_PIN_PA(6), -- .scl_pin = GPIO_PIN_PA(7), -+ .sda_pin = GPIO_PIN_PA(6), -+ .scl_pin = GPIO_PIN_PA(7), -+ .sda_is_open_drain = 1, -+ .scl_is_open_drain = 1, -+ .udelay = 2, /* close to 100 kHz */ - }; - - static struct platform_device i2c_gpio_device = { -@@ -136,6 +145,7 @@ static struct platform_device i2c_gpio_device = { + .sda_pin = GPIO_PIN_PA(6), + .scl_pin = GPIO_PIN_PA(7), +@@ -139,6 +145,7 @@ static struct platform_device i2c_gpio_device = { .platform_data = &i2c_gpio_data, }, }; @@ -252,26 +465,23 @@ index ef80156..2a5f587 100644 static int __init atngw100_init(void) { -@@ -154,6 +164,8 @@ static int __init atngw100_init(void) +@@ -157,6 +164,7 @@ static int __init atngw100_init(void) set_hw_addr(at32_add_device_eth(1, ð_data[1])); at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info)); + at32_add_device_mci(0, &mci0_data); -+ at32_add_device_usba(0, NULL); + at32_add_device_usba(0, NULL); for (i = 0; i < ARRAY_SIZE(ngw_leds); i++) { - at32_select_gpio(ngw_leds[i].gpio, -@@ -161,9 +173,15 @@ static int __init atngw100_init(void) +@@ -165,11 +173,15 @@ static int __init atngw100_init(void) } platform_device_register(&ngw_gpio_leds); -- at32_select_gpio(i2c_gpio_data.sda_pin, 0); -- at32_select_gpio(i2c_gpio_data.scl_pin, 0); +#ifdef CONFIG_BOARD_ATNGW100_I2C_GPIO -+ at32_select_gpio(i2c_gpio_data.sda_pin, -+ AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH); -+ at32_select_gpio(i2c_gpio_data.scl_pin, -+ AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH); + at32_select_gpio(i2c_gpio_data.sda_pin, + AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH); + at32_select_gpio(i2c_gpio_data.scl_pin, + AT32_GPIOF_MULTIDRV | AT32_GPIOF_OUTPUT | AT32_GPIOF_HIGH); platform_device_register(&i2c_gpio_device); +#else + at32_add_device_twi(0); @@ -280,14 +490,131 @@ index ef80156..2a5f587 100644 return 0; } diff --git a/arch/avr32/boards/atstk1000/Kconfig b/arch/avr32/boards/atstk1000/Kconfig -index 718578f..b1f5a62 100644 +index 718578f..56a8d8e 100644 --- a/arch/avr32/boards/atstk1000/Kconfig +++ b/arch/avr32/boards/atstk1000/Kconfig -@@ -76,4 +76,16 @@ config BOARD_ATSTK1002_J2_RGB +@@ -1,34 +1,53 @@ + # STK1000 customization + +-if BOARD_ATSTK1002 ++if BOARD_ATSTK1000 + +-config BOARD_ATSTK1002_CUSTOM +- bool "Non-default STK-1002 jumper settings" ++choice ++ prompt "ATSTK1000 CPU daughterboard type" ++ default BOARD_ATSTK1002 ++ ++config BOARD_ATSTK1002 ++ bool "ATSTK1002" ++ select CPU_AT32AP7000 ++ ++config BOARD_ATSTK1003 ++ bool "ATSTK1003" ++ select CPU_AT32AP7001 ++ ++config BOARD_ATSTK1004 ++ bool "ATSTK1004" ++ select CPU_AT32AP7002 ++ ++endchoice ++ ++ ++config BOARD_ATSTK100X_CUSTOM ++ bool "Non-default STK1002/STK1003/STK1004 jumper settings" + help + You will normally leave the jumpers on the CPU card at their + default settings. If you need to use certain peripherals, + you will need to change some of those jumpers. + +-if BOARD_ATSTK1002_CUSTOM ++if BOARD_ATSTK100X_CUSTOM + +-config BOARD_ATSTK1002_SW1_CUSTOM ++config BOARD_ATSTK100X_SW1_CUSTOM + bool "SW1: use SSC1 (not SPI0)" + help + This also prevents using the external DAC as an audio interface, + and means you can't initialize the on-board QVGA display. + +-config BOARD_ATSTK1002_SW2_CUSTOM ++config BOARD_ATSTK100X_SW2_CUSTOM + bool "SW2: use IRDA or TIMER0 (not UART-A, MMC/SD, and PS2-A)" + help + If you change this you'll want an updated boot loader putting + the console on UART-C not UART-A. + +-config BOARD_ATSTK1002_SW3_CUSTOM ++config BOARD_ATSTK100X_SW3_CUSTOM + bool "SW3: use TIMER1 (not SSC0 and GCLK)" + help + This also prevents using the external DAC as an audio interface. + +-config BOARD_ATSTK1002_SW4_CUSTOM ++config BOARD_ATSTK100X_SW4_CUSTOM + bool "SW4: use ISI/Camera (not GPIOs, SPI1, and PS2-B)" + help + To use the camera interface you'll need a custom card (on the +@@ -36,27 +55,29 @@ config BOARD_ATSTK1002_SW4_CUSTOM + + config BOARD_ATSTK1002_SW5_CUSTOM + bool "SW5: use MACB1 (not LCDC)" ++ depends on BOARD_ATSTK1002 + + config BOARD_ATSTK1002_SW6_CUSTOM + bool "SW6: more GPIOs (not MACB0)" ++ depends on BOARD_ATSTK1002 + + endif # custom + +-config BOARD_ATSTK1002_SPI1 ++config BOARD_ATSTK100X_SPI1 + bool "Configure SPI1 controller" +- depends on !BOARD_ATSTK1002_SW4_CUSTOM ++ depends on !BOARD_ATSTK100X_SW4_CUSTOM + help + All the signals for the second SPI controller are available on + GPIO lines and accessed through the J1 jumper block. Say "y" + here to configure that SPI controller. + +-config BOARD_ATSTK1002_J2_LED ++config BOARD_ATSTK1000_J2_LED + bool +- default BOARD_ATSTK1002_J2_LED8 || BOARD_ATSTK1002_J2_RGB ++ default BOARD_ATSTK1000_J2_LED8 || BOARD_ATSTK1000_J2_RGB + + choice + prompt "LEDs connected to J2:" +- depends on LEDS_GPIO && !BOARD_ATSTK1002_SW4_CUSTOM ++ depends on LEDS_GPIO && !BOARD_ATSTK100X_SW4_CUSTOM + optional + help + Select this if you have jumpered the J2 jumper block to the +@@ -64,16 +85,64 @@ choice + IDC cable. A default "heartbeat" trigger is provided, but + you can of course override this. + +-config BOARD_ATSTK1002_J2_LED8 ++config BOARD_ATSTK1000_J2_LED8 + bool "LED0..LED7" + help + Select this if J2 is jumpered to LED0..LED7 amber leds. + +-config BOARD_ATSTK1002_J2_RGB ++config BOARD_ATSTK1000_J2_RGB + bool "RGB leds" + help + Select this if J2 is jumpered to the RGB leds. endchoice -+config BOARD_ATSTK1002_ENABLE_AC97 +-endif # stk 1002 ++config BOARD_ATSTK1000_EXTDAC ++ bool ++ depends on !BOARD_ATSTK100X_SW1_CUSTOM && !BOARD_ATSTK100X_SW3_CUSTOM ++ default y ++ ++config BOARD_ATSTK100X_ENABLE_AC97 + bool "Use AC97C instead of ABDAC" + help + Select this if you want to use the built-in AC97 controller @@ -295,37 +622,332 @@ index 718578f..b1f5a62 100644 + the same I/O pins on the AP7000, so both can't be enabled + at the same time. + -+ Note that the STK1000/STK1002 kit doesn't ship with an AC97 -+ codec on board, so say N unless you've got an expansion -+ board with an AC97 codec on it that you want to use. ++ Note that the STK1000 kit doesn't ship with an AC97 codec on ++ board, so say N unless you've got an expansion board with an ++ AC97 codec on it that you want to use. + - endif # stk 1002 ++config BOARD_ATSTK1000_CF_HACKS ++ bool "ATSTK1000 CompactFlash hacks" ++ depends on !BOARD_ATSTK100X_SW4_CUSTOM ++ help ++ Select this if you have re-routed the CompactFlash RESET and ++ CD signals to GPIOs on your STK1000. This is necessary for ++ reset and card detection to work properly, although some CF ++ cards may be able to cope without reset. ++ ++config BOARD_ATSTK1000_CF_RESET_PIN ++ hex "CompactFlash RESET pin" ++ default 0x30 ++ depends on BOARD_ATSTK1000_CF_HACKS ++ help ++ Select which GPIO pin to use for the CompactFlash RESET ++ signal. This is specified as a hexadecimal number and should ++ be defined as 0x20 * gpio_port + pin. ++ ++ The default is 0x30, which is pin 16 on PIOB, aka GPIO14. ++ ++config BOARD_ATSTK1000_CF_DETECT_PIN ++ hex "CompactFlash DETECT pin" ++ default 0x3e ++ depends on BOARD_ATSTK1000_CF_HACKS ++ help ++ Select which GPIO pin to use for the CompactFlash CD ++ signal. This is specified as a hexadecimal number and should ++ be defined as 0x20 * gpio_port + pin. ++ ++ The default is 0x3e, which is pin 30 on PIOB, aka GPIO15. ++ ++endif # stk 1000 +diff --git a/arch/avr32/boards/atstk1000/Makefile b/arch/avr32/boards/atstk1000/Makefile +index 8e09922..beead86 100644 +--- a/arch/avr32/boards/atstk1000/Makefile ++++ b/arch/avr32/boards/atstk1000/Makefile +@@ -1,2 +1,4 @@ + obj-y += setup.o flash.o + obj-$(CONFIG_BOARD_ATSTK1002) += atstk1002.o ++obj-$(CONFIG_BOARD_ATSTK1003) += atstk1003.o ++obj-$(CONFIG_BOARD_ATSTK1004) += atstk1004.o +diff --git a/arch/avr32/boards/atstk1000/atstk1000.h b/arch/avr32/boards/atstk1000/atstk1000.h +index 9a49ed0..9392d32 100644 +--- a/arch/avr32/boards/atstk1000/atstk1000.h ++++ b/arch/avr32/boards/atstk1000/atstk1000.h +@@ -12,4 +12,6 @@ + + extern struct atmel_lcdfb_info atstk1000_lcdc_data; + ++void atstk1000_setup_j2_leds(void); ++ + #endif /* __ARCH_AVR32_BOARDS_ATSTK1000_ATSTK1000_H */ diff --git a/arch/avr32/boards/atstk1000/atstk1002.c b/arch/avr32/boards/atstk1000/atstk1002.c -index c9981b7..f7fb509 100644 +index 5be0d13..90436fa 100644 --- a/arch/avr32/boards/atstk1000/atstk1002.c +++ b/arch/avr32/boards/atstk1000/atstk1002.c -@@ -16,6 +16,7 @@ +@@ -11,7 +11,6 @@ + #include <linux/etherdevice.h> + #include <linux/init.h> + #include <linux/kernel.h> +-#include <linux/leds.h> + #include <linux/platform_device.h> #include <linux/string.h> #include <linux/types.h> - #include <linux/spi/spi.h> -+#include <linux/spi/at73c213.h> +@@ -22,7 +21,7 @@ - #include <video/atmel_lcdc.h> + #include <asm/io.h> + #include <asm/setup.h> +-#include <asm/arch/at32ap7000.h> ++#include <asm/arch/at32ap700x.h> + #include <asm/arch/board.h> + #include <asm/arch/init.h> + #include <asm/arch/portmux.h> +@@ -49,18 +48,16 @@ static struct eth_platform_data __initdata eth_data[2] = { + }, + }; + +-#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM +-#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM ++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC + static struct at73c213_board_info at73c213_data = { + .ssc_id = 0, + .shortname = "AVR32 STK1000 external DAC", + }; + #endif +-#endif -@@ -49,7 +50,25 @@ static struct eth_platform_data __initdata eth_data[2] = { +-#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM ++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM + static struct spi_board_info spi0_board_info[] __initdata = { +-#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM ++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC + { + /* AT73C213 */ + .modalias = "at73c213", +@@ -80,12 +77,25 @@ static struct spi_board_info spi0_board_info[] __initdata = { }; + #endif + +-#ifdef CONFIG_BOARD_ATSTK1002_SPI1 ++#ifdef CONFIG_BOARD_ATSTK100X_SPI1 + static struct spi_board_info spi1_board_info[] __initdata = { { + /* patch in custom entries here */ + } }; + #endif + ++static struct cf_platform_data __initdata cf0_data = { ++#ifdef CONFIG_BOARD_ATSTK1000_CF_HACKS ++ .detect_pin = CONFIG_BOARD_ATSTK1000_CF_DETECT_PIN, ++ .reset_pin = CONFIG_BOARD_ATSTK1000_CF_RESET_PIN, ++#else ++ .detect_pin = GPIO_PIN_NONE, ++ .reset_pin = GPIO_PIN_NONE, ++#endif ++ .vcc_pin = GPIO_PIN_NONE, ++ .ready_pin = GPIO_PIN_PB(27), ++ .cs = 4, ++}; ++ + /* + * The next two functions should go away as the boot loader is + * supposed to initialize the macb address registers with a valid +@@ -141,68 +151,8 @@ static void __init set_hw_addr(struct platform_device *pdev) + clk_put(pclk); + } - #ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM -+#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM +-#ifdef CONFIG_BOARD_ATSTK1002_J2_LED +- +-static struct gpio_led stk_j2_led[] = { +-#ifdef CONFIG_BOARD_ATSTK1002_J2_LED8 +-#define LEDSTRING "J2 jumpered to LED8" +- { .name = "led0:amber", .gpio = GPIO_PIN_PB( 8), }, +- { .name = "led1:amber", .gpio = GPIO_PIN_PB( 9), }, +- { .name = "led2:amber", .gpio = GPIO_PIN_PB(10), }, +- { .name = "led3:amber", .gpio = GPIO_PIN_PB(13), }, +- { .name = "led4:amber", .gpio = GPIO_PIN_PB(14), }, +- { .name = "led5:amber", .gpio = GPIO_PIN_PB(15), }, +- { .name = "led6:amber", .gpio = GPIO_PIN_PB(16), }, +- { .name = "led7:amber", .gpio = GPIO_PIN_PB(30), +- .default_trigger = "heartbeat", }, +-#else /* RGB */ +-#define LEDSTRING "J2 jumpered to RGB LEDs" +- { .name = "r1:red", .gpio = GPIO_PIN_PB( 8), }, +- { .name = "g1:green", .gpio = GPIO_PIN_PB(10), }, +- { .name = "b1:blue", .gpio = GPIO_PIN_PB(14), }, +- +- { .name = "r2:red", .gpio = GPIO_PIN_PB( 9), +- .default_trigger = "heartbeat", }, +- { .name = "g2:green", .gpio = GPIO_PIN_PB(13), }, +- { .name = "b2:blue", .gpio = GPIO_PIN_PB(15), +- .default_trigger = "heartbeat", }, +- /* PB16, PB30 unused */ +-#endif +-}; +- +-static struct gpio_led_platform_data stk_j2_led_data = { +- .num_leds = ARRAY_SIZE(stk_j2_led), +- .leds = stk_j2_led, +-}; +- +-static struct platform_device stk_j2_led_dev = { +- .name = "leds-gpio", +- .id = 2, /* gpio block J2 */ +- .dev = { +- .platform_data = &stk_j2_led_data, +- }, +-}; +- +-static void setup_j2_leds(void) +-{ +- unsigned i; +- +- for (i = 0; i < ARRAY_SIZE(stk_j2_led); i++) +- at32_select_gpio(stk_j2_led[i].gpio, AT32_GPIOF_OUTPUT); +- +- printk("STK1002: " LEDSTRING "\n"); +- platform_device_register(&stk_j2_led_dev); +-} +- +-#else +-static void setup_j2_leds(void) +-{ +-} +-#endif +- +-#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM +-#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM +-static void __init at73c213_set_clk(struct at73c213_board_info *info) ++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC ++static void __init atstk1002_setup_extdac(void) + { + struct clk *gclk; + struct clk *pll; +@@ -220,7 +170,7 @@ static void __init at73c213_set_clk(struct at73c213_board_info *info) + } + + at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0); +- info->dac_clk = gclk; ++ at73c213_data.dac_clk = gclk; + + err_set_clk: + clk_put(pll); +@@ -229,12 +179,16 @@ err_pll: + err_gclk: + return; + } +-#endif +-#endif ++#else ++static void __init atstk1002_setup_extdac(void) ++{ ++ ++} ++#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */ + + void __init setup_board(void) + { +-#ifdef CONFIG_BOARD_ATSTK1002_SW2_CUSTOM ++#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM + at32_map_usart(0, 1); /* USART 0/B: /dev/ttyS1, IRDA */ + #else + at32_map_usart(1, 0); /* USART 1/A: /dev/ttyS0, DB9 */ +@@ -271,7 +225,7 @@ static int __init atstk1002_init(void) + + at32_add_system_devices(); + +-#ifdef CONFIG_BOARD_ATSTK1002_SW2_CUSTOM ++#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM + at32_add_device_usart(1); + #else + at32_add_device_usart(0); +@@ -281,12 +235,16 @@ static int __init atstk1002_init(void) + #ifndef CONFIG_BOARD_ATSTK1002_SW6_CUSTOM + set_hw_addr(at32_add_device_eth(0, ð_data[0])); + #endif +-#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM ++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM + at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info)); + #endif +-#ifdef CONFIG_BOARD_ATSTK1002_SPI1 ++#ifdef CONFIG_BOARD_ATSTK100X_SPI1 + at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info)); + #endif ++ at32_add_device_twi(0); ++#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM ++ at32_add_device_mci(0, NULL); ++#endif + #ifdef CONFIG_BOARD_ATSTK1002_SW5_CUSTOM + set_hw_addr(at32_add_device_eth(1, ð_data[1])); + #else +@@ -294,17 +252,18 @@ static int __init atstk1002_init(void) + fbmem_start, fbmem_size); + #endif + at32_add_device_usba(0, NULL); +-#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM ++#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97 ++ at32_add_device_ac97c(0); ++#else ++ at32_add_device_abdac(0); ++#endif ++#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM + at32_add_device_ssc(0, ATMEL_SSC_TX); + #endif ++ at32_add_device_cf(0, 2, &cf0_data); + +- setup_j2_leds(); +- +-#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM +-#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM +- at73c213_set_clk(&at73c213_data); +-#endif +-#endif ++ atstk1000_setup_j2_leds(); ++ atstk1002_setup_extdac(); + + return 0; + } +diff --git a/arch/avr32/boards/atstk1000/atstk1003.c b/arch/avr32/boards/atstk1000/atstk1003.c +new file mode 100644 +index 0000000..768d204 +--- /dev/null ++++ b/arch/avr32/boards/atstk1000/atstk1003.c +@@ -0,0 +1,181 @@ ++/* ++ * ATSTK1003 daughterboard-specific init code ++ * ++ * Copyright (C) 2007 Atmel Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++#include <linux/clk.h> ++#include <linux/err.h> ++#include <linux/init.h> ++#include <linux/kernel.h> ++#include <linux/platform_device.h> ++#include <linux/string.h> ++#include <linux/types.h> ++ ++#include <linux/spi/at73c213.h> ++#include <linux/spi/spi.h> ++ ++#include <asm/setup.h> ++ ++#include <asm/arch/at32ap700x.h> ++#include <asm/arch/board.h> ++#include <asm/arch/init.h> ++#include <asm/arch/portmux.h> ++ ++#include "atstk1000.h" ++ ++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC +static struct at73c213_board_info at73c213_data = { + .ssc_id = 0, + .shortname = "AVR32 STK1000 external DAC", +}; +#endif -+#endif -+#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM - static struct spi_board_info spi0_board_info[] __initdata = { -+#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM ++ ++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM ++static struct spi_board_info spi0_board_info[] __initdata = { ++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC + { + /* AT73C213 */ + .modalias = "at73c213", @@ -335,28 +957,34 @@ index c9981b7..f7fb509 100644 + .platform_data = &at73c213_data, + }, +#endif - { - /* QVGA display */ - .modalias = "ltv350qv", -@@ -66,6 +85,11 @@ static struct spi_board_info spi1_board_info[] __initdata = { { - } }; - #endif - -+static struct mci_platform_data __initdata mci0_data = { ++ /* ++ * We can control the LTV350QV LCD panel, but it isn't much ++ * point since we don't have an LCD controller... ++ */ ++}; ++#endif ++ ++#ifdef CONFIG_BOARD_ATSTK100X_SPI1 ++static struct spi_board_info spi1_board_info[] __initdata = { { ++ /* patch in custom entries here */ ++} }; ++#endif ++ ++static struct cf_platform_data __initdata cf0_data = { ++#ifdef CONFIG_BOARD_ATSTK1000_CF_HACKS ++ .detect_pin = CONFIG_BOARD_ATSTK1000_CF_DETECT_PIN, ++ .reset_pin = CONFIG_BOARD_ATSTK1000_CF_RESET_PIN, ++#else + .detect_pin = GPIO_PIN_NONE, -+ .wp_pin = GPIO_PIN_NONE, ++ .reset_pin = GPIO_PIN_NONE, ++#endif ++ .vcc_pin = GPIO_PIN_NONE, ++ .ready_pin = GPIO_PIN_PB(27), ++ .cs = 4, +}; + - /* - * The next two functions should go away as the boot loader is - * supposed to initialize the macb address registers with a valid -@@ -180,6 +204,38 @@ static void setup_j2_leds(void) - } - #endif - -+#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM -+#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM -+static void __init at73c213_set_clk(struct at73c213_board_info *info) ++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC ++static void __init atstk1003_setup_extdac(void) +{ + struct clk *gclk; + struct clk *pll; @@ -374,7 +1002,7 @@ index c9981b7..f7fb509 100644 + } + + at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0); -+ info->dac_clk = gclk; ++ at73c213_data.dac_clk = gclk; + +err_set_clk: + clk_put(pll); @@ -383,160 +1011,516 @@ index c9981b7..f7fb509 100644 +err_gclk: + return; +} ++#else ++static void __init atstk1003_setup_extdac(void) ++{ ++ ++} ++#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */ ++ ++void __init setup_board(void) ++{ ++#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM ++ at32_map_usart(0, 1); /* USART 0/B: /dev/ttyS1, IRDA */ ++#else ++ at32_map_usart(1, 0); /* USART 1/A: /dev/ttyS0, DB9 */ +#endif ++ /* USART 2/unused: expansion connector */ ++ at32_map_usart(3, 2); /* USART 3/C: /dev/ttyS2, DB9 */ ++ ++ at32_setup_serial_console(0); ++} ++ ++static int __init atstk1003_init(void) ++{ ++ /* ++ * ATSTK1000 uses 32-bit SDRAM interface. Reserve the ++ * SDRAM-specific pins so that nobody messes with them. ++ */ ++ at32_reserve_pin(GPIO_PIN_PE(0)); /* DATA[16] */ ++ at32_reserve_pin(GPIO_PIN_PE(1)); /* DATA[17] */ ++ at32_reserve_pin(GPIO_PIN_PE(2)); /* DATA[18] */ ++ at32_reserve_pin(GPIO_PIN_PE(3)); /* DATA[19] */ ++ at32_reserve_pin(GPIO_PIN_PE(4)); /* DATA[20] */ ++ at32_reserve_pin(GPIO_PIN_PE(5)); /* DATA[21] */ ++ at32_reserve_pin(GPIO_PIN_PE(6)); /* DATA[22] */ ++ at32_reserve_pin(GPIO_PIN_PE(7)); /* DATA[23] */ ++ at32_reserve_pin(GPIO_PIN_PE(8)); /* DATA[24] */ ++ at32_reserve_pin(GPIO_PIN_PE(9)); /* DATA[25] */ ++ at32_reserve_pin(GPIO_PIN_PE(10)); /* DATA[26] */ ++ at32_reserve_pin(GPIO_PIN_PE(11)); /* DATA[27] */ ++ at32_reserve_pin(GPIO_PIN_PE(12)); /* DATA[28] */ ++ at32_reserve_pin(GPIO_PIN_PE(13)); /* DATA[29] */ ++ at32_reserve_pin(GPIO_PIN_PE(14)); /* DATA[30] */ ++ at32_reserve_pin(GPIO_PIN_PE(15)); /* DATA[31] */ ++ at32_reserve_pin(GPIO_PIN_PE(26)); /* SDCS */ ++ ++ at32_add_system_devices(); ++ ++#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM ++ at32_add_device_usart(1); ++#else ++ at32_add_device_usart(0); +#endif ++ at32_add_device_usart(2); + - void __init setup_board(void) - { - #ifdef CONFIG_BOARD_ATSTK1002_SW2_CUSTOM -@@ -235,18 +291,34 @@ static int __init atstk1002_init(void) - #ifdef CONFIG_BOARD_ATSTK1002_SPI1 - at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info)); - #endif -+ at32_add_device_twi(0); -+#ifndef CONFIG_BOARD_ATSTK1002_SW2_CUSTOM -+ at32_add_device_mci(0, &mci0_data); ++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM ++ at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info)); ++#endif ++#ifdef CONFIG_BOARD_ATSTK100X_SPI1 ++ at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info)); ++#endif ++#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM ++ at32_add_device_mci(0, NULL); +#endif - #ifdef CONFIG_BOARD_ATSTK1002_SW5_CUSTOM - set_hw_addr(at32_add_device_eth(1, ð_data[1])); - #else - at32_add_device_lcdc(0, &atstk1000_lcdc_data, - fbmem_start, fbmem_size); - #endif + at32_add_device_usba(0, NULL); -+#ifdef CONFIG_BOARD_ATSTK1002_ENABLE_AC97 ++#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97 + at32_add_device_ac97c(0); +#else + at32_add_device_abdac(0); +#endif - #ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM - at32_add_device_ssc(0, ATMEL_SSC_TX); - #endif - - setup_j2_leds(); - -+#ifndef CONFIG_BOARD_ATSTK1002_SW3_CUSTOM -+#ifndef CONFIG_BOARD_ATSTK1002_SW1_CUSTOM -+ at73c213_set_clk(&at73c213_data); ++#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM ++ at32_add_device_ssc(0, ATMEL_SSC_TX); +#endif ++ at32_add_device_cf(0, 2, &cf0_data); ++ ++ atstk1000_setup_j2_leds(); ++ atstk1003_setup_extdac(); ++ ++ return 0; ++} ++postcore_initcall(atstk1003_init); +diff --git a/arch/avr32/boards/atstk1000/atstk1004.c b/arch/avr32/boards/atstk1000/atstk1004.c +new file mode 100644 +index 0000000..96015dd +--- /dev/null ++++ b/arch/avr32/boards/atstk1000/atstk1004.c +@@ -0,0 +1,152 @@ ++/* ++ * ATSTK1003 daughterboard-specific init code ++ * ++ * Copyright (C) 2007 Atmel Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++#include <linux/clk.h> ++#include <linux/err.h> ++#include <linux/init.h> ++#include <linux/kernel.h> ++#include <linux/platform_device.h> ++#include <linux/string.h> ++#include <linux/types.h> ++ ++#include <linux/spi/at73c213.h> ++#include <linux/spi/spi.h> ++ ++#include <video/atmel_lcdc.h> ++ ++#include <asm/setup.h> ++ ++#include <asm/arch/at32ap700x.h> ++#include <asm/arch/board.h> ++#include <asm/arch/init.h> ++#include <asm/arch/portmux.h> ++ ++#include "atstk1000.h" ++ ++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC ++static struct at73c213_board_info at73c213_data = { ++ .ssc_id = 0, ++ .shortname = "AVR32 STK1000 external DAC", ++}; +#endif + - return 0; - } - postcore_initcall(atstk1002_init); -diff --git a/arch/avr32/boards/atstk1000/flash.c b/arch/avr32/boards/atstk1000/flash.c -index aac4300..3d0a102 100644 ---- a/arch/avr32/boards/atstk1000/flash.c -+++ b/arch/avr32/boards/atstk1000/flash.c -@@ -15,7 +15,7 @@ - - #include <asm/arch/smc.h> - --static struct smc_config flash_config __initdata = { -+static struct smc_timing flash_timing __initdata = { - .ncs_read_setup = 0, - .nrd_setup = 40, - .ncs_write_setup = 0, -@@ -28,7 +28,9 @@ static struct smc_config flash_config __initdata = { - - .read_cycle = 120, - .write_cycle = 120, -+}; - -+static struct smc_config flash_config __initdata = { - .bus_width = 2, - .nrd_controlled = 1, - .nwe_controlled = 1, -@@ -82,6 +84,7 @@ static int __init atstk1000_flash_init(void) - { - int ret; ++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM ++static struct spi_board_info spi0_board_info[] __initdata = { ++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC ++ { ++ /* AT73C213 */ ++ .modalias = "at73c213", ++ .max_speed_hz = 200000, ++ .chip_select = 0, ++ .mode = SPI_MODE_1, ++ .platform_data = &at73c213_data, ++ }, ++#endif ++ { ++ /* QVGA display */ ++ .modalias = "ltv350qv", ++ .max_speed_hz = 16000000, ++ .chip_select = 1, ++ .mode = SPI_MODE_3, ++ }, ++}; ++#endif ++ ++#ifdef CONFIG_BOARD_ATSTK100X_SPI1 ++static struct spi_board_info spi1_board_info[] __initdata = { { ++ /* patch in custom entries here */ ++} }; ++#endif ++ ++#ifdef CONFIG_BOARD_ATSTK1000_EXTDAC ++static void __init atstk1004_setup_extdac(void) ++{ ++ struct clk *gclk; ++ struct clk *pll; ++ ++ gclk = clk_get(NULL, "gclk0"); ++ if (IS_ERR(gclk)) ++ goto err_gclk; ++ pll = clk_get(NULL, "pll0"); ++ if (IS_ERR(pll)) ++ goto err_pll; ++ ++ if (clk_set_parent(gclk, pll)) { ++ pr_debug("STK1000: failed to set pll0 as parent for DAC clock\n"); ++ goto err_set_clk; ++ } ++ ++ at32_select_periph(GPIO_PIN_PA(30), GPIO_PERIPH_A, 0); ++ at73c213_data.dac_clk = gclk; ++ ++err_set_clk: ++ clk_put(pll); ++err_pll: ++ clk_put(gclk); ++err_gclk: ++ return; ++} ++#else ++static void __init atstk1004_setup_extdac(void) ++{ ++ ++} ++#endif /* CONFIG_BOARD_ATSTK1000_EXTDAC */ ++ ++void __init setup_board(void) ++{ ++#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM ++ at32_map_usart(0, 1); /* USART 0/B: /dev/ttyS1, IRDA */ ++#else ++ at32_map_usart(1, 0); /* USART 1/A: /dev/ttyS0, DB9 */ ++#endif ++ /* USART 2/unused: expansion connector */ ++ at32_map_usart(3, 2); /* USART 3/C: /dev/ttyS2, DB9 */ ++ ++ at32_setup_serial_console(0); ++} ++ ++static int __init atstk1004_init(void) ++{ ++ at32_add_system_devices(); ++ ++#ifdef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM ++ at32_add_device_usart(1); ++#else ++ at32_add_device_usart(0); ++#endif ++ at32_add_device_usart(2); ++ ++#ifndef CONFIG_BOARD_ATSTK100X_SW1_CUSTOM ++ at32_add_device_spi(0, spi0_board_info, ARRAY_SIZE(spi0_board_info)); ++#endif ++#ifdef CONFIG_BOARD_ATSTK100X_SPI1 ++ at32_add_device_spi(1, spi1_board_info, ARRAY_SIZE(spi1_board_info)); ++#endif ++#ifndef CONFIG_BOARD_ATSTK100X_SW2_CUSTOM ++ at32_add_device_mci(0, NULL); ++#endif ++ at32_add_device_lcdc(0, &atstk1000_lcdc_data, ++ fbmem_start, fbmem_size); ++ at32_add_device_usba(0, NULL); ++#ifdef CONFIG_BOARD_ATSTK100X_ENABLE_AC97 ++ at32_add_device_ac97c(0); ++#else ++ at32_add_device_abdac(0); ++#endif ++#ifndef CONFIG_BOARD_ATSTK100X_SW3_CUSTOM ++ at32_add_device_ssc(0, ATMEL_SSC_TX); ++#endif ++ ++ atstk1000_setup_j2_leds(); ++ atstk1004_setup_extdac(); ++ ++ return 0; ++} ++postcore_initcall(atstk1004_init); +diff --git a/arch/avr32/boards/atstk1000/setup.c b/arch/avr32/boards/atstk1000/setup.c +index c9af409..8bedf93 100644 +--- a/arch/avr32/boards/atstk1000/setup.c ++++ b/arch/avr32/boards/atstk1000/setup.c +@@ -10,13 +10,17 @@ + #include <linux/bootmem.h> + #include <linux/fb.h> + #include <linux/init.h> ++#include <linux/platform_device.h> + #include <linux/types.h> + #include <linux/linkage.h> + + #include <video/atmel_lcdc.h> + + #include <asm/setup.h> ++ ++#include <asm/arch/at32ap700x.h> + #include <asm/arch/board.h> ++#include <asm/arch/portmux.h> + + #include "atstk1000.h" -+ smc_set_timing(&flash_config, &flash_timing); - ret = smc_set_configuration(0, &flash_config); - if (ret < 0) { - printk(KERN_ERR "atstk1000: failed to set NOR flash timing\n"); +@@ -61,3 +65,63 @@ struct atmel_lcdfb_info __initdata atstk1000_lcdc_data = { + .default_monspecs = &atstk1000_default_monspecs, + .guard_time = 2, + }; ++ ++#ifdef CONFIG_BOARD_ATSTK1000_J2_LED ++#include <linux/leds.h> ++ ++static struct gpio_led stk1000_j2_led[] = { ++#ifdef CONFIG_BOARD_ATSTK1000_J2_LED8 ++#define LEDSTRING "J2 jumpered to LED8" ++ { .name = "led0:amber", .gpio = GPIO_PIN_PB( 8), }, ++ { .name = "led1:amber", .gpio = GPIO_PIN_PB( 9), }, ++ { .name = "led2:amber", .gpio = GPIO_PIN_PB(10), }, ++ { .name = "led3:amber", .gpio = GPIO_PIN_PB(13), }, ++ { .name = "led4:amber", .gpio = GPIO_PIN_PB(14), }, ++ { .name = "led5:amber", .gpio = GPIO_PIN_PB(15), }, ++ { .name = "led6:amber", .gpio = GPIO_PIN_PB(16), }, ++ { .name = "led7:amber", .gpio = GPIO_PIN_PB(30), ++ .default_trigger = "heartbeat", }, ++#else /* RGB */ ++#define LEDSTRING "J2 jumpered to RGB LEDs" ++ { .name = "r1:red", .gpio = GPIO_PIN_PB( 8), }, ++ { .name = "g1:green", .gpio = GPIO_PIN_PB(10), }, ++ { .name = "b1:blue", .gpio = GPIO_PIN_PB(14), }, ++ ++ { .name = "r2:red", .gpio = GPIO_PIN_PB( 9), ++ .default_trigger = "heartbeat", }, ++ { .name = "g2:green", .gpio = GPIO_PIN_PB(13), }, ++ { .name = "b2:blue", .gpio = GPIO_PIN_PB(15), ++ .default_trigger = "heartbeat", }, ++ /* PB16, PB30 unused */ ++#endif ++}; ++ ++static struct gpio_led_platform_data stk1000_j2_led_data = { ++ .num_leds = ARRAY_SIZE(stk1000_j2_led), ++ .leds = stk1000_j2_led, ++}; ++ ++static struct platform_device stk1000_j2_led_dev = { ++ .name = "leds-gpio", ++ .id = 2, /* gpio block J2 */ ++ .dev = { ++ .platform_data = &stk1000_j2_led_data, ++ }, ++}; ++ ++void __init atstk1000_setup_j2_leds(void) ++{ ++ unsigned i; ++ ++ for (i = 0; i < ARRAY_SIZE(stk1000_j2_led); i++) ++ at32_select_gpio(stk1000_j2_led[i].gpio, AT32_GPIOF_OUTPUT); ++ ++ printk("STK1000: " LEDSTRING "\n"); ++ platform_device_register(&stk1000_j2_led_dev); ++} ++#else /* CONFIG_BOARD_ATSTK1000_J2_LED */ ++void __init atstk1000_setup_j2_leds(void) ++{ ++ ++} ++#endif /* CONFIG_BOARD_ATSTK1000_J2_LED */ diff --git a/arch/avr32/configs/atngw100_defconfig b/arch/avr32/configs/atngw100_defconfig -index b799a68..adce168 100644 +index b799a68..2ddc6f5 100644 --- a/arch/avr32/configs/atngw100_defconfig +++ b/arch/avr32/configs/atngw100_defconfig -@@ -1,7 +1,7 @@ +@@ -1,46 +1,51 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.22-rc5 -# Sat Jun 23 15:40:05 2007 -+# Linux kernel version: 2.6.22.atmel.1 -+# Thu Jul 12 17:49:20 2007 ++# Linux kernel version: 2.6.24 ++# Tue Feb 5 16:37:27 2008 # CONFIG_AVR32=y CONFIG_GENERIC_GPIO=y -@@ -114,6 +114,7 @@ CONFIG_PLATFORM_AT32AP=y + CONFIG_GENERIC_HARDIRQS=y ++CONFIG_STACKTRACE_SUPPORT=y ++CONFIG_LOCKDEP_SUPPORT=y ++CONFIG_TRACE_IRQFLAGS_SUPPORT=y + CONFIG_HARDIRQS_SW_RESEND=y + CONFIG_GENERIC_IRQ_PROBE=y + CONFIG_RWSEM_GENERIC_SPINLOCK=y + CONFIG_GENERIC_TIME=y ++# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set + # CONFIG_ARCH_HAS_ILOG2_U32 is not set + # CONFIG_ARCH_HAS_ILOG2_U64 is not set ++CONFIG_ARCH_SUPPORTS_OPROFILE=y + CONFIG_GENERIC_HWEIGHT=y + CONFIG_GENERIC_CALIBRATE_DELAY=y + CONFIG_GENERIC_BUG=y + CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + + # +-# Code maturity level options ++# General setup + # + CONFIG_EXPERIMENTAL=y + CONFIG_BROKEN_ON_SMP=y + CONFIG_INIT_ENV_ARG_LIMIT=32 +- +-# +-# General setup +-# + CONFIG_LOCALVERSION="" + # CONFIG_LOCALVERSION_AUTO is not set + CONFIG_SWAP=y + CONFIG_SYSVIPC=y +-# CONFIG_IPC_NS is not set + CONFIG_SYSVIPC_SYSCTL=y + CONFIG_POSIX_MQUEUE=y + CONFIG_BSD_PROCESS_ACCT=y + CONFIG_BSD_PROCESS_ACCT_V3=y + # CONFIG_TASKSTATS is not set +-# CONFIG_UTS_NS is not set ++# CONFIG_USER_NS is not set ++# CONFIG_PID_NS is not set + # CONFIG_AUDIT is not set + # CONFIG_IKCONFIG is not set + CONFIG_LOG_BUF_SHIFT=14 ++# CONFIG_CGROUPS is not set ++CONFIG_FAIR_GROUP_SCHED=y ++CONFIG_FAIR_USER_SCHED=y ++# CONFIG_FAIR_CGROUP_SCHED is not set + CONFIG_SYSFS_DEPRECATED=y + # CONFIG_RELAY is not set + CONFIG_BLK_DEV_INITRD=y +@@ -61,35 +66,28 @@ CONFIG_FUTEX=y + CONFIG_ANON_INODES=y + CONFIG_EPOLL=y + CONFIG_SIGNALFD=y +-CONFIG_TIMERFD=y + CONFIG_EVENTFD=y + CONFIG_SHMEM=y + CONFIG_VM_EVENT_COUNTERS=y +-# CONFIG_SLUB_DEBUG is not set ++CONFIG_SLUB_DEBUG=y + # CONFIG_SLAB is not set + CONFIG_SLUB=y + # CONFIG_SLOB is not set ++CONFIG_SLABINFO=y + CONFIG_RT_MUTEXES=y + # CONFIG_TINY_SHMEM is not set + CONFIG_BASE_SMALL=1 +- +-# +-# Loadable module support +-# + CONFIG_MODULES=y + CONFIG_MODULE_UNLOAD=y + CONFIG_MODULE_FORCE_UNLOAD=y + # CONFIG_MODVERSIONS is not set + # CONFIG_MODULE_SRCVERSION_ALL is not set + CONFIG_KMOD=y +- +-# +-# Block layer +-# + CONFIG_BLOCK=y + # CONFIG_LBD is not set + # CONFIG_BLK_DEV_IO_TRACE is not set + # CONFIG_LSF is not set ++# CONFIG_BLK_DEV_BSG is not set + + # + # IO Schedulers +@@ -111,17 +109,20 @@ CONFIG_SUBARCH_AVR32B=y + CONFIG_MMU=y + CONFIG_PERFORMANCE_COUNTERS=y + CONFIG_PLATFORM_AT32AP=y ++CONFIG_CPU_AT32AP700X=y CONFIG_CPU_AT32AP7000=y # CONFIG_BOARD_ATSTK1000 is not set CONFIG_BOARD_ATNGW100=y -+# CONFIG_BOARD_ATNGW100_I2C_GPIO is not set ++CONFIG_BOARD_ATNGW100_I2C_GPIO=y CONFIG_LOADER_U_BOOT=y # -@@ -122,6 +123,7 @@ CONFIG_LOADER_U_BOOT=y - # CONFIG_AP7000_32_BIT_SMC is not set - CONFIG_AP7000_16_BIT_SMC=y - # CONFIG_AP7000_8_BIT_SMC is not set + # Atmel AVR32 AP options + # +-# CONFIG_AP7000_32_BIT_SMC is not set +-CONFIG_AP7000_16_BIT_SMC=y +-# CONFIG_AP7000_8_BIT_SMC is not set ++# CONFIG_AP700X_32_BIT_SMC is not set ++CONFIG_AP700X_16_BIT_SMC=y ++# CONFIG_AP700X_8_BIT_SMC is not set +CONFIG_GPIO_DEV=y CONFIG_LOAD_ADDRESS=0x10000000 CONFIG_ENTRY_ADDRESS=0x90000000 CONFIG_PHYS_OFFSET=0x10000000 -@@ -145,6 +147,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4 +@@ -141,10 +142,14 @@ CONFIG_FLATMEM_MANUAL=y + CONFIG_FLATMEM=y + CONFIG_FLAT_NODE_MEM_MAP=y + # CONFIG_SPARSEMEM_STATIC is not set ++# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set + CONFIG_SPLIT_PTLOCK_CPUS=4 # CONFIG_RESOURCES_64BIT is not set CONFIG_ZONE_DMA_FLAG=0 ++CONFIG_VIRT_TO_BUS=y # CONFIG_OWNERSHIP_TRACE is not set ++# CONFIG_NMI_DEBUGGING is not set +CONFIG_DW_DMAC=y # CONFIG_HZ_100 is not set CONFIG_HZ_250=y # CONFIG_HZ_300 is not set -@@ -153,6 +156,27 @@ CONFIG_HZ=250 +@@ -153,13 +158,31 @@ CONFIG_HZ=250 CONFIG_CMDLINE="" # -+# Power managment options -+# -+ -+# +-# Bus options ++# Power management options + # +-# CONFIG_ARCH_SUPPORTS_MSI is not set + + # +-# PCCARD (PCMCIA/CardBus) support +# CPU Frequency scaling -+# + # +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_TABLE=y +# CONFIG_CPU_FREQ_DEBUG is not set -+CONFIG_CPU_FREQ_STAT=m -+# CONFIG_CPU_FREQ_STAT_DETAILS is not set ++# CONFIG_CPU_FREQ_STAT is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set ++# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set ++# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -+CONFIG_CPU_FREQ_GOV_POWERSAVE=y ++# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_AT32AP=y + +# - # Bus options ++# Bus options ++# ++# CONFIG_ARCH_SUPPORTS_MSI is not set + # CONFIG_PCCARD is not set + # - # CONFIG_ARCH_SUPPORTS_MSI is not set -@@ -187,13 +211,8 @@ CONFIG_NET_KEY=y - # CONFIG_NET_KEY_MIGRATE is not set - CONFIG_INET=y - CONFIG_IP_MULTICAST=y --CONFIG_IP_ADVANCED_ROUTER=y --CONFIG_ASK_IP_FIB_HASH=y --# CONFIG_IP_FIB_TRIE is not set -+# CONFIG_IP_ADVANCED_ROUTER is not set - CONFIG_IP_FIB_HASH=y --# CONFIG_IP_MULTIPLE_TABLES is not set --# CONFIG_IP_ROUTE_MULTIPATH is not set --# CONFIG_IP_ROUTE_VERBOSE is not set - CONFIG_IP_PNP=y - CONFIG_IP_PNP_DHCP=y - # CONFIG_IP_PNP_BOOTP is not set -@@ -240,6 +259,7 @@ CONFIG_IPV6_SIT=y +@@ -213,6 +236,7 @@ CONFIG_INET_TUNNEL=y + CONFIG_INET_XFRM_MODE_TRANSPORT=y + CONFIG_INET_XFRM_MODE_TUNNEL=y + CONFIG_INET_XFRM_MODE_BEET=y ++# CONFIG_INET_LRO is not set + CONFIG_INET_DIAG=y + CONFIG_INET_TCP_DIAG=y + # CONFIG_TCP_CONG_ADVANCED is not set +@@ -240,6 +264,7 @@ CONFIG_IPV6_SIT=y # CONFIG_NETWORK_SECMARK is not set CONFIG_NETFILTER=y # CONFIG_NETFILTER_DEBUG is not set @@ -544,7 +1528,27 @@ index b799a68..adce168 100644 # # Core Netfilter Configuration -@@ -284,6 +304,7 @@ CONFIG_NETFILTER_XT_MATCH_MAC=m +@@ -252,6 +277,7 @@ CONFIG_NF_CONNTRACK_MARK=y + # CONFIG_NF_CONNTRACK_EVENTS is not set + CONFIG_NF_CT_PROTO_GRE=m + # CONFIG_NF_CT_PROTO_SCTP is not set ++# CONFIG_NF_CT_PROTO_UDPLITE is not set + CONFIG_NF_CONNTRACK_AMANDA=m + CONFIG_NF_CONNTRACK_FTP=m + CONFIG_NF_CONNTRACK_H323=m +@@ -269,9 +295,11 @@ CONFIG_NETFILTER_XT_TARGET_MARK=m + CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m + CONFIG_NETFILTER_XT_TARGET_NFLOG=m + # CONFIG_NETFILTER_XT_TARGET_NOTRACK is not set ++# CONFIG_NETFILTER_XT_TARGET_TRACE is not set + CONFIG_NETFILTER_XT_TARGET_TCPMSS=m + CONFIG_NETFILTER_XT_MATCH_COMMENT=m + CONFIG_NETFILTER_XT_MATCH_CONNBYTES=m ++# CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set + CONFIG_NETFILTER_XT_MATCH_CONNMARK=m + CONFIG_NETFILTER_XT_MATCH_CONNTRACK=m + # CONFIG_NETFILTER_XT_MATCH_DCCP is not set +@@ -284,6 +312,7 @@ CONFIG_NETFILTER_XT_MATCH_MAC=m CONFIG_NETFILTER_XT_MATCH_MARK=m CONFIG_NETFILTER_XT_MATCH_POLICY=m CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m @@ -552,7 +1556,16 @@ index b799a68..adce168 100644 CONFIG_NETFILTER_XT_MATCH_PKTTYPE=m CONFIG_NETFILTER_XT_MATCH_QUOTA=m CONFIG_NETFILTER_XT_MATCH_REALM=m -@@ -359,13 +380,19 @@ CONFIG_IP6_NF_TARGET_REJECT=m +@@ -292,6 +321,8 @@ CONFIG_NETFILTER_XT_MATCH_STATE=m + CONFIG_NETFILTER_XT_MATCH_STATISTIC=m + CONFIG_NETFILTER_XT_MATCH_STRING=m + CONFIG_NETFILTER_XT_MATCH_TCPMSS=m ++# CONFIG_NETFILTER_XT_MATCH_TIME is not set ++# CONFIG_NETFILTER_XT_MATCH_U32 is not set + CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m + + # +@@ -359,13 +390,19 @@ CONFIG_IP6_NF_TARGET_REJECT=m CONFIG_IP6_NF_MANGLE=m CONFIG_IP6_NF_TARGET_HL=m CONFIG_IP6_NF_RAW=m @@ -573,19 +1586,123 @@ index b799a68..adce168 100644 # CONFIG_LLC2 is not set # CONFIG_IPX is not set # CONFIG_ATALK is not set -@@ -521,7 +548,6 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 +@@ -373,10 +410,6 @@ CONFIG_VLAN_8021Q=m + # CONFIG_LAPB is not set + # CONFIG_ECONET is not set + # CONFIG_WAN_ROUTER is not set +- +-# +-# QoS and/or fair queueing +-# + # CONFIG_NET_SCHED is not set + CONFIG_NET_CLS_ROUTE=y + +@@ -384,6 +417,7 @@ CONFIG_NET_CLS_ROUTE=y + # Network testing # - # Misc devices + # CONFIG_NET_PKTGEN is not set ++# CONFIG_NET_TCPPROBE is not set + # CONFIG_HAMRADIO is not set + # CONFIG_IRDA is not set + # CONFIG_BT is not set +@@ -397,6 +431,7 @@ CONFIG_NET_CLS_ROUTE=y + # CONFIG_MAC80211 is not set + # CONFIG_IEEE80211 is not set + # CONFIG_RFKILL is not set ++# CONFIG_NET_9P is not set + # + # Device Drivers +@@ -405,16 +440,13 @@ CONFIG_NET_CLS_ROUTE=y + # + # Generic Driver Options + # ++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" + CONFIG_STANDALONE=y + # CONFIG_PREVENT_FIRMWARE_BUILD is not set + # CONFIG_FW_LOADER is not set + # CONFIG_DEBUG_DRIVER is not set + # CONFIG_DEBUG_DEVRES is not set + # CONFIG_SYS_HYPERVISOR is not set +- +-# +-# Connector - unified userspace <-> kernelspace linker +-# + # CONFIG_CONNECTOR is not set + CONFIG_MTD=y + # CONFIG_MTD_DEBUG is not set +@@ -434,6 +466,7 @@ CONFIG_MTD_BLOCK=y + # CONFIG_INFTL is not set + # CONFIG_RFD_FTL is not set + # CONFIG_SSFDC is not set ++# CONFIG_MTD_OOPS is not set + + # + # RAM/ROM/Flash chip drivers +@@ -493,20 +526,8 @@ CONFIG_MTD_DATAFLASH=y + # UBI - Unsorted block images + # + # CONFIG_MTD_UBI is not set +- +-# +-# Parallel port support +-# + # CONFIG_PARPORT is not set +- +-# +-# Plug and Play support +-# +-# CONFIG_PNPACPI is not set +- +-# +-# Block devices +-# ++CONFIG_BLK_DEV=y + # CONFIG_BLK_DEV_COW_COMMON is not set + CONFIG_BLK_DEV_LOOP=m + # CONFIG_BLK_DEV_CRYPTOLOOP is not set +@@ -517,11 +538,7 @@ CONFIG_BLK_DEV_RAM_SIZE=4096 + CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 + # CONFIG_CDROM_PKTCDVD is not set + # CONFIG_ATA_OVER_ETH is not set +- +-# +-# Misc devices +-# -# CONFIG_BLINK is not set ++# CONFIG_MISC_DEVICES is not set # CONFIG_IDE is not set # -@@ -545,13 +571,26 @@ CONFIG_NETDEVICES=y +@@ -529,30 +546,42 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 + # + # CONFIG_RAID_ATTRS is not set + # CONFIG_SCSI is not set ++# CONFIG_SCSI_DMA is not set + # CONFIG_SCSI_NETLINK is not set + # CONFIG_ATA is not set +- +-# +-# Multi-device support (RAID and LVM) +-# + # CONFIG_MD is not set +- +-# +-# Network device support +-# + CONFIG_NETDEVICES=y ++# CONFIG_NETDEVICES_MULTIQUEUE is not set + # CONFIG_DUMMY is not set # CONFIG_BONDING is not set ++# CONFIG_MACVLAN is not set # CONFIG_EQUALIZER is not set CONFIG_TUN=m -# CONFIG_PHYLIB is not set +- +-# +-# Ethernet (10 or 100Mbit) +-# ++# CONFIG_VETH is not set +CONFIG_PHYLIB=y + +# @@ -599,46 +1716,76 @@ index b799a68..adce168 100644 +# CONFIG_VITESSE_PHY is not set +# CONFIG_SMSC_PHY is not set +# CONFIG_BROADCOM_PHY is not set ++# CONFIG_ICPLUS_PHY is not set +# CONFIG_FIXED_PHY is not set - - # - # Ethernet (10 or 100Mbit) - # ++# CONFIG_MDIO_BITBANG is not set CONFIG_NET_ETHERNET=y -CONFIG_MII=y +# CONFIG_MII is not set CONFIG_MACB=y ++# CONFIG_IBM_NEW_EMAC_ZMII is not set ++# CONFIG_IBM_NEW_EMAC_RGMII is not set ++# CONFIG_IBM_NEW_EMAC_TAH is not set ++# CONFIG_IBM_NEW_EMAC_EMAC4 is not set ++# CONFIG_B44 is not set # CONFIG_NETDEV_1000 is not set # CONFIG_NETDEV_10000 is not set -@@ -625,7 +664,15 @@ CONFIG_UNIX98_PTYS=y - # IPMI + +@@ -571,21 +600,14 @@ CONFIG_PPP_DEFLATE=m + CONFIG_PPP_BSDCOMP=m + CONFIG_PPP_MPPE=m + CONFIG_PPPOE=m ++# CONFIG_PPPOL2TP is not set + # CONFIG_SLIP is not set + CONFIG_SLHC=m + # CONFIG_SHAPER is not set + # CONFIG_NETCONSOLE is not set + # CONFIG_NETPOLL is not set + # CONFIG_NET_POLL_CONTROLLER is not set +- +-# +-# ISDN subsystem +-# + # CONFIG_ISDN is not set +- +-# +-# Telephony Support +-# + # CONFIG_PHONE is not set + + # +@@ -615,28 +637,57 @@ CONFIG_SLHC=m # + CONFIG_SERIAL_ATMEL=y + CONFIG_SERIAL_ATMEL_CONSOLE=y ++CONFIG_SERIAL_ATMEL_PDC=y + # CONFIG_SERIAL_ATMEL_TTYAT is not set + CONFIG_SERIAL_CORE=y + CONFIG_SERIAL_CORE_CONSOLE=y + CONFIG_UNIX98_PTYS=y + # CONFIG_LEGACY_PTYS is not set +- +-# +-# IPMI +-# # CONFIG_IPMI_HANDLER is not set -# CONFIG_WATCHDOG is not set -+CONFIG_WATCHDOG=y -+# CONFIG_WATCHDOG_NOWAYOUT is not set -+ -+# -+# Watchdog Device Drivers -+# -+# CONFIG_SOFT_WATCHDOG is not set -+CONFIG_AT32AP700X_WDT=y -+CONFIG_AT32AP700X_WDT_TIMEOUT=2 # CONFIG_HW_RANDOM is not set # CONFIG_RTC is not set # CONFIG_GEN_RTC is not set -@@ -636,7 +683,42 @@ CONFIG_UNIX98_PTYS=y - # TPM devices - # - # CONFIG_TCG_TPM is not set --# CONFIG_I2C is not set + # CONFIG_R3964 is not set + # CONFIG_RAW_DRIVER is not set ++# CONFIG_TCG_TPM is not set +CONFIG_I2C=m +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=m -+ -+# + + # +-# TPM devices +# I2C Algorithms -+# + # +-# CONFIG_TCG_TPM is not set +-# CONFIG_I2C is not set +CONFIG_I2C_ALGOBIT=m +# CONFIG_I2C_ALGOPCF is not set +# CONFIG_I2C_ALGOPCA is not set @@ -647,11 +1794,11 @@ index b799a68..adce168 100644 +# I2C Hardware Bus support +# +CONFIG_I2C_ATMELTWI=m -+CONFIG_I2C_ATMELTWI_BAUDRATE=100000 +CONFIG_I2C_GPIO=m +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_SIMTEC is not set ++# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_STUB is not set + +# @@ -659,11 +1806,13 @@ index b799a68..adce168 100644 +# +# CONFIG_SENSORS_DS1337 is not set +# CONFIG_SENSORS_DS1374 is not set ++# CONFIG_DS1682 is not set +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_SENSORS_PCA9539 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_MAX6875 is not set ++# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set @@ -671,32 +1820,89 @@ index b799a68..adce168 100644 # # SPI support -@@ -655,7 +737,7 @@ CONFIG_SPI_ATMEL=y +@@ -655,13 +706,25 @@ CONFIG_SPI_ATMEL=y # SPI Protocol Masters # # CONFIG_SPI_AT25 is not set -# CONFIG_SPI_SPIDEV is not set +CONFIG_SPI_SPIDEV=m ++# CONFIG_SPI_TLE62X0 is not set ++# CONFIG_W1 is not set ++# CONFIG_POWER_SUPPLY is not set ++# CONFIG_HWMON is not set ++CONFIG_WATCHDOG=y ++# CONFIG_WATCHDOG_NOWAYOUT is not set + + # +-# Dallas's 1-wire bus ++# Watchdog Device Drivers + # +-# CONFIG_W1 is not set +-# CONFIG_HWMON is not set ++# CONFIG_SOFT_WATCHDOG is not set ++CONFIG_AT32AP700X_WDT=y ++ ++# ++# Sonics Silicon Backplane ++# ++CONFIG_SSB_POSSIBLE=y ++# CONFIG_SSB is not set + + # + # Multifunction device drivers +@@ -678,23 +741,21 @@ CONFIG_SPI_ATMEL=y + # + # Graphics support + # ++# CONFIG_VGASTATE is not set ++# CONFIG_VIDEO_OUTPUT_CONTROL is not set ++# CONFIG_FB is not set + # CONFIG_BACKLIGHT_LCD_SUPPORT is not set # - # Dallas's 1-wire bus -@@ -706,8 +788,41 @@ CONFIG_SPI_ATMEL=y + # Display device support + # + # CONFIG_DISPLAY_SUPPORT is not set +-# CONFIG_VGASTATE is not set +-# CONFIG_FB is not set + + # + # Sound + # + # CONFIG_SOUND is not set +- +-# +-# USB support +-# ++CONFIG_USB_SUPPORT=y + # CONFIG_USB_ARCH_HAS_HCD is not set + # CONFIG_USB_ARCH_HAS_OHCI is not set + # CONFIG_USB_ARCH_HAS_EHCI is not set +@@ -706,12 +767,48 @@ CONFIG_SPI_ATMEL=y # # USB Gadget Support # -# CONFIG_USB_GADGET is not set -# CONFIG_MMC is not set +- +-# +-# LED devices +-# +CONFIG_USB_GADGET=y ++# CONFIG_USB_GADGET_DEBUG is not set +# CONFIG_USB_GADGET_DEBUG_FILES is not set +CONFIG_USB_GADGET_SELECTED=y ++# CONFIG_USB_GADGET_AMD5536UDC is not set ++CONFIG_USB_GADGET_ATMEL_USBA=y ++CONFIG_USB_ATMEL_USBA=y +# CONFIG_USB_GADGET_FSL_USB2 is not set +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_PXA2XX is not set ++# CONFIG_USB_GADGET_M66592 is not set +# CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_LH7A40X is not set -+CONFIG_USB_GADGET_ATMEL_USBA=y -+CONFIG_USB_ATMEL_USBA=y +# CONFIG_USB_GADGET_OMAP is not set ++# CONFIG_USB_GADGET_S3C2410 is not set +# CONFIG_USB_GADGET_AT91 is not set +# CONFIG_USB_GADGET_DUMMY_HCD is not set +CONFIG_USB_GADGET_DUALSPEED=y @@ -716,31 +1922,26 @@ index b799a68..adce168 100644 +# MMC/SD Card Drivers +# +CONFIG_MMC_BLOCK=y ++# CONFIG_MMC_BLOCK_BOUNCE is not set ++# CONFIG_SDIO_UART is not set + +# +# MMC/SD Host Controller Drivers +# +CONFIG_MMC_ATMELMCI=y ++CONFIG_MMC_SPI=m + CONFIG_NEW_LEDS=y + CONFIG_LEDS_CLASS=y - # - # LED devices -@@ -727,27 +842,62 @@ CONFIG_LEDS_TRIGGERS=y +@@ -726,53 +823,71 @@ CONFIG_LEDS_GPIO=y + CONFIG_LEDS_TRIGGERS=y CONFIG_LEDS_TRIGGER_TIMER=y CONFIG_LEDS_TRIGGER_HEARTBEAT=y - -+# -+# InfiniBand support -+# - - # +- +- +-# -# LED drivers -+# EDAC - error detection and reporting (RAS) (EXPERIMENTAL) - # - - # --# LED Triggers -+# Real Time Clock - # +-# +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y +CONFIG_RTC_HCTOSYS=y @@ -748,6 +1949,10 @@ index b799a68..adce168 100644 +# CONFIG_RTC_DEBUG is not set # +-# LED Triggers +-# +- +-# -# InfiniBand support +# RTC interfaces # @@ -762,6 +1967,7 @@ index b799a68..adce168 100644 +# I2C RTC drivers # +# CONFIG_RTC_DRV_DS1307 is not set ++# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set @@ -769,31 +1975,58 @@ index b799a68..adce168 100644 +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set ++# CONFIG_RTC_DRV_M41T80 is not set # -# Real Time Clock +# SPI RTC drivers -+# + # +-# CONFIG_RTC_CLASS is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_MAX6902 is not set -+ -+# + + # +-# DMA Engine support +# Platform RTC drivers -+# + # +-# CONFIG_DMA_ENGINE is not set +# CONFIG_RTC_DRV_DS1553 is not set ++# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_M48T86 is not set ++# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_V3020 is not set -+ -+# + + # +-# DMA Clients +# on-CPU RTC drivers # --# CONFIG_RTC_CLASS is not set +CONFIG_RTC_DRV_AT32AP700X=y # - # DMA Engine support -@@ -781,7 +931,8 @@ CONFIG_JBD=y +-# DMA Devices ++# Userspace I/O + # ++# CONFIG_UIO is not set + + # + # File systems + # +-CONFIG_EXT2_FS=y ++CONFIG_EXT2_FS=m + # CONFIG_EXT2_FS_XATTR is not set + # CONFIG_EXT2_FS_XIP is not set +-CONFIG_EXT3_FS=y ++CONFIG_EXT3_FS=m + # CONFIG_EXT3_FS_XATTR is not set + # CONFIG_EXT4DEV_FS is not set +-CONFIG_JBD=y +-# CONFIG_JBD_DEBUG is not set ++CONFIG_JBD=m + # CONFIG_REISERFS_FS is not set + # CONFIG_JFS_FS is not set + # CONFIG_FS_POSIX_ACL is not set +@@ -781,7 +896,8 @@ CONFIG_JBD=y # CONFIG_OCFS2_FS is not set # CONFIG_MINIX_FS is not set # CONFIG_ROMFS_FS is not set @@ -803,43 +2036,307 @@ index b799a68..adce168 100644 # CONFIG_QUOTA is not set # CONFIG_DNOTIFY is not set # CONFIG_AUTOFS_FS is not set -@@ -936,7 +1087,7 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y +@@ -814,7 +930,6 @@ CONFIG_SYSFS=y + CONFIG_TMPFS=y + # CONFIG_TMPFS_POSIX_ACL is not set + # CONFIG_HUGETLB_PAGE is not set +-CONFIG_RAMFS=y + CONFIG_CONFIGFS_FS=y + + # +@@ -830,10 +945,12 @@ CONFIG_CONFIGFS_FS=y + CONFIG_JFFS2_FS=y + CONFIG_JFFS2_FS_DEBUG=0 + CONFIG_JFFS2_FS_WRITEBUFFER=y ++# CONFIG_JFFS2_FS_WBUF_VERIFY is not set + # CONFIG_JFFS2_SUMMARY is not set + # CONFIG_JFFS2_FS_XATTR is not set + # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set + CONFIG_JFFS2_ZLIB=y ++# CONFIG_JFFS2_LZO is not set + CONFIG_JFFS2_RTIME=y + # CONFIG_JFFS2_RUBIN is not set + # CONFIG_CRAMFS is not set +@@ -842,19 +959,21 @@ CONFIG_JFFS2_RTIME=y + # CONFIG_QNX4FS_FS is not set + # CONFIG_SYSV_FS is not set + # CONFIG_UFS_FS is not set +- +-# +-# Network File Systems +-# ++CONFIG_NETWORK_FILESYSTEMS=y + CONFIG_NFS_FS=y + CONFIG_NFS_V3=y + # CONFIG_NFS_V3_ACL is not set + # CONFIG_NFS_V4 is not set + # CONFIG_NFS_DIRECTIO is not set +-# CONFIG_NFSD is not set ++CONFIG_NFSD=m ++CONFIG_NFSD_V3=y ++# CONFIG_NFSD_V3_ACL is not set ++# CONFIG_NFSD_V4 is not set ++CONFIG_NFSD_TCP=y + CONFIG_ROOT_NFS=y + CONFIG_LOCKD=y + CONFIG_LOCKD_V4=y ++CONFIG_EXPORTFS=m + CONFIG_NFS_COMMON=y + CONFIG_SUNRPC=y + # CONFIG_SUNRPC_BIND34 is not set +@@ -871,23 +990,18 @@ CONFIG_CIFS=m + # CONFIG_NCP_FS is not set + # CONFIG_CODA_FS is not set + # CONFIG_AFS_FS is not set +-# CONFIG_9P_FS is not set + + # + # Partition Types + # + # CONFIG_PARTITION_ADVANCED is not set + CONFIG_MSDOS_PARTITION=y +- +-# +-# Native Language Support +-# +-CONFIG_NLS=y ++CONFIG_NLS=m + CONFIG_NLS_DEFAULT="iso8859-1" +-# CONFIG_NLS_CODEPAGE_437 is not set ++CONFIG_NLS_CODEPAGE_437=m + # CONFIG_NLS_CODEPAGE_737 is not set + # CONFIG_NLS_CODEPAGE_775 is not set +-CONFIG_NLS_CODEPAGE_850=y ++CONFIG_NLS_CODEPAGE_850=m + # CONFIG_NLS_CODEPAGE_852 is not set + # CONFIG_NLS_CODEPAGE_855 is not set + # CONFIG_NLS_CODEPAGE_857 is not set +@@ -908,7 +1022,7 @@ CONFIG_NLS_CODEPAGE_850=y + # CONFIG_NLS_CODEPAGE_1250 is not set + # CONFIG_NLS_CODEPAGE_1251 is not set + # CONFIG_NLS_ASCII is not set +-CONFIG_NLS_ISO8859_1=y ++CONFIG_NLS_ISO8859_1=m + # CONFIG_NLS_ISO8859_2 is not set + # CONFIG_NLS_ISO8859_3 is not set + # CONFIG_NLS_ISO8859_4 is not set +@@ -921,18 +1035,19 @@ CONFIG_NLS_ISO8859_1=y + # CONFIG_NLS_ISO8859_15 is not set + # CONFIG_NLS_KOI8_R is not set + # CONFIG_NLS_KOI8_U is not set +-CONFIG_NLS_UTF8=y +- +-# +-# Distributed Lock Manager +-# ++CONFIG_NLS_UTF8=m + # CONFIG_DLM is not set ++CONFIG_INSTRUMENTATION=y ++CONFIG_PROFILING=y ++CONFIG_OPROFILE=m ++CONFIG_KPROBES=y ++# CONFIG_MARKERS is not set + + # + # Kernel hacking + # +-CONFIG_TRACE_IRQFLAGS_SUPPORT=y + # CONFIG_PRINTK_TIME is not set ++CONFIG_ENABLE_WARN_DEPRECATED=y CONFIG_ENABLE_MUST_CHECK=y CONFIG_MAGIC_SYSRQ=y # CONFIG_UNUSED_SYMBOLS is not set --# CONFIG_DEBUG_FS is not set -+CONFIG_DEBUG_FS=y - # CONFIG_HEADERS_CHECK is not set +@@ -941,12 +1056,17 @@ CONFIG_MAGIC_SYSRQ=y CONFIG_DEBUG_KERNEL=y # CONFIG_DEBUG_SHIRQ is not set + CONFIG_DETECT_SOFTLOCKUP=y ++CONFIG_SCHED_DEBUG=y + # CONFIG_SCHEDSTATS is not set + # CONFIG_TIMER_STATS is not set ++# CONFIG_SLUB_DEBUG_ON is not set + # CONFIG_DEBUG_RT_MUTEXES is not set + # CONFIG_RT_MUTEX_TESTER is not set + # CONFIG_DEBUG_SPINLOCK is not set + # CONFIG_DEBUG_MUTEXES is not set ++# CONFIG_DEBUG_LOCK_ALLOC is not set ++# CONFIG_PROVE_LOCKING is not set ++# CONFIG_LOCK_STAT is not set + # CONFIG_DEBUG_SPINLOCK_SLEEP is not set + # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set + # CONFIG_DEBUG_KOBJECT is not set +@@ -954,21 +1074,21 @@ CONFIG_DEBUG_BUGVERBOSE=y + # CONFIG_DEBUG_INFO is not set + # CONFIG_DEBUG_VM is not set + # CONFIG_DEBUG_LIST is not set ++# CONFIG_DEBUG_SG is not set + CONFIG_FRAME_POINTER=y + # CONFIG_FORCED_INLINING is not set ++# CONFIG_BOOT_PRINTK_DELAY is not set + # CONFIG_RCU_TORTURE_TEST is not set ++# CONFIG_LKDTM is not set + # CONFIG_FAULT_INJECTION is not set +-# CONFIG_KPROBES is not set ++# CONFIG_SAMPLES is not set + + # + # Security options + # + # CONFIG_KEYS is not set + # CONFIG_SECURITY is not set +- +-# +-# Cryptographic options +-# ++# CONFIG_SECURITY_FILE_CAPABILITIES is not set + CONFIG_CRYPTO=y + CONFIG_CRYPTO_ALGAPI=y + CONFIG_CRYPTO_BLKCIPHER=y +@@ -989,6 +1109,7 @@ CONFIG_CRYPTO_ECB=m + CONFIG_CRYPTO_CBC=y + CONFIG_CRYPTO_PCBC=m + # CONFIG_CRYPTO_LRW is not set ++# CONFIG_CRYPTO_XTS is not set + # CONFIG_CRYPTO_CRYPTD is not set + CONFIG_CRYPTO_DES=y + # CONFIG_CRYPTO_FCRYPT is not set +@@ -1002,15 +1123,14 @@ CONFIG_CRYPTO_DES=y + CONFIG_CRYPTO_ARC4=m + # CONFIG_CRYPTO_KHAZAD is not set + # CONFIG_CRYPTO_ANUBIS is not set ++# CONFIG_CRYPTO_SEED is not set + CONFIG_CRYPTO_DEFLATE=y + # CONFIG_CRYPTO_MICHAEL_MIC is not set + # CONFIG_CRYPTO_CRC32C is not set + # CONFIG_CRYPTO_CAMELLIA is not set + # CONFIG_CRYPTO_TEST is not set +- +-# +-# Hardware crypto devices +-# ++# CONFIG_CRYPTO_AUTHENC is not set ++CONFIG_CRYPTO_HW=y + + # + # Library routines +@@ -1018,8 +1138,9 @@ CONFIG_CRYPTO_DEFLATE=y + CONFIG_BITREVERSE=y + CONFIG_CRC_CCITT=m + # CONFIG_CRC16 is not set +-# CONFIG_CRC_ITU_T is not set ++CONFIG_CRC_ITU_T=m + CONFIG_CRC32=y ++CONFIG_CRC7=m + # CONFIG_LIBCRC32C is not set + CONFIG_ZLIB_INFLATE=y + CONFIG_ZLIB_DEFLATE=y diff --git a/arch/avr32/configs/atstk1002_defconfig b/arch/avr32/configs/atstk1002_defconfig -index 3b977fd..3708066 100644 +index 3b977fd..46e1c78 100644 --- a/arch/avr32/configs/atstk1002_defconfig +++ b/arch/avr32/configs/atstk1002_defconfig -@@ -1,7 +1,7 @@ +@@ -1,48 +1,48 @@ # # Automatically generated make config: don't edit -# Linux kernel version: 2.6.22-rc5 -# Sat Jun 23 15:32:08 2007 -+# Linux kernel version: 2.6.22.atmel.2 -+# Thu Jul 19 13:46:47 2007 ++# Linux kernel version: 2.6.24 ++# Tue Feb 5 18:00:06 2008 # CONFIG_AVR32=y CONFIG_GENERIC_GPIO=y -@@ -80,10 +80,10 @@ CONFIG_BASE_SMALL=1 + CONFIG_GENERIC_HARDIRQS=y ++CONFIG_STACKTRACE_SUPPORT=y ++CONFIG_LOCKDEP_SUPPORT=y ++CONFIG_TRACE_IRQFLAGS_SUPPORT=y + CONFIG_HARDIRQS_SW_RESEND=y + CONFIG_GENERIC_IRQ_PROBE=y + CONFIG_RWSEM_GENERIC_SPINLOCK=y + CONFIG_GENERIC_TIME=y ++# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set + # CONFIG_ARCH_HAS_ILOG2_U32 is not set + # CONFIG_ARCH_HAS_ILOG2_U64 is not set ++CONFIG_ARCH_SUPPORTS_OPROFILE=y + CONFIG_GENERIC_HWEIGHT=y + CONFIG_GENERIC_CALIBRATE_DELAY=y + CONFIG_GENERIC_BUG=y + CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" + # +-# Code maturity level options ++# General setup + # + CONFIG_EXPERIMENTAL=y + CONFIG_BROKEN_ON_SMP=y + CONFIG_INIT_ENV_ARG_LIMIT=32 +- +-# +-# General setup +-# + CONFIG_LOCALVERSION="" + # CONFIG_LOCALVERSION_AUTO is not set + CONFIG_SWAP=y + CONFIG_SYSVIPC=y +-# CONFIG_IPC_NS is not set + CONFIG_SYSVIPC_SYSCTL=y + CONFIG_POSIX_MQUEUE=y +-CONFIG_BSD_PROCESS_ACCT=y +-CONFIG_BSD_PROCESS_ACCT_V3=y +-CONFIG_TASKSTATS=y +-CONFIG_TASK_DELAY_ACCT=y +-# CONFIG_TASK_XACCT is not set +-# CONFIG_UTS_NS is not set +-CONFIG_AUDIT=y ++# CONFIG_BSD_PROCESS_ACCT is not set ++# CONFIG_TASKSTATS is not set ++# CONFIG_USER_NS is not set ++# CONFIG_PID_NS is not set ++# CONFIG_AUDIT is not set + # CONFIG_IKCONFIG is not set + CONFIG_LOG_BUF_SHIFT=14 ++# CONFIG_CGROUPS is not set ++# CONFIG_FAIR_GROUP_SCHED is not set + CONFIG_SYSFS_DEPRECATED=y + CONFIG_RELAY=y + CONFIG_BLK_DEV_INITRD=y +@@ -63,35 +63,28 @@ CONFIG_FUTEX=y + CONFIG_ANON_INODES=y + CONFIG_EPOLL=y + CONFIG_SIGNALFD=y +-CONFIG_TIMERFD=y + CONFIG_EVENTFD=y + CONFIG_SHMEM=y + CONFIG_VM_EVENT_COUNTERS=y +-# CONFIG_SLUB_DEBUG is not set ++CONFIG_SLUB_DEBUG=y + # CONFIG_SLAB is not set + CONFIG_SLUB=y + # CONFIG_SLOB is not set ++CONFIG_SLABINFO=y + CONFIG_RT_MUTEXES=y + # CONFIG_TINY_SHMEM is not set + CONFIG_BASE_SMALL=1 +- +-# +-# Loadable module support +-# CONFIG_MODULES=y CONFIG_MODULE_UNLOAD=y --# CONFIG_MODULE_FORCE_UNLOAD is not set -+CONFIG_MODULE_FORCE_UNLOAD=y + # CONFIG_MODULE_FORCE_UNLOAD is not set # CONFIG_MODVERSIONS is not set # CONFIG_MODULE_SRCVERSION_ALL is not set --# CONFIG_KMOD is not set -+CONFIG_KMOD=y + # CONFIG_KMOD is not set +- +-# +-# Block layer +-# + CONFIG_BLOCK=y + # CONFIG_LBD is not set + # CONFIG_BLK_DEV_IO_TRACE is not set + # CONFIG_LSF is not set ++# CONFIG_BLK_DEV_BSG is not set # - # Block layer -@@ -99,12 +99,12 @@ CONFIG_BLOCK=y + # IO Schedulers +@@ -99,12 +92,12 @@ CONFIG_BLOCK=y CONFIG_IOSCHED_NOOP=y # CONFIG_IOSCHED_AS is not set # CONFIG_IOSCHED_DEADLINE is not set @@ -856,85 +2353,331 @@ index 3b977fd..3708066 100644 # # System Type and features -@@ -117,6 +117,11 @@ CONFIG_CPU_AT32AP7000=y - CONFIG_BOARD_ATSTK1002=y +@@ -113,18 +106,30 @@ CONFIG_SUBARCH_AVR32B=y + CONFIG_MMU=y + CONFIG_PERFORMANCE_COUNTERS=y + CONFIG_PLATFORM_AT32AP=y ++CONFIG_CPU_AT32AP700X=y + CONFIG_CPU_AT32AP7000=y +-CONFIG_BOARD_ATSTK1002=y CONFIG_BOARD_ATSTK1000=y # CONFIG_BOARD_ATNGW100 is not set -+# CONFIG_BOARD_ATSTK1002_CUSTOM is not set -+# CONFIG_BOARD_ATSTK1002_SPI1 is not set -+# CONFIG_BOARD_ATSTK1002_J2_LED is not set -+# CONFIG_BOARD_ATSTK1002_J2_LED8 is not set -+# CONFIG_BOARD_ATSTK1002_J2_RGB is not set ++CONFIG_BOARD_ATSTK1002=y ++# CONFIG_BOARD_ATSTK1003 is not set ++# CONFIG_BOARD_ATSTK1004 is not set ++# CONFIG_BOARD_ATSTK100X_CUSTOM is not set ++# CONFIG_BOARD_ATSTK100X_SPI1 is not set ++# CONFIG_BOARD_ATSTK1000_J2_LED is not set ++# CONFIG_BOARD_ATSTK1000_J2_LED8 is not set ++# CONFIG_BOARD_ATSTK1000_J2_RGB is not set ++CONFIG_BOARD_ATSTK1000_EXTDAC=y ++# CONFIG_BOARD_ATSTK100X_ENABLE_AC97 is not set ++# CONFIG_BOARD_ATSTK1000_CF_HACKS is not set CONFIG_LOADER_U_BOOT=y # -@@ -125,6 +130,7 @@ CONFIG_LOADER_U_BOOT=y - # CONFIG_AP7000_32_BIT_SMC is not set - CONFIG_AP7000_16_BIT_SMC=y - # CONFIG_AP7000_8_BIT_SMC is not set + # Atmel AVR32 AP options + # +-# CONFIG_AP7000_32_BIT_SMC is not set +-CONFIG_AP7000_16_BIT_SMC=y +-# CONFIG_AP7000_8_BIT_SMC is not set ++# CONFIG_AP700X_32_BIT_SMC is not set ++CONFIG_AP700X_16_BIT_SMC=y ++# CONFIG_AP700X_8_BIT_SMC is not set +CONFIG_GPIO_DEV=y CONFIG_LOAD_ADDRESS=0x10000000 CONFIG_ENTRY_ADDRESS=0x90000000 CONFIG_PHYS_OFFSET=0x10000000 -@@ -148,6 +154,7 @@ CONFIG_SPLIT_PTLOCK_CPUS=4 +@@ -144,10 +149,14 @@ CONFIG_FLATMEM_MANUAL=y + CONFIG_FLATMEM=y + CONFIG_FLAT_NODE_MEM_MAP=y + # CONFIG_SPARSEMEM_STATIC is not set ++# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set + CONFIG_SPLIT_PTLOCK_CPUS=4 # CONFIG_RESOURCES_64BIT is not set CONFIG_ZONE_DMA_FLAG=0 ++CONFIG_VIRT_TO_BUS=y # CONFIG_OWNERSHIP_TRACE is not set ++CONFIG_NMI_DEBUGGING=y +CONFIG_DW_DMAC=y # CONFIG_HZ_100 is not set CONFIG_HZ_250=y # CONFIG_HZ_300 is not set -@@ -156,6 +163,27 @@ CONFIG_HZ=250 +@@ -156,13 +165,31 @@ CONFIG_HZ=250 CONFIG_CMDLINE="" # -+# Power managment options -+# -+ -+# +-# Bus options ++# Power management options + # +-# CONFIG_ARCH_SUPPORTS_MSI is not set + + # +-# PCCARD (PCMCIA/CardBus) support +# CPU Frequency scaling +# +CONFIG_CPU_FREQ=y +CONFIG_CPU_FREQ_TABLE=y +# CONFIG_CPU_FREQ_DEBUG is not set -+CONFIG_CPU_FREQ_STAT=m -+# CONFIG_CPU_FREQ_STAT_DETAILS is not set ++# CONFIG_CPU_FREQ_STAT is not set +CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y +# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set ++# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set ++# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -+CONFIG_CPU_FREQ_GOV_POWERSAVE=y ++# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set +CONFIG_CPU_FREQ_GOV_USERSPACE=y +CONFIG_CPU_FREQ_GOV_ONDEMAND=y +# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set +CONFIG_CPU_FREQ_AT32AP=y + + # ++# Bus options +# - # Bus options ++# CONFIG_ARCH_SUPPORTS_MSI is not set + # CONFIG_PCCARD is not set + # - # CONFIG_ARCH_SUPPORTS_MSI is not set -@@ -327,6 +355,8 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2 +@@ -182,7 +209,12 @@ CONFIG_NET=y + CONFIG_PACKET=y + CONFIG_PACKET_MMAP=y + CONFIG_UNIX=y +-# CONFIG_NET_KEY is not set ++CONFIG_XFRM=y ++CONFIG_XFRM_USER=m ++# CONFIG_XFRM_SUB_POLICY is not set ++# CONFIG_XFRM_MIGRATE is not set ++CONFIG_NET_KEY=m ++# CONFIG_NET_KEY_MIGRATE is not set + CONFIG_INET=y + # CONFIG_IP_MULTICAST is not set + # CONFIG_IP_ADVANCED_ROUTER is not set +@@ -191,36 +223,52 @@ CONFIG_IP_PNP=y + CONFIG_IP_PNP_DHCP=y + # CONFIG_IP_PNP_BOOTP is not set + # CONFIG_IP_PNP_RARP is not set +-# CONFIG_NET_IPIP is not set +-# CONFIG_NET_IPGRE is not set ++CONFIG_NET_IPIP=m ++CONFIG_NET_IPGRE=m + # CONFIG_ARPD is not set + # CONFIG_SYN_COOKIES is not set +-# CONFIG_INET_AH is not set +-# CONFIG_INET_ESP is not set ++CONFIG_INET_AH=m ++CONFIG_INET_ESP=m + # CONFIG_INET_IPCOMP is not set + # CONFIG_INET_XFRM_TUNNEL is not set +-# CONFIG_INET_TUNNEL is not set +-# CONFIG_INET_XFRM_MODE_TRANSPORT is not set +-# CONFIG_INET_XFRM_MODE_TUNNEL is not set +-# CONFIG_INET_XFRM_MODE_BEET is not set ++CONFIG_INET_TUNNEL=m ++CONFIG_INET_XFRM_MODE_TRANSPORT=m ++CONFIG_INET_XFRM_MODE_TUNNEL=m ++CONFIG_INET_XFRM_MODE_BEET=m ++# CONFIG_INET_LRO is not set + CONFIG_INET_DIAG=y + CONFIG_INET_TCP_DIAG=y + # CONFIG_TCP_CONG_ADVANCED is not set + CONFIG_TCP_CONG_CUBIC=y + CONFIG_DEFAULT_TCP_CONG="cubic" + # CONFIG_TCP_MD5SIG is not set +-# CONFIG_IPV6 is not set +-# CONFIG_INET6_XFRM_TUNNEL is not set +-# CONFIG_INET6_TUNNEL is not set ++CONFIG_IPV6=m ++# CONFIG_IPV6_PRIVACY is not set ++# CONFIG_IPV6_ROUTER_PREF is not set ++# CONFIG_IPV6_OPTIMISTIC_DAD is not set ++CONFIG_INET6_AH=m ++CONFIG_INET6_ESP=m ++CONFIG_INET6_IPCOMP=m ++# CONFIG_IPV6_MIP6 is not set ++CONFIG_INET6_XFRM_TUNNEL=m ++CONFIG_INET6_TUNNEL=m ++CONFIG_INET6_XFRM_MODE_TRANSPORT=m ++CONFIG_INET6_XFRM_MODE_TUNNEL=m ++CONFIG_INET6_XFRM_MODE_BEET=m ++# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set ++CONFIG_IPV6_SIT=m ++CONFIG_IPV6_TUNNEL=m ++# CONFIG_IPV6_MULTIPLE_TABLES is not set + # CONFIG_NETWORK_SECMARK is not set + # CONFIG_NETFILTER is not set + # CONFIG_IP_DCCP is not set + # CONFIG_IP_SCTP is not set + # CONFIG_TIPC is not set + # CONFIG_ATM is not set +-# CONFIG_BRIDGE is not set ++CONFIG_BRIDGE=m + # CONFIG_VLAN_8021Q is not set + # CONFIG_DECNET is not set ++CONFIG_LLC=m + # CONFIG_LLC2 is not set + # CONFIG_IPX is not set + # CONFIG_ATALK is not set +@@ -228,16 +276,13 @@ CONFIG_DEFAULT_TCP_CONG="cubic" + # CONFIG_LAPB is not set + # CONFIG_ECONET is not set + # CONFIG_WAN_ROUTER is not set +- +-# +-# QoS and/or fair queueing +-# + # CONFIG_NET_SCHED is not set + + # + # Network testing + # + # CONFIG_NET_PKTGEN is not set ++# CONFIG_NET_TCPPROBE is not set + # CONFIG_HAMRADIO is not set + # CONFIG_IRDA is not set + # CONFIG_BT is not set +@@ -251,6 +296,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic" + # CONFIG_MAC80211 is not set + # CONFIG_IEEE80211 is not set + # CONFIG_RFKILL is not set ++# CONFIG_NET_9P is not set + + # + # Device Drivers +@@ -259,16 +305,13 @@ CONFIG_DEFAULT_TCP_CONG="cubic" + # + # Generic Driver Options + # ++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" + CONFIG_STANDALONE=y + # CONFIG_PREVENT_FIRMWARE_BUILD is not set + # CONFIG_FW_LOADER is not set + # CONFIG_DEBUG_DRIVER is not set + # CONFIG_DEBUG_DEVRES is not set + # CONFIG_SYS_HYPERVISOR is not set +- +-# +-# Connector - unified userspace <-> kernelspace linker +-# + # CONFIG_CONNECTOR is not set + CONFIG_MTD=y + # CONFIG_MTD_DEBUG is not set +@@ -288,6 +331,7 @@ CONFIG_MTD_BLOCK=y + # CONFIG_INFTL is not set + # CONFIG_RFD_FTL is not set + # CONFIG_SSFDC is not set ++# CONFIG_MTD_OOPS is not set + + # + # RAM/ROM/Flash chip drivers +@@ -327,6 +371,8 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2 # # Self-contained MTD device drivers # +CONFIG_MTD_DATAFLASH=m -+# CONFIG_MTD_M25P80 is not set ++CONFIG_MTD_M25P80=m # CONFIG_MTD_SLRAM is not set # CONFIG_MTD_PHRAM is not set # CONFIG_MTD_MTDRAM is not set -@@ -373,7 +403,7 @@ CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 - # - # Misc devices +@@ -345,20 +391,8 @@ CONFIG_MTD_PHYSMAP_BANKWIDTH=2 + # UBI - Unsorted block images # + # CONFIG_MTD_UBI is not set +- +-# +-# Parallel port support +-# + # CONFIG_PARPORT is not set +- +-# +-# Plug and Play support +-# +-# CONFIG_PNPACPI is not set +- +-# +-# Block devices +-# ++CONFIG_BLK_DEV=y + # CONFIG_BLK_DEV_COW_COMMON is not set + CONFIG_BLK_DEV_LOOP=m + # CONFIG_BLK_DEV_CRYPTOLOOP is not set +@@ -369,42 +403,88 @@ CONFIG_BLK_DEV_RAM_SIZE=4096 + CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 + # CONFIG_CDROM_PKTCDVD is not set + # CONFIG_ATA_OVER_ETH is not set +- +-# +-# Misc devices +-# -# CONFIG_BLINK is not set ++CONFIG_MISC_DEVICES=y ++CONFIG_ATMEL_PWM=m ++# CONFIG_EEPROM_93CX6 is not set +CONFIG_ATMEL_SSC=m # CONFIG_IDE is not set # -@@ -397,13 +427,26 @@ CONFIG_DUMMY=y + # SCSI device support + # + # CONFIG_RAID_ATTRS is not set +-# CONFIG_SCSI is not set ++CONFIG_SCSI=m ++CONFIG_SCSI_DMA=y ++# CONFIG_SCSI_TGT is not set + # CONFIG_SCSI_NETLINK is not set +-# CONFIG_ATA is not set ++# CONFIG_SCSI_PROC_FS is not set + + # +-# Multi-device support (RAID and LVM) ++# SCSI support type (disk, tape, CD-ROM) + # +-# CONFIG_MD is not set ++CONFIG_BLK_DEV_SD=m ++# CONFIG_CHR_DEV_ST is not set ++# CONFIG_CHR_DEV_OSST is not set ++CONFIG_BLK_DEV_SR=m ++# CONFIG_BLK_DEV_SR_VENDOR is not set ++# CONFIG_CHR_DEV_SG is not set ++# CONFIG_CHR_DEV_SCH is not set + + # +-# Network device support ++# Some SCSI devices (e.g. CD jukebox) support multiple LUNs ++# ++# CONFIG_SCSI_MULTI_LUN is not set ++# CONFIG_SCSI_CONSTANTS is not set ++# CONFIG_SCSI_LOGGING is not set ++# CONFIG_SCSI_SCAN_ASYNC is not set ++CONFIG_SCSI_WAIT_SCAN=m ++ + # ++# SCSI Transports ++# ++# CONFIG_SCSI_SPI_ATTRS is not set ++# CONFIG_SCSI_FC_ATTRS is not set ++# CONFIG_SCSI_ISCSI_ATTRS is not set ++# CONFIG_SCSI_SAS_LIBSAS is not set ++# CONFIG_SCSI_SRP_ATTRS is not set ++# CONFIG_SCSI_LOWLEVEL is not set ++CONFIG_ATA=m ++# CONFIG_ATA_NONSTANDARD is not set ++CONFIG_PATA_AT32=m ++# CONFIG_PATA_PLATFORM is not set ++# CONFIG_MD is not set + CONFIG_NETDEVICES=y +-CONFIG_DUMMY=y ++# CONFIG_NETDEVICES_MULTIQUEUE is not set ++# CONFIG_DUMMY is not set # CONFIG_BONDING is not set ++# CONFIG_MACVLAN is not set # CONFIG_EQUALIZER is not set CONFIG_TUN=m -# CONFIG_PHYLIB is not set +- +-# +-# Ethernet (10 or 100Mbit) +-# ++# CONFIG_VETH is not set +CONFIG_PHYLIB=y + +# @@ -943,46 +2686,67 @@ index 3b977fd..3708066 100644 +# CONFIG_MARVELL_PHY is not set +# CONFIG_DAVICOM_PHY is not set +# CONFIG_QSEMI_PHY is not set -+CONFIG_LXT_PHY=y ++# CONFIG_LXT_PHY is not set +# CONFIG_CICADA_PHY is not set +# CONFIG_VITESSE_PHY is not set +# CONFIG_SMSC_PHY is not set +# CONFIG_BROADCOM_PHY is not set ++# CONFIG_ICPLUS_PHY is not set +# CONFIG_FIXED_PHY is not set - - # - # Ethernet (10 or 100Mbit) - # ++# CONFIG_MDIO_BITBANG is not set CONFIG_NET_ETHERNET=y -CONFIG_MII=y +# CONFIG_MII is not set CONFIG_MACB=y ++# CONFIG_IBM_NEW_EMAC_ZMII is not set ++# CONFIG_IBM_NEW_EMAC_RGMII is not set ++# CONFIG_IBM_NEW_EMAC_TAH is not set ++# CONFIG_IBM_NEW_EMAC_EMAC4 is not set ++# CONFIG_B44 is not set # CONFIG_NETDEV_1000 is not set # CONFIG_NETDEV_10000 is not set -@@ -443,7 +486,42 @@ CONFIG_SLHC=m + +@@ -423,27 +503,54 @@ CONFIG_PPP_DEFLATE=m + CONFIG_PPP_BSDCOMP=m + # CONFIG_PPP_MPPE is not set + # CONFIG_PPPOE is not set ++# CONFIG_PPPOL2TP is not set + # CONFIG_SLIP is not set + CONFIG_SLHC=m + # CONFIG_SHAPER is not set + # CONFIG_NETCONSOLE is not set + # CONFIG_NETPOLL is not set + # CONFIG_NET_POLL_CONTROLLER is not set ++# CONFIG_ISDN is not set ++# CONFIG_PHONE is not set + # - # Input device support +-# ISDN subsystem ++# Input device support # --# CONFIG_INPUT is not set +-# CONFIG_ISDN is not set +CONFIG_INPUT=m +# CONFIG_INPUT_FF_MEMLESS is not set +CONFIG_INPUT_POLLDEV=m -+ -+# + + # +-# Telephony Support +# Userland interfaces -+# + # +-# CONFIG_PHONE is not set +CONFIG_INPUT_MOUSEDEV=m +CONFIG_INPUT_MOUSEDEV_PSAUX=y +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 +# CONFIG_INPUT_JOYDEV is not set -+# CONFIG_INPUT_TSDEV is not set -+# CONFIG_INPUT_EVDEV is not set ++CONFIG_INPUT_EVDEV=m +# CONFIG_INPUT_EVBUG is not set -+ -+# + + # +-# Input device support +# Input Device Drivers -+# + # +-# CONFIG_INPUT is not set +CONFIG_INPUT_KEYBOARD=y +# CONFIG_KEYBOARD_ATKBD is not set +# CONFIG_KEYBOARD_SUNKBD is not set @@ -1003,35 +2767,38 @@ index 3b977fd..3708066 100644 # # Hardware I/O ports -@@ -477,7 +555,15 @@ CONFIG_UNIX98_PTYS=y - # IPMI +@@ -467,40 +574,94 @@ CONFIG_SLHC=m # + CONFIG_SERIAL_ATMEL=y + CONFIG_SERIAL_ATMEL_CONSOLE=y ++CONFIG_SERIAL_ATMEL_PDC=y + # CONFIG_SERIAL_ATMEL_TTYAT is not set + CONFIG_SERIAL_CORE=y + CONFIG_SERIAL_CORE_CONSOLE=y + CONFIG_UNIX98_PTYS=y + # CONFIG_LEGACY_PTYS is not set +- +-# +-# IPMI +-# # CONFIG_IPMI_HANDLER is not set -# CONFIG_WATCHDOG is not set -+CONFIG_WATCHDOG=y -+# CONFIG_WATCHDOG_NOWAYOUT is not set -+ -+# -+# Watchdog Device Drivers -+# -+# CONFIG_SOFT_WATCHDOG is not set -+CONFIG_AT32AP700X_WDT=y -+CONFIG_AT32AP700X_WDT_TIMEOUT=2 # CONFIG_HW_RANDOM is not set # CONFIG_RTC is not set # CONFIG_GEN_RTC is not set -@@ -488,13 +574,61 @@ CONFIG_UNIX98_PTYS=y - # TPM devices - # - # CONFIG_TCG_TPM is not set --# CONFIG_I2C is not set + # CONFIG_R3964 is not set + # CONFIG_RAW_DRIVER is not set ++# CONFIG_TCG_TPM is not set +CONFIG_I2C=m +CONFIG_I2C_BOARDINFO=y +CONFIG_I2C_CHARDEV=m -+ -+# + + # +-# TPM devices +# I2C Algorithms -+# + # +-# CONFIG_TCG_TPM is not set +-# CONFIG_I2C is not set +CONFIG_I2C_ALGOBIT=m +# CONFIG_I2C_ALGOPCF is not set +# CONFIG_I2C_ALGOPCA is not set @@ -1040,11 +2807,11 @@ index 3b977fd..3708066 100644 +# I2C Hardware Bus support +# +CONFIG_I2C_ATMELTWI=m -+CONFIG_I2C_ATMELTWI_BAUDRATE=100000 +CONFIG_I2C_GPIO=m +# CONFIG_I2C_OCORES is not set +# CONFIG_I2C_PARPORT_LIGHT is not set +# CONFIG_I2C_SIMTEC is not set ++# CONFIG_I2C_TAOS_EVM is not set +# CONFIG_I2C_STUB is not set + +# @@ -1052,11 +2819,13 @@ index 3b977fd..3708066 100644 +# +# CONFIG_SENSORS_DS1337 is not set +# CONFIG_SENSORS_DS1374 is not set ++# CONFIG_DS1682 is not set +# CONFIG_SENSORS_EEPROM is not set +# CONFIG_SENSORS_PCF8574 is not set +# CONFIG_SENSORS_PCA9539 is not set +# CONFIG_SENSORS_PCF8591 is not set +# CONFIG_SENSORS_MAX6875 is not set ++# CONFIG_SENSORS_TSL2550 is not set +# CONFIG_I2C_DEBUG_CORE is not set +# CONFIG_I2C_DEBUG_ALGO is not set +# CONFIG_I2C_DEBUG_BUS is not set @@ -1070,43 +2839,54 @@ index 3b977fd..3708066 100644 +CONFIG_SPI=y +# CONFIG_SPI_DEBUG is not set +CONFIG_SPI_MASTER=y -+ -+# + + # +-# Dallas's 1-wire bus +# SPI Master Controller Drivers +# +CONFIG_SPI_ATMEL=y +# CONFIG_SPI_BITBANG is not set + -+# + # +# SPI Protocol Masters +# +# CONFIG_SPI_AT25 is not set +CONFIG_SPI_SPIDEV=m ++# CONFIG_SPI_TLE62X0 is not set + # CONFIG_W1 is not set ++# CONFIG_POWER_SUPPLY is not set + # CONFIG_HWMON is not set ++CONFIG_WATCHDOG=y ++# CONFIG_WATCHDOG_NOWAYOUT is not set ++ ++# ++# Watchdog Device Drivers ++# ++# CONFIG_SOFT_WATCHDOG is not set ++CONFIG_AT32AP700X_WDT=y ++ ++# ++# Sonics Silicon Backplane ++# ++CONFIG_SSB_POSSIBLE=y ++# CONFIG_SSB is not set # - # Dallas's 1-wire bus -@@ -517,19 +651,91 @@ CONFIG_UNIX98_PTYS=y + # Multifunction device drivers +@@ -517,23 +678,104 @@ CONFIG_UNIX98_PTYS=y # # Graphics support # -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set -+CONFIG_BACKLIGHT_LCD_SUPPORT=y -+CONFIG_LCD_CLASS_DEVICE=y -+CONFIG_LCD_LTV350QV=y -+# CONFIG_BACKLIGHT_CLASS_DEVICE is not set - - # - # Display device support - # - # CONFIG_DISPLAY_SUPPORT is not set - # CONFIG_VGASTATE is not set --# CONFIG_FB is not set ++# CONFIG_VGASTATE is not set ++# CONFIG_VIDEO_OUTPUT_CONTROL is not set +CONFIG_FB=y +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FB_DDC is not set +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_IMAGEBLIT=y ++# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set +# CONFIG_FB_SYS_FILLRECT is not set +# CONFIG_FB_SYS_COPYAREA is not set +# CONFIG_FB_SYS_IMAGEBLIT is not set @@ -1124,6 +2904,17 @@ index 3b977fd..3708066 100644 +# CONFIG_FB_S1D13XXX is not set +CONFIG_FB_ATMEL=y +# CONFIG_FB_VIRTUAL is not set ++CONFIG_BACKLIGHT_LCD_SUPPORT=y ++CONFIG_LCD_CLASS_DEVICE=y ++CONFIG_LCD_LTV350QV=y ++# CONFIG_BACKLIGHT_CLASS_DEVICE is not set + + # + # Display device support + # + # CONFIG_DISPLAY_SUPPORT is not set +-# CONFIG_VGASTATE is not set +-# CONFIG_FB is not set +# CONFIG_LOGO is not set # @@ -1145,19 +2936,25 @@ index 3b977fd..3708066 100644 +CONFIG_SND_PCM_OSS_PLUGINS=y +# CONFIG_SND_DYNAMIC_MINORS is not set +# CONFIG_SND_SUPPORT_OLD_API is not set -+CONFIG_SND_VERBOSE_PROCFS=y ++# CONFIG_SND_VERBOSE_PROCFS is not set +# CONFIG_SND_VERBOSE_PRINTK is not set +# CONFIG_SND_DEBUG is not set + +# +# Generic devices +# ++CONFIG_SND_AC97_CODEC=m +# CONFIG_SND_DUMMY is not set +# CONFIG_SND_MTPAV is not set +# CONFIG_SND_SERIAL_U16550 is not set +# CONFIG_SND_MPU401 is not set + +# ++# AVR32 devices ++# ++CONFIG_SND_ATMEL_AC97=m ++ ++# +# SPI devices +# +CONFIG_SND_AT73C213=m @@ -1169,34 +2966,50 @@ index 3b977fd..3708066 100644 +# CONFIG_SND_SOC is not set + +# -+# Open Sound System -+# -+# CONFIG_SOUND_PRIME is not set -+ -+# -+# HID Devices ++# SoC Audio support for SuperH +# -+# CONFIG_HID is not set # - # USB support -@@ -545,21 +751,59 @@ CONFIG_UNIX98_PTYS=y +-# USB support ++# Open Sound System + # ++CONFIG_SOUND_PRIME=m ++# CONFIG_SOUND_MSNDCLAS is not set ++# CONFIG_SOUND_MSNDPIN is not set ++CONFIG_SOUND_AT32_ABDAC=m ++CONFIG_AC97_BUS=m ++# CONFIG_HID_SUPPORT is not set ++CONFIG_USB_SUPPORT=y + # CONFIG_USB_ARCH_HAS_HCD is not set + # CONFIG_USB_ARCH_HAS_OHCI is not set + # CONFIG_USB_ARCH_HAS_EHCI is not set +@@ -545,63 +787,137 @@ CONFIG_UNIX98_PTYS=y # # USB Gadget Support # -# CONFIG_USB_GADGET is not set -# CONFIG_MMC is not set +- +-# +-# LED devices +-# +-# CONFIG_NEW_LEDS is not set +CONFIG_USB_GADGET=y ++# CONFIG_USB_GADGET_DEBUG is not set +# CONFIG_USB_GADGET_DEBUG_FILES is not set ++# CONFIG_USB_GADGET_DEBUG_FS is not set +CONFIG_USB_GADGET_SELECTED=y ++# CONFIG_USB_GADGET_AMD5536UDC is not set ++CONFIG_USB_GADGET_ATMEL_USBA=y ++CONFIG_USB_ATMEL_USBA=y +# CONFIG_USB_GADGET_FSL_USB2 is not set +# CONFIG_USB_GADGET_NET2280 is not set +# CONFIG_USB_GADGET_PXA2XX is not set ++# CONFIG_USB_GADGET_M66592 is not set +# CONFIG_USB_GADGET_GOKU is not set +# CONFIG_USB_GADGET_LH7A40X is not set -+CONFIG_USB_GADGET_ATMEL_USBA=y -+CONFIG_USB_ATMEL_USBA=y +# CONFIG_USB_GADGET_OMAP is not set ++# CONFIG_USB_GADGET_S3C2410 is not set +# CONFIG_USB_GADGET_AT91 is not set +# CONFIG_USB_GADGET_DUMMY_HCD is not set +CONFIG_USB_GADGET_DUALSPEED=y @@ -1216,22 +3029,21 @@ index 3b977fd..3708066 100644 +# MMC/SD Card Drivers +# +CONFIG_MMC_BLOCK=y ++# CONFIG_MMC_BLOCK_BOUNCE is not set ++# CONFIG_SDIO_UART is not set + +# +# MMC/SD Host Controller Drivers +# +CONFIG_MMC_ATMELMCI=y - - # - # LED devices - # --# CONFIG_NEW_LEDS is not set ++CONFIG_MMC_SPI=m +CONFIG_NEW_LEDS=y +CONFIG_LEDS_CLASS=m # # LED drivers # ++CONFIG_LEDS_ATMEL_PWM=m +CONFIG_LEDS_GPIO=m # @@ -1240,32 +3052,28 @@ index 3b977fd..3708066 100644 +CONFIG_LEDS_TRIGGERS=y +CONFIG_LEDS_TRIGGER_TIMER=m +CONFIG_LEDS_TRIGGER_HEARTBEAT=m - - # - # InfiniBand support -@@ -572,7 +816,50 @@ CONFIG_UNIX98_PTYS=y - # - # Real Time Clock - # --# CONFIG_RTC_CLASS is not set +CONFIG_RTC_LIB=y +CONFIG_RTC_CLASS=y -+# CONFIG_RTC_HCTOSYS is not set ++CONFIG_RTC_HCTOSYS=y ++CONFIG_RTC_HCTOSYS_DEVICE="rtc0" +# CONFIG_RTC_DEBUG is not set -+ -+# + + # +-# InfiniBand support +# RTC interfaces -+# + # +CONFIG_RTC_INTF_SYSFS=y +CONFIG_RTC_INTF_PROC=y +CONFIG_RTC_INTF_DEV=y +# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set +# CONFIG_RTC_DRV_TEST is not set -+ -+# + + # +-# EDAC - error detection and reporting (RAS) (EXPERIMENTAL) +# I2C RTC drivers -+# + # +# CONFIG_RTC_DRV_DS1307 is not set ++# CONFIG_RTC_DRV_DS1374 is not set +# CONFIG_RTC_DRV_DS1672 is not set +# CONFIG_RTC_DRV_MAX6900 is not set +# CONFIG_RTC_DRV_RS5C372 is not set @@ -1273,29 +3081,40 @@ index 3b977fd..3708066 100644 +# CONFIG_RTC_DRV_X1205 is not set +# CONFIG_RTC_DRV_PCF8563 is not set +# CONFIG_RTC_DRV_PCF8583 is not set -+ -+# ++# CONFIG_RTC_DRV_M41T80 is not set + + # +-# Real Time Clock +# SPI RTC drivers -+# + # +-# CONFIG_RTC_CLASS is not set +# CONFIG_RTC_DRV_RS5C348 is not set +# CONFIG_RTC_DRV_MAX6902 is not set -+ -+# + + # +-# DMA Engine support +# Platform RTC drivers -+# + # +-# CONFIG_DMA_ENGINE is not set +# CONFIG_RTC_DRV_DS1553 is not set ++# CONFIG_RTC_DRV_STK17TA8 is not set +# CONFIG_RTC_DRV_DS1742 is not set +# CONFIG_RTC_DRV_M48T86 is not set ++# CONFIG_RTC_DRV_M48T59 is not set +# CONFIG_RTC_DRV_V3020 is not set -+ -+# + + # +-# DMA Clients +# on-CPU RTC drivers -+# + # +CONFIG_RTC_DRV_AT32AP700X=y # - # DMA Engine support -@@ -590,11 +877,14 @@ CONFIG_UNIX98_PTYS=y +-# DMA Devices ++# Userspace I/O + # ++# CONFIG_UIO is not set + # # File systems # @@ -1312,7 +3131,15 @@ index 3b977fd..3708066 100644 # CONFIG_REISERFS_FS is not set # CONFIG_JFS_FS is not set # CONFIG_FS_POSIX_ACL is not set -@@ -609,7 +899,7 @@ CONFIG_INOTIFY_USER=y + # CONFIG_XFS_FS is not set + # CONFIG_GFS2_FS is not set + # CONFIG_OCFS2_FS is not set +-CONFIG_MINIX_FS=m ++# CONFIG_MINIX_FS is not set + # CONFIG_ROMFS_FS is not set + CONFIG_INOTIFY=y + CONFIG_INOTIFY_USER=y +@@ -609,7 +925,7 @@ CONFIG_INOTIFY_USER=y # CONFIG_DNOTIFY is not set # CONFIG_AUTOFS_FS is not set # CONFIG_AUTOFS4_FS is not set @@ -1321,32 +3148,1856 @@ index 3b977fd..3708066 100644 # # CD-ROM/DVD Filesystems -@@ -638,7 +928,7 @@ CONFIG_TMPFS=y +@@ -637,8 +953,7 @@ CONFIG_SYSFS=y + CONFIG_TMPFS=y # CONFIG_TMPFS_POSIX_ACL is not set # CONFIG_HUGETLB_PAGE is not set - CONFIG_RAMFS=y +-CONFIG_RAMFS=y -CONFIG_CONFIGFS_FS=m +CONFIG_CONFIGFS_FS=y # # Miscellaneous filesystems -@@ -683,8 +973,14 @@ CONFIG_SUNRPC=y - # CONFIG_SUNRPC_BIND34 is not set - # CONFIG_RPCSEC_GSS_KRB5 is not set - # CONFIG_RPCSEC_GSS_SPKM3 is not set --# CONFIG_SMB_FS is not set --# CONFIG_CIFS is not set -+CONFIG_SMB_FS=m -+# CONFIG_SMB_NLS_DEFAULT is not set -+CONFIG_CIFS=m -+# CONFIG_CIFS_STATS is not set -+# CONFIG_CIFS_WEAK_PW_HASH is not set -+# CONFIG_CIFS_XATTR is not set -+# CONFIG_CIFS_DEBUG2 is not set -+# CONFIG_CIFS_EXPERIMENTAL is not set +@@ -652,11 +967,12 @@ CONFIG_CONFIGFS_FS=m + # CONFIG_EFS_FS is not set + CONFIG_JFFS2_FS=y + CONFIG_JFFS2_FS_DEBUG=0 +-CONFIG_JFFS2_FS_WRITEBUFFER=y ++# CONFIG_JFFS2_FS_WRITEBUFFER is not set + # CONFIG_JFFS2_SUMMARY is not set + # CONFIG_JFFS2_FS_XATTR is not set + # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set + CONFIG_JFFS2_ZLIB=y ++# CONFIG_JFFS2_LZO is not set + CONFIG_JFFS2_RTIME=y + # CONFIG_JFFS2_RUBIN is not set + # CONFIG_CRAMFS is not set +@@ -665,10 +981,7 @@ CONFIG_JFFS2_RTIME=y + # CONFIG_QNX4FS_FS is not set + # CONFIG_SYSV_FS is not set + # CONFIG_UFS_FS is not set +- +-# +-# Network File Systems +-# ++CONFIG_NETWORK_FILESYSTEMS=y + CONFIG_NFS_FS=y + CONFIG_NFS_V3=y + # CONFIG_NFS_V3_ACL is not set +@@ -688,17 +1001,12 @@ CONFIG_SUNRPC=y # CONFIG_NCP_FS is not set # CONFIG_CODA_FS is not set # CONFIG_AFS_FS is not set +-# CONFIG_9P_FS is not set + + # + # Partition Types + # + # CONFIG_PARTITION_ADVANCED is not set + CONFIG_MSDOS_PARTITION=y +- +-# +-# Native Language Support +-# + CONFIG_NLS=m + CONFIG_NLS_DEFAULT="iso8859-1" + CONFIG_NLS_CODEPAGE_437=m +@@ -739,17 +1047,18 @@ CONFIG_NLS_ISO8859_1=m + # CONFIG_NLS_KOI8_R is not set + # CONFIG_NLS_KOI8_U is not set + CONFIG_NLS_UTF8=m +- +-# +-# Distributed Lock Manager +-# + # CONFIG_DLM is not set ++CONFIG_INSTRUMENTATION=y ++CONFIG_PROFILING=y ++CONFIG_OPROFILE=m ++CONFIG_KPROBES=y ++# CONFIG_MARKERS is not set + + # + # Kernel hacking + # +-CONFIG_TRACE_IRQFLAGS_SUPPORT=y + # CONFIG_PRINTK_TIME is not set ++CONFIG_ENABLE_WARN_DEPRECATED=y + CONFIG_ENABLE_MUST_CHECK=y + CONFIG_MAGIC_SYSRQ=y + # CONFIG_UNUSED_SYMBOLS is not set +@@ -758,12 +1067,17 @@ CONFIG_DEBUG_FS=y + CONFIG_DEBUG_KERNEL=y + # CONFIG_DEBUG_SHIRQ is not set + CONFIG_DETECT_SOFTLOCKUP=y ++CONFIG_SCHED_DEBUG=y + # CONFIG_SCHEDSTATS is not set + # CONFIG_TIMER_STATS is not set ++# CONFIG_SLUB_DEBUG_ON is not set + # CONFIG_DEBUG_RT_MUTEXES is not set + # CONFIG_RT_MUTEX_TESTER is not set + # CONFIG_DEBUG_SPINLOCK is not set + # CONFIG_DEBUG_MUTEXES is not set ++# CONFIG_DEBUG_LOCK_ALLOC is not set ++# CONFIG_PROVE_LOCKING is not set ++# CONFIG_LOCK_STAT is not set + # CONFIG_DEBUG_SPINLOCK_SLEEP is not set + # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set + # CONFIG_DEBUG_KOBJECT is not set +@@ -771,22 +1085,63 @@ CONFIG_DEBUG_BUGVERBOSE=y + # CONFIG_DEBUG_INFO is not set + # CONFIG_DEBUG_VM is not set + # CONFIG_DEBUG_LIST is not set ++# CONFIG_DEBUG_SG is not set + CONFIG_FRAME_POINTER=y + CONFIG_FORCED_INLINING=y ++# CONFIG_BOOT_PRINTK_DELAY is not set + # CONFIG_RCU_TORTURE_TEST is not set ++# CONFIG_LKDTM is not set + # CONFIG_FAULT_INJECTION is not set +-# CONFIG_KPROBES is not set ++# CONFIG_SAMPLES is not set + + # + # Security options + # + # CONFIG_KEYS is not set + # CONFIG_SECURITY is not set +- +-# +-# Cryptographic options +-# +-# CONFIG_CRYPTO is not set ++# CONFIG_SECURITY_FILE_CAPABILITIES is not set ++CONFIG_CRYPTO=y ++CONFIG_CRYPTO_ALGAPI=m ++CONFIG_CRYPTO_BLKCIPHER=m ++CONFIG_CRYPTO_HASH=m ++CONFIG_CRYPTO_MANAGER=m ++CONFIG_CRYPTO_HMAC=m ++# CONFIG_CRYPTO_XCBC is not set ++# CONFIG_CRYPTO_NULL is not set ++# CONFIG_CRYPTO_MD4 is not set ++CONFIG_CRYPTO_MD5=m ++CONFIG_CRYPTO_SHA1=m ++# CONFIG_CRYPTO_SHA256 is not set ++# CONFIG_CRYPTO_SHA512 is not set ++# CONFIG_CRYPTO_WP512 is not set ++# CONFIG_CRYPTO_TGR192 is not set ++# CONFIG_CRYPTO_GF128MUL is not set ++# CONFIG_CRYPTO_ECB is not set ++CONFIG_CRYPTO_CBC=m ++# CONFIG_CRYPTO_PCBC is not set ++# CONFIG_CRYPTO_LRW is not set ++# CONFIG_CRYPTO_XTS is not set ++# CONFIG_CRYPTO_CRYPTD is not set ++CONFIG_CRYPTO_DES=m ++# CONFIG_CRYPTO_FCRYPT is not set ++# CONFIG_CRYPTO_BLOWFISH is not set ++# CONFIG_CRYPTO_TWOFISH is not set ++# CONFIG_CRYPTO_SERPENT is not set ++# CONFIG_CRYPTO_AES is not set ++# CONFIG_CRYPTO_CAST5 is not set ++# CONFIG_CRYPTO_CAST6 is not set ++# CONFIG_CRYPTO_TEA is not set ++# CONFIG_CRYPTO_ARC4 is not set ++# CONFIG_CRYPTO_KHAZAD is not set ++# CONFIG_CRYPTO_ANUBIS is not set ++# CONFIG_CRYPTO_SEED is not set ++CONFIG_CRYPTO_DEFLATE=m ++# CONFIG_CRYPTO_MICHAEL_MIC is not set ++# CONFIG_CRYPTO_CRC32C is not set ++# CONFIG_CRYPTO_CAMELLIA is not set ++# CONFIG_CRYPTO_TEST is not set ++# CONFIG_CRYPTO_AUTHENC is not set ++# CONFIG_CRYPTO_HW is not set + + # + # Library routines +@@ -794,10 +1149,10 @@ CONFIG_FORCED_INLINING=y + CONFIG_BITREVERSE=y + CONFIG_CRC_CCITT=m + # CONFIG_CRC16 is not set +-# CONFIG_CRC_ITU_T is not set ++CONFIG_CRC_ITU_T=m + CONFIG_CRC32=y ++CONFIG_CRC7=m + # CONFIG_LIBCRC32C is not set +-CONFIG_AUDIT_GENERIC=y + CONFIG_ZLIB_INFLATE=y + CONFIG_ZLIB_DEFLATE=y + CONFIG_PLIST=y +diff --git a/arch/avr32/configs/atstk1003_defconfig b/arch/avr32/configs/atstk1003_defconfig +new file mode 100644 +index 0000000..d8a6595 +--- /dev/null ++++ b/arch/avr32/configs/atstk1003_defconfig +@@ -0,0 +1,1032 @@ ++# ++# Automatically generated make config: don't edit ++# Linux kernel version: 2.6.24 ++# Tue Feb 5 18:08:36 2008 ++# ++CONFIG_AVR32=y ++CONFIG_GENERIC_GPIO=y ++CONFIG_GENERIC_HARDIRQS=y ++CONFIG_STACKTRACE_SUPPORT=y ++CONFIG_LOCKDEP_SUPPORT=y ++CONFIG_TRACE_IRQFLAGS_SUPPORT=y ++CONFIG_HARDIRQS_SW_RESEND=y ++CONFIG_GENERIC_IRQ_PROBE=y ++CONFIG_RWSEM_GENERIC_SPINLOCK=y ++CONFIG_GENERIC_TIME=y ++# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set ++# CONFIG_ARCH_HAS_ILOG2_U32 is not set ++# CONFIG_ARCH_HAS_ILOG2_U64 is not set ++CONFIG_ARCH_SUPPORTS_OPROFILE=y ++CONFIG_GENERIC_HWEIGHT=y ++CONFIG_GENERIC_CALIBRATE_DELAY=y ++CONFIG_GENERIC_BUG=y ++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" ++ ++# ++# General setup ++# ++CONFIG_EXPERIMENTAL=y ++CONFIG_BROKEN_ON_SMP=y ++CONFIG_INIT_ENV_ARG_LIMIT=32 ++CONFIG_LOCALVERSION="" ++# CONFIG_LOCALVERSION_AUTO is not set ++CONFIG_SWAP=y ++CONFIG_SYSVIPC=y ++CONFIG_SYSVIPC_SYSCTL=y ++CONFIG_POSIX_MQUEUE=y ++CONFIG_BSD_PROCESS_ACCT=y ++CONFIG_BSD_PROCESS_ACCT_V3=y ++CONFIG_TASKSTATS=y ++CONFIG_TASK_DELAY_ACCT=y ++# CONFIG_TASK_XACCT is not set ++# CONFIG_USER_NS is not set ++# CONFIG_PID_NS is not set ++CONFIG_AUDIT=y ++# CONFIG_IKCONFIG is not set ++CONFIG_LOG_BUF_SHIFT=14 ++# CONFIG_CGROUPS is not set ++CONFIG_FAIR_GROUP_SCHED=y ++CONFIG_FAIR_USER_SCHED=y ++# CONFIG_FAIR_CGROUP_SCHED is not set ++CONFIG_SYSFS_DEPRECATED=y ++CONFIG_RELAY=y ++CONFIG_BLK_DEV_INITRD=y ++CONFIG_INITRAMFS_SOURCE="" ++CONFIG_CC_OPTIMIZE_FOR_SIZE=y ++CONFIG_SYSCTL=y ++CONFIG_EMBEDDED=y ++# CONFIG_SYSCTL_SYSCALL is not set ++CONFIG_KALLSYMS=y ++# CONFIG_KALLSYMS_ALL is not set ++# CONFIG_KALLSYMS_EXTRA_PASS is not set ++CONFIG_HOTPLUG=y ++CONFIG_PRINTK=y ++CONFIG_BUG=y ++CONFIG_ELF_CORE=y ++# CONFIG_BASE_FULL is not set ++CONFIG_FUTEX=y ++CONFIG_ANON_INODES=y ++CONFIG_EPOLL=y ++CONFIG_SIGNALFD=y ++CONFIG_EVENTFD=y ++CONFIG_SHMEM=y ++CONFIG_VM_EVENT_COUNTERS=y ++# CONFIG_SLUB_DEBUG is not set ++# CONFIG_SLAB is not set ++CONFIG_SLUB=y ++# CONFIG_SLOB is not set ++CONFIG_SLABINFO=y ++CONFIG_RT_MUTEXES=y ++# CONFIG_TINY_SHMEM is not set ++CONFIG_BASE_SMALL=1 ++CONFIG_MODULES=y ++CONFIG_MODULE_UNLOAD=y ++# CONFIG_MODULE_FORCE_UNLOAD is not set ++# CONFIG_MODVERSIONS is not set ++# CONFIG_MODULE_SRCVERSION_ALL is not set ++# CONFIG_KMOD is not set ++CONFIG_BLOCK=y ++# CONFIG_LBD is not set ++# CONFIG_BLK_DEV_IO_TRACE is not set ++# CONFIG_LSF is not set ++# CONFIG_BLK_DEV_BSG is not set ++ ++# ++# IO Schedulers ++# ++CONFIG_IOSCHED_NOOP=y ++# CONFIG_IOSCHED_AS is not set ++# CONFIG_IOSCHED_DEADLINE is not set ++CONFIG_IOSCHED_CFQ=y ++# CONFIG_DEFAULT_AS is not set ++# CONFIG_DEFAULT_DEADLINE is not set ++CONFIG_DEFAULT_CFQ=y ++# CONFIG_DEFAULT_NOOP is not set ++CONFIG_DEFAULT_IOSCHED="cfq" ++ ++# ++# System Type and features ++# ++CONFIG_SUBARCH_AVR32B=y ++CONFIG_MMU=y ++CONFIG_PERFORMANCE_COUNTERS=y ++CONFIG_PLATFORM_AT32AP=y ++CONFIG_CPU_AT32AP700X=y ++CONFIG_CPU_AT32AP7001=y ++CONFIG_BOARD_ATSTK1000=y ++# CONFIG_BOARD_ATNGW100 is not set ++# CONFIG_BOARD_ATSTK1002 is not set ++CONFIG_BOARD_ATSTK1003=y ++# CONFIG_BOARD_ATSTK1004 is not set ++# CONFIG_BOARD_ATSTK100X_CUSTOM is not set ++# CONFIG_BOARD_ATSTK100X_SPI1 is not set ++# CONFIG_BOARD_ATSTK1000_J2_LED is not set ++# CONFIG_BOARD_ATSTK1000_J2_LED8 is not set ++# CONFIG_BOARD_ATSTK1000_J2_RGB is not set ++CONFIG_BOARD_ATSTK1000_EXTDAC=y ++# CONFIG_BOARD_ATSTK100X_ENABLE_AC97 is not set ++# CONFIG_BOARD_ATSTK1000_CF_HACKS is not set ++CONFIG_LOADER_U_BOOT=y ++ ++# ++# Atmel AVR32 AP options ++# ++# CONFIG_AP700X_32_BIT_SMC is not set ++CONFIG_AP700X_16_BIT_SMC=y ++# CONFIG_AP700X_8_BIT_SMC is not set ++CONFIG_GPIO_DEV=y ++CONFIG_LOAD_ADDRESS=0x10000000 ++CONFIG_ENTRY_ADDRESS=0x90000000 ++CONFIG_PHYS_OFFSET=0x10000000 ++CONFIG_PREEMPT_NONE=y ++# CONFIG_PREEMPT_VOLUNTARY is not set ++# CONFIG_PREEMPT is not set ++# CONFIG_HAVE_ARCH_BOOTMEM_NODE is not set ++# CONFIG_ARCH_HAVE_MEMORY_PRESENT is not set ++# CONFIG_NEED_NODE_MEMMAP_SIZE is not set ++CONFIG_ARCH_FLATMEM_ENABLE=y ++# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set ++# CONFIG_ARCH_SPARSEMEM_ENABLE is not set ++CONFIG_SELECT_MEMORY_MODEL=y ++CONFIG_FLATMEM_MANUAL=y ++# CONFIG_DISCONTIGMEM_MANUAL is not set ++# CONFIG_SPARSEMEM_MANUAL is not set ++CONFIG_FLATMEM=y ++CONFIG_FLAT_NODE_MEM_MAP=y ++# CONFIG_SPARSEMEM_STATIC is not set ++# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set ++CONFIG_SPLIT_PTLOCK_CPUS=4 ++# CONFIG_RESOURCES_64BIT is not set ++CONFIG_ZONE_DMA_FLAG=0 ++CONFIG_VIRT_TO_BUS=y ++# CONFIG_OWNERSHIP_TRACE is not set ++CONFIG_NMI_DEBUGGING=y ++CONFIG_DW_DMAC=y ++# CONFIG_HZ_100 is not set ++CONFIG_HZ_250=y ++# CONFIG_HZ_300 is not set ++# CONFIG_HZ_1000 is not set ++CONFIG_HZ=250 ++CONFIG_CMDLINE="" ++ ++# ++# Power management options ++# ++ ++# ++# CPU Frequency scaling ++# ++CONFIG_CPU_FREQ=y ++CONFIG_CPU_FREQ_TABLE=y ++# CONFIG_CPU_FREQ_DEBUG is not set ++# CONFIG_CPU_FREQ_STAT is not set ++CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y ++# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set ++# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set ++# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set ++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y ++# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set ++CONFIG_CPU_FREQ_GOV_USERSPACE=y ++CONFIG_CPU_FREQ_GOV_ONDEMAND=y ++# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set ++CONFIG_CPU_FREQ_AT32AP=y ++ ++# ++# Bus options ++# ++# CONFIG_ARCH_SUPPORTS_MSI is not set ++# CONFIG_PCCARD is not set ++ ++# ++# Executable file formats ++# ++CONFIG_BINFMT_ELF=y ++# CONFIG_BINFMT_MISC is not set ++ ++# ++# Networking ++# ++CONFIG_NET=y ++ ++# ++# Networking options ++# ++CONFIG_PACKET=y ++CONFIG_PACKET_MMAP=y ++CONFIG_UNIX=y ++# CONFIG_NET_KEY is not set ++CONFIG_INET=y ++# CONFIG_IP_MULTICAST is not set ++# CONFIG_IP_ADVANCED_ROUTER is not set ++CONFIG_IP_FIB_HASH=y ++# CONFIG_IP_PNP is not set ++# CONFIG_NET_IPIP is not set ++# CONFIG_NET_IPGRE is not set ++# CONFIG_ARPD is not set ++# CONFIG_SYN_COOKIES is not set ++# CONFIG_INET_AH is not set ++# CONFIG_INET_ESP is not set ++# CONFIG_INET_IPCOMP is not set ++# CONFIG_INET_XFRM_TUNNEL is not set ++# CONFIG_INET_TUNNEL is not set ++# CONFIG_INET_XFRM_MODE_TRANSPORT is not set ++# CONFIG_INET_XFRM_MODE_TUNNEL is not set ++# CONFIG_INET_XFRM_MODE_BEET is not set ++# CONFIG_INET_LRO is not set ++# CONFIG_INET_DIAG is not set ++# CONFIG_TCP_CONG_ADVANCED is not set ++CONFIG_TCP_CONG_CUBIC=y ++CONFIG_DEFAULT_TCP_CONG="cubic" ++# CONFIG_TCP_MD5SIG is not set ++# CONFIG_IPV6 is not set ++# CONFIG_INET6_XFRM_TUNNEL is not set ++# CONFIG_INET6_TUNNEL is not set ++# CONFIG_NETWORK_SECMARK is not set ++# CONFIG_NETFILTER is not set ++# CONFIG_IP_DCCP is not set ++# CONFIG_IP_SCTP is not set ++# CONFIG_TIPC is not set ++# CONFIG_ATM is not set ++# CONFIG_BRIDGE is not set ++# CONFIG_VLAN_8021Q is not set ++# CONFIG_DECNET is not set ++# CONFIG_LLC2 is not set ++# CONFIG_IPX is not set ++# CONFIG_ATALK is not set ++# CONFIG_X25 is not set ++# CONFIG_LAPB is not set ++# CONFIG_ECONET is not set ++# CONFIG_WAN_ROUTER is not set ++# CONFIG_NET_SCHED is not set ++ ++# ++# Network testing ++# ++# CONFIG_NET_PKTGEN is not set ++# CONFIG_NET_TCPPROBE is not set ++# CONFIG_HAMRADIO is not set ++# CONFIG_IRDA is not set ++# CONFIG_BT is not set ++# CONFIG_AF_RXRPC is not set ++ ++# ++# Wireless ++# ++# CONFIG_CFG80211 is not set ++# CONFIG_WIRELESS_EXT is not set ++# CONFIG_MAC80211 is not set ++# CONFIG_IEEE80211 is not set ++# CONFIG_RFKILL is not set ++# CONFIG_NET_9P is not set ++ ++# ++# Device Drivers ++# ++ ++# ++# Generic Driver Options ++# ++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" ++CONFIG_STANDALONE=y ++# CONFIG_PREVENT_FIRMWARE_BUILD is not set ++# CONFIG_FW_LOADER is not set ++# CONFIG_DEBUG_DRIVER is not set ++# CONFIG_DEBUG_DEVRES is not set ++# CONFIG_SYS_HYPERVISOR is not set ++# CONFIG_CONNECTOR is not set ++CONFIG_MTD=y ++# CONFIG_MTD_DEBUG is not set ++# CONFIG_MTD_CONCAT is not set ++CONFIG_MTD_PARTITIONS=y ++# CONFIG_MTD_REDBOOT_PARTS is not set ++CONFIG_MTD_CMDLINE_PARTS=y ++ ++# ++# User Modules And Translation Layers ++# ++CONFIG_MTD_CHAR=y ++CONFIG_MTD_BLKDEVS=y ++CONFIG_MTD_BLOCK=y ++# CONFIG_FTL is not set ++# CONFIG_NFTL is not set ++# CONFIG_INFTL is not set ++# CONFIG_RFD_FTL is not set ++# CONFIG_SSFDC is not set ++# CONFIG_MTD_OOPS is not set ++ ++# ++# RAM/ROM/Flash chip drivers ++# ++CONFIG_MTD_CFI=y ++# CONFIG_MTD_JEDECPROBE is not set ++CONFIG_MTD_GEN_PROBE=y ++# CONFIG_MTD_CFI_ADV_OPTIONS is not set ++CONFIG_MTD_MAP_BANK_WIDTH_1=y ++CONFIG_MTD_MAP_BANK_WIDTH_2=y ++CONFIG_MTD_MAP_BANK_WIDTH_4=y ++# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set ++# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set ++# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set ++CONFIG_MTD_CFI_I1=y ++CONFIG_MTD_CFI_I2=y ++# CONFIG_MTD_CFI_I4 is not set ++# CONFIG_MTD_CFI_I8 is not set ++# CONFIG_MTD_CFI_INTELEXT is not set ++CONFIG_MTD_CFI_AMDSTD=y ++# CONFIG_MTD_CFI_STAA is not set ++CONFIG_MTD_CFI_UTIL=y ++# CONFIG_MTD_RAM is not set ++# CONFIG_MTD_ROM is not set ++# CONFIG_MTD_ABSENT is not set ++ ++# ++# Mapping drivers for chip access ++# ++# CONFIG_MTD_COMPLEX_MAPPINGS is not set ++CONFIG_MTD_PHYSMAP=y ++CONFIG_MTD_PHYSMAP_START=0x8000000 ++CONFIG_MTD_PHYSMAP_LEN=0x0 ++CONFIG_MTD_PHYSMAP_BANKWIDTH=2 ++# CONFIG_MTD_PLATRAM is not set ++ ++# ++# Self-contained MTD device drivers ++# ++CONFIG_MTD_DATAFLASH=m ++CONFIG_MTD_M25P80=m ++# CONFIG_MTD_SLRAM is not set ++# CONFIG_MTD_PHRAM is not set ++# CONFIG_MTD_MTDRAM is not set ++# CONFIG_MTD_BLOCK2MTD is not set ++ ++# ++# Disk-On-Chip Device Drivers ++# ++# CONFIG_MTD_DOC2000 is not set ++# CONFIG_MTD_DOC2001 is not set ++# CONFIG_MTD_DOC2001PLUS is not set ++# CONFIG_MTD_NAND is not set ++# CONFIG_MTD_ONENAND is not set ++ ++# ++# UBI - Unsorted block images ++# ++# CONFIG_MTD_UBI is not set ++# CONFIG_PARPORT is not set ++CONFIG_BLK_DEV=y ++# CONFIG_BLK_DEV_COW_COMMON is not set ++CONFIG_BLK_DEV_LOOP=m ++# CONFIG_BLK_DEV_CRYPTOLOOP is not set ++CONFIG_BLK_DEV_NBD=m ++CONFIG_BLK_DEV_RAM=m ++CONFIG_BLK_DEV_RAM_COUNT=16 ++CONFIG_BLK_DEV_RAM_SIZE=4096 ++CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 ++# CONFIG_CDROM_PKTCDVD is not set ++# CONFIG_ATA_OVER_ETH is not set ++CONFIG_MISC_DEVICES=y ++CONFIG_ATMEL_PWM=m ++# CONFIG_EEPROM_93CX6 is not set ++CONFIG_ATMEL_SSC=m ++# CONFIG_IDE is not set ++ ++# ++# SCSI device support ++# ++# CONFIG_RAID_ATTRS is not set ++CONFIG_SCSI=m ++CONFIG_SCSI_DMA=y ++# CONFIG_SCSI_TGT is not set ++# CONFIG_SCSI_NETLINK is not set ++# CONFIG_SCSI_PROC_FS is not set ++ ++# ++# SCSI support type (disk, tape, CD-ROM) ++# ++CONFIG_BLK_DEV_SD=m ++# CONFIG_CHR_DEV_ST is not set ++# CONFIG_CHR_DEV_OSST is not set ++CONFIG_BLK_DEV_SR=m ++# CONFIG_BLK_DEV_SR_VENDOR is not set ++# CONFIG_CHR_DEV_SG is not set ++# CONFIG_CHR_DEV_SCH is not set ++ ++# ++# Some SCSI devices (e.g. CD jukebox) support multiple LUNs ++# ++# CONFIG_SCSI_MULTI_LUN is not set ++# CONFIG_SCSI_CONSTANTS is not set ++# CONFIG_SCSI_LOGGING is not set ++# CONFIG_SCSI_SCAN_ASYNC is not set ++CONFIG_SCSI_WAIT_SCAN=m ++ ++# ++# SCSI Transports ++# ++# CONFIG_SCSI_SPI_ATTRS is not set ++# CONFIG_SCSI_FC_ATTRS is not set ++# CONFIG_SCSI_ISCSI_ATTRS is not set ++# CONFIG_SCSI_SAS_LIBSAS is not set ++# CONFIG_SCSI_SRP_ATTRS is not set ++CONFIG_SCSI_LOWLEVEL=y ++# CONFIG_ISCSI_TCP is not set ++# CONFIG_SCSI_DEBUG is not set ++CONFIG_ATA=m ++# CONFIG_ATA_NONSTANDARD is not set ++CONFIG_PATA_AT32=m ++# CONFIG_PATA_PLATFORM is not set ++# CONFIG_MD is not set ++CONFIG_NETDEVICES=y ++# CONFIG_NETDEVICES_MULTIQUEUE is not set ++# CONFIG_DUMMY is not set ++# CONFIG_BONDING is not set ++# CONFIG_MACVLAN is not set ++# CONFIG_EQUALIZER is not set ++# CONFIG_TUN is not set ++# CONFIG_VETH is not set ++# CONFIG_NET_ETHERNET is not set ++# CONFIG_NETDEV_1000 is not set ++# CONFIG_NETDEV_10000 is not set ++ ++# ++# Wireless LAN ++# ++# CONFIG_WLAN_PRE80211 is not set ++# CONFIG_WLAN_80211 is not set ++# CONFIG_WAN is not set ++CONFIG_PPP=m ++# CONFIG_PPP_MULTILINK is not set ++# CONFIG_PPP_FILTER is not set ++CONFIG_PPP_ASYNC=m ++# CONFIG_PPP_SYNC_TTY is not set ++CONFIG_PPP_DEFLATE=m ++CONFIG_PPP_BSDCOMP=m ++# CONFIG_PPP_MPPE is not set ++# CONFIG_PPPOE is not set ++# CONFIG_PPPOL2TP is not set ++# CONFIG_SLIP is not set ++CONFIG_SLHC=m ++# CONFIG_SHAPER is not set ++# CONFIG_NETCONSOLE is not set ++# CONFIG_NETPOLL is not set ++# CONFIG_NET_POLL_CONTROLLER is not set ++# CONFIG_ISDN is not set ++# CONFIG_PHONE is not set ++ ++# ++# Input device support ++# ++CONFIG_INPUT=m ++# CONFIG_INPUT_FF_MEMLESS is not set ++CONFIG_INPUT_POLLDEV=m ++ ++# ++# Userland interfaces ++# ++CONFIG_INPUT_MOUSEDEV=m ++CONFIG_INPUT_MOUSEDEV_PSAUX=y ++CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 ++CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 ++# CONFIG_INPUT_JOYDEV is not set ++# CONFIG_INPUT_EVDEV is not set ++# CONFIG_INPUT_EVBUG is not set ++ ++# ++# Input Device Drivers ++# ++CONFIG_INPUT_KEYBOARD=y ++# CONFIG_KEYBOARD_ATKBD is not set ++# CONFIG_KEYBOARD_SUNKBD is not set ++# CONFIG_KEYBOARD_LKKBD is not set ++# CONFIG_KEYBOARD_XTKBD is not set ++# CONFIG_KEYBOARD_NEWTON is not set ++# CONFIG_KEYBOARD_STOWAWAY is not set ++CONFIG_KEYBOARD_GPIO=m ++CONFIG_INPUT_MOUSE=y ++# CONFIG_MOUSE_PS2 is not set ++# CONFIG_MOUSE_SERIAL is not set ++# CONFIG_MOUSE_VSXXXAA is not set ++CONFIG_MOUSE_GPIO=m ++# CONFIG_INPUT_JOYSTICK is not set ++# CONFIG_INPUT_TABLET is not set ++# CONFIG_INPUT_TOUCHSCREEN is not set ++# CONFIG_INPUT_MISC is not set ++ ++# ++# Hardware I/O ports ++# ++# CONFIG_SERIO is not set ++# CONFIG_GAMEPORT is not set ++ ++# ++# Character devices ++# ++# CONFIG_VT is not set ++# CONFIG_SERIAL_NONSTANDARD is not set ++ ++# ++# Serial drivers ++# ++# CONFIG_SERIAL_8250 is not set ++ ++# ++# Non-8250 serial port support ++# ++CONFIG_SERIAL_ATMEL=y ++CONFIG_SERIAL_ATMEL_CONSOLE=y ++CONFIG_SERIAL_ATMEL_PDC=y ++# CONFIG_SERIAL_ATMEL_TTYAT is not set ++CONFIG_SERIAL_CORE=y ++CONFIG_SERIAL_CORE_CONSOLE=y ++CONFIG_UNIX98_PTYS=y ++# CONFIG_LEGACY_PTYS is not set ++# CONFIG_IPMI_HANDLER is not set ++# CONFIG_HW_RANDOM is not set ++# CONFIG_RTC is not set ++# CONFIG_GEN_RTC is not set ++# CONFIG_R3964 is not set ++# CONFIG_RAW_DRIVER is not set ++# CONFIG_TCG_TPM is not set ++CONFIG_I2C=m ++CONFIG_I2C_BOARDINFO=y ++CONFIG_I2C_CHARDEV=m ++ ++# ++# I2C Algorithms ++# ++CONFIG_I2C_ALGOBIT=m ++# CONFIG_I2C_ALGOPCF is not set ++# CONFIG_I2C_ALGOPCA is not set ++ ++# ++# I2C Hardware Bus support ++# ++CONFIG_I2C_ATMELTWI=m ++CONFIG_I2C_GPIO=m ++# CONFIG_I2C_OCORES is not set ++# CONFIG_I2C_PARPORT_LIGHT is not set ++# CONFIG_I2C_SIMTEC is not set ++# CONFIG_I2C_TAOS_EVM is not set ++# CONFIG_I2C_STUB is not set ++ ++# ++# Miscellaneous I2C Chip support ++# ++# CONFIG_SENSORS_DS1337 is not set ++# CONFIG_SENSORS_DS1374 is not set ++# CONFIG_DS1682 is not set ++# CONFIG_SENSORS_EEPROM is not set ++# CONFIG_SENSORS_PCF8574 is not set ++# CONFIG_SENSORS_PCA9539 is not set ++# CONFIG_SENSORS_PCF8591 is not set ++# CONFIG_SENSORS_MAX6875 is not set ++# CONFIG_SENSORS_TSL2550 is not set ++# CONFIG_I2C_DEBUG_CORE is not set ++# CONFIG_I2C_DEBUG_ALGO is not set ++# CONFIG_I2C_DEBUG_BUS is not set ++# CONFIG_I2C_DEBUG_CHIP is not set ++ ++# ++# SPI support ++# ++CONFIG_SPI=y ++# CONFIG_SPI_DEBUG is not set ++CONFIG_SPI_MASTER=y ++ ++# ++# SPI Master Controller Drivers ++# ++CONFIG_SPI_ATMEL=y ++# CONFIG_SPI_BITBANG is not set ++ ++# ++# SPI Protocol Masters ++# ++# CONFIG_SPI_AT25 is not set ++CONFIG_SPI_SPIDEV=m ++# CONFIG_SPI_TLE62X0 is not set ++# CONFIG_W1 is not set ++# CONFIG_POWER_SUPPLY is not set ++# CONFIG_HWMON is not set ++CONFIG_WATCHDOG=y ++# CONFIG_WATCHDOG_NOWAYOUT is not set ++ ++# ++# Watchdog Device Drivers ++# ++# CONFIG_SOFT_WATCHDOG is not set ++CONFIG_AT32AP700X_WDT=y ++ ++# ++# Sonics Silicon Backplane ++# ++CONFIG_SSB_POSSIBLE=y ++# CONFIG_SSB is not set ++ ++# ++# Multifunction device drivers ++# ++# CONFIG_MFD_SM501 is not set ++ ++# ++# Multimedia devices ++# ++# CONFIG_VIDEO_DEV is not set ++# CONFIG_DVB_CORE is not set ++# CONFIG_DAB is not set ++ ++# ++# Graphics support ++# ++# CONFIG_VGASTATE is not set ++# CONFIG_VIDEO_OUTPUT_CONTROL is not set ++# CONFIG_FB is not set ++# CONFIG_BACKLIGHT_LCD_SUPPORT is not set ++ ++# ++# Display device support ++# ++# CONFIG_DISPLAY_SUPPORT is not set ++ ++# ++# Sound ++# ++CONFIG_SOUND=m ++ ++# ++# Advanced Linux Sound Architecture ++# ++CONFIG_SND=m ++CONFIG_SND_TIMER=m ++CONFIG_SND_PCM=m ++# CONFIG_SND_SEQUENCER is not set ++CONFIG_SND_OSSEMUL=y ++CONFIG_SND_MIXER_OSS=m ++CONFIG_SND_PCM_OSS=m ++CONFIG_SND_PCM_OSS_PLUGINS=y ++# CONFIG_SND_DYNAMIC_MINORS is not set ++CONFIG_SND_SUPPORT_OLD_API=y ++CONFIG_SND_VERBOSE_PROCFS=y ++# CONFIG_SND_VERBOSE_PRINTK is not set ++# CONFIG_SND_DEBUG is not set ++ ++# ++# Generic devices ++# ++CONFIG_SND_AC97_CODEC=m ++# CONFIG_SND_DUMMY is not set ++# CONFIG_SND_MTPAV is not set ++# CONFIG_SND_SERIAL_U16550 is not set ++# CONFIG_SND_MPU401 is not set ++ ++# ++# AVR32 devices ++# ++CONFIG_SND_ATMEL_AC97=m ++ ++# ++# SPI devices ++# ++CONFIG_SND_AT73C213=m ++CONFIG_SND_AT73C213_TARGET_BITRATE=48000 ++ ++# ++# System on Chip audio support ++# ++# CONFIG_SND_SOC is not set ++ ++# ++# SoC Audio support for SuperH ++# ++ ++# ++# Open Sound System ++# ++# CONFIG_SOUND_PRIME is not set ++CONFIG_AC97_BUS=m ++# CONFIG_HID_SUPPORT is not set ++CONFIG_USB_SUPPORT=y ++# CONFIG_USB_ARCH_HAS_HCD is not set ++# CONFIG_USB_ARCH_HAS_OHCI is not set ++# CONFIG_USB_ARCH_HAS_EHCI is not set ++ ++# ++# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' ++# ++ ++# ++# USB Gadget Support ++# ++CONFIG_USB_GADGET=y ++# CONFIG_USB_GADGET_DEBUG is not set ++# CONFIG_USB_GADGET_DEBUG_FILES is not set ++CONFIG_USB_GADGET_DEBUG_FS=y ++CONFIG_USB_GADGET_SELECTED=y ++# CONFIG_USB_GADGET_AMD5536UDC is not set ++CONFIG_USB_GADGET_ATMEL_USBA=y ++CONFIG_USB_ATMEL_USBA=y ++# CONFIG_USB_GADGET_FSL_USB2 is not set ++# CONFIG_USB_GADGET_NET2280 is not set ++# CONFIG_USB_GADGET_PXA2XX is not set ++# CONFIG_USB_GADGET_M66592 is not set ++# CONFIG_USB_GADGET_GOKU is not set ++# CONFIG_USB_GADGET_LH7A40X is not set ++# CONFIG_USB_GADGET_OMAP is not set ++# CONFIG_USB_GADGET_S3C2410 is not set ++# CONFIG_USB_GADGET_AT91 is not set ++# CONFIG_USB_GADGET_DUMMY_HCD is not set ++CONFIG_USB_GADGET_DUALSPEED=y ++CONFIG_USB_ZERO=m ++CONFIG_USB_ETH=m ++CONFIG_USB_ETH_RNDIS=y ++CONFIG_USB_GADGETFS=m ++CONFIG_USB_FILE_STORAGE=m ++# CONFIG_USB_FILE_STORAGE_TEST is not set ++CONFIG_USB_G_SERIAL=m ++# CONFIG_USB_MIDI_GADGET is not set ++CONFIG_MMC=y ++# CONFIG_MMC_DEBUG is not set ++# CONFIG_MMC_UNSAFE_RESUME is not set ++ ++# ++# MMC/SD Card Drivers ++# ++CONFIG_MMC_BLOCK=y ++# CONFIG_MMC_BLOCK_BOUNCE is not set ++# CONFIG_SDIO_UART is not set ++ ++# ++# MMC/SD Host Controller Drivers ++# ++CONFIG_MMC_ATMELMCI=y ++CONFIG_MMC_SPI=m ++CONFIG_NEW_LEDS=y ++CONFIG_LEDS_CLASS=y ++ ++# ++# LED drivers ++# ++CONFIG_LEDS_ATMEL_PWM=m ++CONFIG_LEDS_GPIO=y ++ ++# ++# LED Triggers ++# ++CONFIG_LEDS_TRIGGERS=y ++CONFIG_LEDS_TRIGGER_TIMER=y ++CONFIG_LEDS_TRIGGER_HEARTBEAT=y ++CONFIG_RTC_LIB=y ++CONFIG_RTC_CLASS=y ++CONFIG_RTC_HCTOSYS=y ++CONFIG_RTC_HCTOSYS_DEVICE="rtc0" ++# CONFIG_RTC_DEBUG is not set ++ ++# ++# RTC interfaces ++# ++CONFIG_RTC_INTF_SYSFS=y ++CONFIG_RTC_INTF_PROC=y ++CONFIG_RTC_INTF_DEV=y ++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set ++# CONFIG_RTC_DRV_TEST is not set ++ ++# ++# I2C RTC drivers ++# ++# CONFIG_RTC_DRV_DS1307 is not set ++# CONFIG_RTC_DRV_DS1374 is not set ++# CONFIG_RTC_DRV_DS1672 is not set ++# CONFIG_RTC_DRV_MAX6900 is not set ++# CONFIG_RTC_DRV_RS5C372 is not set ++# CONFIG_RTC_DRV_ISL1208 is not set ++# CONFIG_RTC_DRV_X1205 is not set ++# CONFIG_RTC_DRV_PCF8563 is not set ++# CONFIG_RTC_DRV_PCF8583 is not set ++# CONFIG_RTC_DRV_M41T80 is not set ++ ++# ++# SPI RTC drivers ++# ++# CONFIG_RTC_DRV_RS5C348 is not set ++# CONFIG_RTC_DRV_MAX6902 is not set ++ ++# ++# Platform RTC drivers ++# ++# CONFIG_RTC_DRV_DS1553 is not set ++# CONFIG_RTC_DRV_STK17TA8 is not set ++# CONFIG_RTC_DRV_DS1742 is not set ++# CONFIG_RTC_DRV_M48T86 is not set ++# CONFIG_RTC_DRV_M48T59 is not set ++# CONFIG_RTC_DRV_V3020 is not set ++ ++# ++# on-CPU RTC drivers ++# ++CONFIG_RTC_DRV_AT32AP700X=y ++ ++# ++# Userspace I/O ++# ++CONFIG_UIO=m ++ ++# ++# File systems ++# ++CONFIG_EXT2_FS=m ++# CONFIG_EXT2_FS_XATTR is not set ++# CONFIG_EXT2_FS_XIP is not set ++CONFIG_EXT3_FS=m ++# CONFIG_EXT3_FS_XATTR is not set ++# CONFIG_EXT4DEV_FS is not set ++CONFIG_JBD=m ++# CONFIG_JBD_DEBUG is not set ++# CONFIG_REISERFS_FS is not set ++# CONFIG_JFS_FS is not set ++# CONFIG_FS_POSIX_ACL is not set ++# CONFIG_XFS_FS is not set ++# CONFIG_GFS2_FS is not set ++# CONFIG_OCFS2_FS is not set ++# CONFIG_MINIX_FS is not set ++# CONFIG_ROMFS_FS is not set ++CONFIG_INOTIFY=y ++CONFIG_INOTIFY_USER=y ++# CONFIG_QUOTA is not set ++# CONFIG_DNOTIFY is not set ++# CONFIG_AUTOFS_FS is not set ++# CONFIG_AUTOFS4_FS is not set ++CONFIG_FUSE_FS=m ++ ++# ++# CD-ROM/DVD Filesystems ++# ++# CONFIG_ISO9660_FS is not set ++# CONFIG_UDF_FS is not set ++ ++# ++# DOS/FAT/NT Filesystems ++# ++CONFIG_FAT_FS=m ++CONFIG_MSDOS_FS=m ++CONFIG_VFAT_FS=m ++CONFIG_FAT_DEFAULT_CODEPAGE=437 ++CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" ++# CONFIG_NTFS_FS is not set ++ ++# ++# Pseudo filesystems ++# ++CONFIG_PROC_FS=y ++CONFIG_PROC_KCORE=y ++CONFIG_PROC_SYSCTL=y ++CONFIG_SYSFS=y ++CONFIG_TMPFS=y ++# CONFIG_TMPFS_POSIX_ACL is not set ++# CONFIG_HUGETLB_PAGE is not set ++CONFIG_CONFIGFS_FS=y ++ ++# ++# Miscellaneous filesystems ++# ++# CONFIG_ADFS_FS is not set ++# CONFIG_AFFS_FS is not set ++# CONFIG_HFS_FS is not set ++# CONFIG_HFSPLUS_FS is not set ++# CONFIG_BEFS_FS is not set ++# CONFIG_BFS_FS is not set ++# CONFIG_EFS_FS is not set ++CONFIG_JFFS2_FS=y ++CONFIG_JFFS2_FS_DEBUG=0 ++CONFIG_JFFS2_FS_WRITEBUFFER=y ++# CONFIG_JFFS2_FS_WBUF_VERIFY is not set ++# CONFIG_JFFS2_SUMMARY is not set ++# CONFIG_JFFS2_FS_XATTR is not set ++# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set ++CONFIG_JFFS2_ZLIB=y ++# CONFIG_JFFS2_LZO is not set ++CONFIG_JFFS2_RTIME=y ++# CONFIG_JFFS2_RUBIN is not set ++# CONFIG_CRAMFS is not set ++# CONFIG_VXFS_FS is not set ++# CONFIG_HPFS_FS is not set ++# CONFIG_QNX4FS_FS is not set ++# CONFIG_SYSV_FS is not set ++# CONFIG_UFS_FS is not set ++# CONFIG_NETWORK_FILESYSTEMS is not set ++ ++# ++# Partition Types ++# ++# CONFIG_PARTITION_ADVANCED is not set ++CONFIG_MSDOS_PARTITION=y ++CONFIG_NLS=m ++CONFIG_NLS_DEFAULT="iso8859-1" ++CONFIG_NLS_CODEPAGE_437=m ++# CONFIG_NLS_CODEPAGE_737 is not set ++# CONFIG_NLS_CODEPAGE_775 is not set ++# CONFIG_NLS_CODEPAGE_850 is not set ++# CONFIG_NLS_CODEPAGE_852 is not set ++# CONFIG_NLS_CODEPAGE_855 is not set ++# CONFIG_NLS_CODEPAGE_857 is not set ++# CONFIG_NLS_CODEPAGE_860 is not set ++# CONFIG_NLS_CODEPAGE_861 is not set ++# CONFIG_NLS_CODEPAGE_862 is not set ++# CONFIG_NLS_CODEPAGE_863 is not set ++# CONFIG_NLS_CODEPAGE_864 is not set ++# CONFIG_NLS_CODEPAGE_865 is not set ++# CONFIG_NLS_CODEPAGE_866 is not set ++# CONFIG_NLS_CODEPAGE_869 is not set ++# CONFIG_NLS_CODEPAGE_936 is not set ++# CONFIG_NLS_CODEPAGE_950 is not set ++# CONFIG_NLS_CODEPAGE_932 is not set ++# CONFIG_NLS_CODEPAGE_949 is not set ++# CONFIG_NLS_CODEPAGE_874 is not set ++# CONFIG_NLS_ISO8859_8 is not set ++# CONFIG_NLS_CODEPAGE_1250 is not set ++# CONFIG_NLS_CODEPAGE_1251 is not set ++# CONFIG_NLS_ASCII is not set ++CONFIG_NLS_ISO8859_1=m ++# CONFIG_NLS_ISO8859_2 is not set ++# CONFIG_NLS_ISO8859_3 is not set ++# CONFIG_NLS_ISO8859_4 is not set ++# CONFIG_NLS_ISO8859_5 is not set ++# CONFIG_NLS_ISO8859_6 is not set ++# CONFIG_NLS_ISO8859_7 is not set ++# CONFIG_NLS_ISO8859_9 is not set ++# CONFIG_NLS_ISO8859_13 is not set ++# CONFIG_NLS_ISO8859_14 is not set ++# CONFIG_NLS_ISO8859_15 is not set ++# CONFIG_NLS_KOI8_R is not set ++# CONFIG_NLS_KOI8_U is not set ++CONFIG_NLS_UTF8=m ++# CONFIG_DLM is not set ++CONFIG_INSTRUMENTATION=y ++CONFIG_PROFILING=y ++CONFIG_OPROFILE=m ++CONFIG_KPROBES=y ++# CONFIG_MARKERS is not set ++ ++# ++# Kernel hacking ++# ++# CONFIG_PRINTK_TIME is not set ++CONFIG_ENABLE_WARN_DEPRECATED=y ++CONFIG_ENABLE_MUST_CHECK=y ++CONFIG_MAGIC_SYSRQ=y ++# CONFIG_UNUSED_SYMBOLS is not set ++CONFIG_DEBUG_FS=y ++# CONFIG_HEADERS_CHECK is not set ++CONFIG_DEBUG_KERNEL=y ++# CONFIG_DEBUG_SHIRQ is not set ++CONFIG_DETECT_SOFTLOCKUP=y ++CONFIG_SCHED_DEBUG=y ++# CONFIG_SCHEDSTATS is not set ++# CONFIG_TIMER_STATS is not set ++# CONFIG_DEBUG_RT_MUTEXES is not set ++# CONFIG_RT_MUTEX_TESTER is not set ++# CONFIG_DEBUG_SPINLOCK is not set ++# CONFIG_DEBUG_MUTEXES is not set ++# CONFIG_DEBUG_LOCK_ALLOC is not set ++# CONFIG_PROVE_LOCKING is not set ++# CONFIG_LOCK_STAT is not set ++# CONFIG_DEBUG_SPINLOCK_SLEEP is not set ++# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set ++# CONFIG_DEBUG_KOBJECT is not set ++CONFIG_DEBUG_BUGVERBOSE=y ++# CONFIG_DEBUG_INFO is not set ++# CONFIG_DEBUG_VM is not set ++# CONFIG_DEBUG_LIST is not set ++# CONFIG_DEBUG_SG is not set ++CONFIG_FRAME_POINTER=y ++CONFIG_FORCED_INLINING=y ++# CONFIG_BOOT_PRINTK_DELAY is not set ++# CONFIG_RCU_TORTURE_TEST is not set ++# CONFIG_LKDTM is not set ++# CONFIG_FAULT_INJECTION is not set ++# CONFIG_SAMPLES is not set ++ ++# ++# Security options ++# ++# CONFIG_KEYS is not set ++# CONFIG_SECURITY is not set ++# CONFIG_SECURITY_FILE_CAPABILITIES is not set ++# CONFIG_CRYPTO is not set ++ ++# ++# Library routines ++# ++CONFIG_BITREVERSE=y ++CONFIG_CRC_CCITT=m ++# CONFIG_CRC16 is not set ++CONFIG_CRC_ITU_T=m ++CONFIG_CRC32=y ++CONFIG_CRC7=m ++# CONFIG_LIBCRC32C is not set ++CONFIG_AUDIT_GENERIC=y ++CONFIG_ZLIB_INFLATE=y ++CONFIG_ZLIB_DEFLATE=y ++CONFIG_PLIST=y ++CONFIG_HAS_IOMEM=y ++CONFIG_HAS_IOPORT=y ++CONFIG_HAS_DMA=y +diff --git a/arch/avr32/configs/atstk1004_defconfig b/arch/avr32/configs/atstk1004_defconfig +new file mode 100644 +index 0000000..559b065 +--- /dev/null ++++ b/arch/avr32/configs/atstk1004_defconfig +@@ -0,0 +1,627 @@ ++# ++# Automatically generated make config: don't edit ++# Linux kernel version: 2.6.24 ++# Tue Feb 5 18:13:33 2008 ++# ++CONFIG_AVR32=y ++CONFIG_GENERIC_GPIO=y ++CONFIG_GENERIC_HARDIRQS=y ++CONFIG_STACKTRACE_SUPPORT=y ++CONFIG_LOCKDEP_SUPPORT=y ++CONFIG_TRACE_IRQFLAGS_SUPPORT=y ++CONFIG_HARDIRQS_SW_RESEND=y ++CONFIG_GENERIC_IRQ_PROBE=y ++CONFIG_RWSEM_GENERIC_SPINLOCK=y ++CONFIG_GENERIC_TIME=y ++# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set ++# CONFIG_ARCH_HAS_ILOG2_U32 is not set ++# CONFIG_ARCH_HAS_ILOG2_U64 is not set ++CONFIG_ARCH_SUPPORTS_OPROFILE=y ++CONFIG_GENERIC_HWEIGHT=y ++CONFIG_GENERIC_CALIBRATE_DELAY=y ++CONFIG_GENERIC_BUG=y ++CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" ++ ++# ++# General setup ++# ++CONFIG_EXPERIMENTAL=y ++CONFIG_BROKEN_ON_SMP=y ++CONFIG_INIT_ENV_ARG_LIMIT=32 ++CONFIG_LOCALVERSION="" ++# CONFIG_LOCALVERSION_AUTO is not set ++# CONFIG_SYSVIPC is not set ++# CONFIG_POSIX_MQUEUE is not set ++# CONFIG_BSD_PROCESS_ACCT is not set ++# CONFIG_TASKSTATS is not set ++# CONFIG_USER_NS is not set ++# CONFIG_PID_NS is not set ++# CONFIG_AUDIT is not set ++# CONFIG_IKCONFIG is not set ++CONFIG_LOG_BUF_SHIFT=14 ++# CONFIG_CGROUPS is not set ++# CONFIG_FAIR_GROUP_SCHED is not set ++CONFIG_SYSFS_DEPRECATED=y ++# CONFIG_RELAY is not set ++# CONFIG_BLK_DEV_INITRD is not set ++CONFIG_CC_OPTIMIZE_FOR_SIZE=y ++CONFIG_SYSCTL=y ++CONFIG_EMBEDDED=y ++# CONFIG_SYSCTL_SYSCALL is not set ++CONFIG_KALLSYMS=y ++# CONFIG_KALLSYMS_EXTRA_PASS is not set ++CONFIG_HOTPLUG=y ++CONFIG_PRINTK=y ++CONFIG_BUG=y ++CONFIG_ELF_CORE=y ++# CONFIG_BASE_FULL is not set ++# CONFIG_FUTEX is not set ++# CONFIG_EPOLL is not set ++# CONFIG_SIGNALFD is not set ++# CONFIG_EVENTFD is not set ++CONFIG_SHMEM=y ++CONFIG_VM_EVENT_COUNTERS=y ++# CONFIG_SLAB is not set ++# CONFIG_SLUB is not set ++CONFIG_SLOB=y ++# CONFIG_TINY_SHMEM is not set ++CONFIG_BASE_SMALL=1 ++# CONFIG_MODULES is not set ++# CONFIG_BLOCK is not set ++ ++# ++# System Type and features ++# ++CONFIG_SUBARCH_AVR32B=y ++CONFIG_MMU=y ++CONFIG_PERFORMANCE_COUNTERS=y ++CONFIG_PLATFORM_AT32AP=y ++CONFIG_CPU_AT32AP700X=y ++CONFIG_CPU_AT32AP7002=y ++CONFIG_BOARD_ATSTK1000=y ++# CONFIG_BOARD_ATNGW100 is not set ++# CONFIG_BOARD_ATSTK1002 is not set ++# CONFIG_BOARD_ATSTK1003 is not set ++CONFIG_BOARD_ATSTK1004=y ++# CONFIG_BOARD_ATSTK100X_CUSTOM is not set ++# CONFIG_BOARD_ATSTK100X_SPI1 is not set ++# CONFIG_BOARD_ATSTK1000_J2_LED is not set ++CONFIG_BOARD_ATSTK1000_EXTDAC=y ++# CONFIG_BOARD_ATSTK100X_ENABLE_AC97 is not set ++# CONFIG_BOARD_ATSTK1000_CF_HACKS is not set ++CONFIG_LOADER_U_BOOT=y ++ ++# ++# Atmel AVR32 AP options ++# ++# CONFIG_AP700X_32_BIT_SMC is not set ++CONFIG_AP700X_16_BIT_SMC=y ++# CONFIG_AP700X_8_BIT_SMC is not set ++# CONFIG_GPIO_DEV is not set ++CONFIG_LOAD_ADDRESS=0x10000000 ++CONFIG_ENTRY_ADDRESS=0x90000000 ++CONFIG_PHYS_OFFSET=0x10000000 ++CONFIG_PREEMPT_NONE=y ++# CONFIG_PREEMPT_VOLUNTARY is not set ++# CONFIG_PREEMPT is not set ++# CONFIG_HAVE_ARCH_BOOTMEM_NODE is not set ++# CONFIG_ARCH_HAVE_MEMORY_PRESENT is not set ++# CONFIG_NEED_NODE_MEMMAP_SIZE is not set ++CONFIG_ARCH_FLATMEM_ENABLE=y ++# CONFIG_ARCH_DISCONTIGMEM_ENABLE is not set ++# CONFIG_ARCH_SPARSEMEM_ENABLE is not set ++CONFIG_SELECT_MEMORY_MODEL=y ++CONFIG_FLATMEM_MANUAL=y ++# CONFIG_DISCONTIGMEM_MANUAL is not set ++# CONFIG_SPARSEMEM_MANUAL is not set ++CONFIG_FLATMEM=y ++CONFIG_FLAT_NODE_MEM_MAP=y ++# CONFIG_SPARSEMEM_STATIC is not set ++# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set ++CONFIG_SPLIT_PTLOCK_CPUS=4 ++# CONFIG_RESOURCES_64BIT is not set ++CONFIG_ZONE_DMA_FLAG=0 ++CONFIG_VIRT_TO_BUS=y ++# CONFIG_OWNERSHIP_TRACE is not set ++# CONFIG_NMI_DEBUGGING is not set ++# CONFIG_DW_DMAC is not set ++# CONFIG_HZ_100 is not set ++CONFIG_HZ_250=y ++# CONFIG_HZ_300 is not set ++# CONFIG_HZ_1000 is not set ++CONFIG_HZ=250 ++CONFIG_CMDLINE="" ++ ++# ++# Power management options ++# ++ ++# ++# CPU Frequency scaling ++# ++CONFIG_CPU_FREQ=y ++CONFIG_CPU_FREQ_TABLE=y ++# CONFIG_CPU_FREQ_DEBUG is not set ++# CONFIG_CPU_FREQ_STAT is not set ++CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y ++# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set ++# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set ++# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set ++CONFIG_CPU_FREQ_GOV_PERFORMANCE=y ++# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set ++CONFIG_CPU_FREQ_GOV_USERSPACE=y ++CONFIG_CPU_FREQ_GOV_ONDEMAND=y ++# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set ++CONFIG_CPU_FREQ_AT32AP=y ++ ++# ++# Bus options ++# ++# CONFIG_ARCH_SUPPORTS_MSI is not set ++# CONFIG_PCCARD is not set ++ ++# ++# Executable file formats ++# ++CONFIG_BINFMT_ELF=y ++# CONFIG_BINFMT_MISC is not set ++ ++# ++# Networking ++# ++CONFIG_NET=y ++ ++# ++# Networking options ++# ++CONFIG_PACKET=y ++CONFIG_PACKET_MMAP=y ++CONFIG_UNIX=y ++# CONFIG_NET_KEY is not set ++CONFIG_INET=y ++# CONFIG_IP_MULTICAST is not set ++# CONFIG_IP_ADVANCED_ROUTER is not set ++CONFIG_IP_FIB_HASH=y ++# CONFIG_IP_PNP is not set ++# CONFIG_NET_IPIP is not set ++# CONFIG_NET_IPGRE is not set ++# CONFIG_ARPD is not set ++# CONFIG_SYN_COOKIES is not set ++# CONFIG_INET_AH is not set ++# CONFIG_INET_ESP is not set ++# CONFIG_INET_IPCOMP is not set ++# CONFIG_INET_XFRM_TUNNEL is not set ++# CONFIG_INET_TUNNEL is not set ++# CONFIG_INET_XFRM_MODE_TRANSPORT is not set ++# CONFIG_INET_XFRM_MODE_TUNNEL is not set ++# CONFIG_INET_XFRM_MODE_BEET is not set ++# CONFIG_INET_LRO is not set ++# CONFIG_INET_DIAG is not set ++# CONFIG_TCP_CONG_ADVANCED is not set ++CONFIG_TCP_CONG_CUBIC=y ++CONFIG_DEFAULT_TCP_CONG="cubic" ++# CONFIG_TCP_MD5SIG is not set ++# CONFIG_IPV6 is not set ++# CONFIG_INET6_XFRM_TUNNEL is not set ++# CONFIG_INET6_TUNNEL is not set ++# CONFIG_NETWORK_SECMARK is not set ++# CONFIG_NETFILTER is not set ++# CONFIG_IP_DCCP is not set ++# CONFIG_IP_SCTP is not set ++# CONFIG_TIPC is not set ++# CONFIG_ATM is not set ++# CONFIG_BRIDGE is not set ++# CONFIG_VLAN_8021Q is not set ++# CONFIG_DECNET is not set ++# CONFIG_LLC2 is not set ++# CONFIG_IPX is not set ++# CONFIG_ATALK is not set ++# CONFIG_X25 is not set ++# CONFIG_LAPB is not set ++# CONFIG_ECONET is not set ++# CONFIG_WAN_ROUTER is not set ++# CONFIG_NET_SCHED is not set ++ ++# ++# Network testing ++# ++# CONFIG_NET_PKTGEN is not set ++# CONFIG_HAMRADIO is not set ++# CONFIG_IRDA is not set ++# CONFIG_BT is not set ++# CONFIG_AF_RXRPC is not set ++ ++# ++# Wireless ++# ++# CONFIG_CFG80211 is not set ++# CONFIG_WIRELESS_EXT is not set ++# CONFIG_MAC80211 is not set ++# CONFIG_IEEE80211 is not set ++# CONFIG_RFKILL is not set ++# CONFIG_NET_9P is not set ++ ++# ++# Device Drivers ++# ++ ++# ++# Generic Driver Options ++# ++CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" ++CONFIG_STANDALONE=y ++# CONFIG_PREVENT_FIRMWARE_BUILD is not set ++# CONFIG_FW_LOADER is not set ++# CONFIG_SYS_HYPERVISOR is not set ++# CONFIG_CONNECTOR is not set ++CONFIG_MTD=y ++# CONFIG_MTD_DEBUG is not set ++# CONFIG_MTD_CONCAT is not set ++CONFIG_MTD_PARTITIONS=y ++# CONFIG_MTD_REDBOOT_PARTS is not set ++CONFIG_MTD_CMDLINE_PARTS=y ++ ++# ++# User Modules And Translation Layers ++# ++CONFIG_MTD_CHAR=y ++# CONFIG_MTD_OOPS is not set ++ ++# ++# RAM/ROM/Flash chip drivers ++# ++CONFIG_MTD_CFI=y ++# CONFIG_MTD_JEDECPROBE is not set ++CONFIG_MTD_GEN_PROBE=y ++# CONFIG_MTD_CFI_ADV_OPTIONS is not set ++CONFIG_MTD_MAP_BANK_WIDTH_1=y ++CONFIG_MTD_MAP_BANK_WIDTH_2=y ++CONFIG_MTD_MAP_BANK_WIDTH_4=y ++# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set ++# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set ++# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set ++CONFIG_MTD_CFI_I1=y ++CONFIG_MTD_CFI_I2=y ++# CONFIG_MTD_CFI_I4 is not set ++# CONFIG_MTD_CFI_I8 is not set ++# CONFIG_MTD_CFI_INTELEXT is not set ++CONFIG_MTD_CFI_AMDSTD=y ++# CONFIG_MTD_CFI_STAA is not set ++CONFIG_MTD_CFI_UTIL=y ++# CONFIG_MTD_RAM is not set ++# CONFIG_MTD_ROM is not set ++# CONFIG_MTD_ABSENT is not set ++ ++# ++# Mapping drivers for chip access ++# ++# CONFIG_MTD_COMPLEX_MAPPINGS is not set ++CONFIG_MTD_PHYSMAP=y ++CONFIG_MTD_PHYSMAP_START=0x8000000 ++CONFIG_MTD_PHYSMAP_LEN=0x0 ++CONFIG_MTD_PHYSMAP_BANKWIDTH=2 ++# CONFIG_MTD_PLATRAM is not set ++ ++# ++# Self-contained MTD device drivers ++# ++# CONFIG_MTD_DATAFLASH is not set ++# CONFIG_MTD_M25P80 is not set ++# CONFIG_MTD_SLRAM is not set ++# CONFIG_MTD_PHRAM is not set ++# CONFIG_MTD_MTDRAM is not set ++ ++# ++# Disk-On-Chip Device Drivers ++# ++# CONFIG_MTD_DOC2000 is not set ++# CONFIG_MTD_DOC2001 is not set ++# CONFIG_MTD_DOC2001PLUS is not set ++# CONFIG_MTD_NAND is not set ++# CONFIG_MTD_ONENAND is not set ++ ++# ++# UBI - Unsorted block images ++# ++# CONFIG_MTD_UBI is not set ++# CONFIG_PARPORT is not set ++# CONFIG_MISC_DEVICES is not set ++ ++# ++# SCSI device support ++# ++# CONFIG_SCSI_DMA is not set ++# CONFIG_SCSI_NETLINK is not set ++# CONFIG_NETDEVICES is not set ++# CONFIG_ISDN is not set ++# CONFIG_PHONE is not set ++ ++# ++# Input device support ++# ++# CONFIG_INPUT is not set ++ ++# ++# Hardware I/O ports ++# ++# CONFIG_SERIO is not set ++# CONFIG_GAMEPORT is not set ++ ++# ++# Character devices ++# ++# CONFIG_VT is not set ++# CONFIG_SERIAL_NONSTANDARD is not set ++ ++# ++# Serial drivers ++# ++# CONFIG_SERIAL_8250 is not set ++ ++# ++# Non-8250 serial port support ++# ++CONFIG_SERIAL_ATMEL=y ++CONFIG_SERIAL_ATMEL_CONSOLE=y ++# CONFIG_SERIAL_ATMEL_PDC is not set ++# CONFIG_SERIAL_ATMEL_TTYAT is not set ++CONFIG_SERIAL_CORE=y ++CONFIG_SERIAL_CORE_CONSOLE=y ++CONFIG_UNIX98_PTYS=y ++# CONFIG_LEGACY_PTYS is not set ++# CONFIG_IPMI_HANDLER is not set ++# CONFIG_HW_RANDOM is not set ++# CONFIG_RTC is not set ++# CONFIG_GEN_RTC is not set ++# CONFIG_R3964 is not set ++# CONFIG_TCG_TPM is not set ++# CONFIG_I2C is not set ++ ++# ++# SPI support ++# ++CONFIG_SPI=y ++CONFIG_SPI_MASTER=y ++ ++# ++# SPI Master Controller Drivers ++# ++CONFIG_SPI_ATMEL=y ++# CONFIG_SPI_BITBANG is not set ++ ++# ++# SPI Protocol Masters ++# ++# CONFIG_SPI_AT25 is not set ++# CONFIG_SPI_SPIDEV is not set ++# CONFIG_SPI_TLE62X0 is not set ++# CONFIG_W1 is not set ++# CONFIG_POWER_SUPPLY is not set ++# CONFIG_HWMON is not set ++CONFIG_WATCHDOG=y ++# CONFIG_WATCHDOG_NOWAYOUT is not set ++ ++# ++# Watchdog Device Drivers ++# ++# CONFIG_SOFT_WATCHDOG is not set ++CONFIG_AT32AP700X_WDT=y ++ ++# ++# Sonics Silicon Backplane ++# ++CONFIG_SSB_POSSIBLE=y ++# CONFIG_SSB is not set ++ ++# ++# Multifunction device drivers ++# ++# CONFIG_MFD_SM501 is not set ++ ++# ++# Multimedia devices ++# ++# CONFIG_VIDEO_DEV is not set ++# CONFIG_DVB_CORE is not set ++# CONFIG_DAB is not set ++ ++# ++# Graphics support ++# ++# CONFIG_VGASTATE is not set ++# CONFIG_VIDEO_OUTPUT_CONTROL is not set ++CONFIG_FB=y ++# CONFIG_FIRMWARE_EDID is not set ++# CONFIG_FB_DDC is not set ++CONFIG_FB_CFB_FILLRECT=y ++CONFIG_FB_CFB_COPYAREA=y ++CONFIG_FB_CFB_IMAGEBLIT=y ++# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set ++# CONFIG_FB_SYS_FILLRECT is not set ++# CONFIG_FB_SYS_COPYAREA is not set ++# CONFIG_FB_SYS_IMAGEBLIT is not set ++# CONFIG_FB_SYS_FOPS is not set ++CONFIG_FB_DEFERRED_IO=y ++# CONFIG_FB_SVGALIB is not set ++# CONFIG_FB_MACMODES is not set ++# CONFIG_FB_BACKLIGHT is not set ++# CONFIG_FB_MODE_HELPERS is not set ++# CONFIG_FB_TILEBLITTING is not set ++ ++# ++# Frame buffer hardware drivers ++# ++# CONFIG_FB_S1D13XXX is not set ++CONFIG_FB_ATMEL=y ++# CONFIG_FB_VIRTUAL is not set ++CONFIG_BACKLIGHT_LCD_SUPPORT=y ++CONFIG_LCD_CLASS_DEVICE=y ++CONFIG_LCD_LTV350QV=y ++# CONFIG_BACKLIGHT_CLASS_DEVICE is not set ++ ++# ++# Display device support ++# ++# CONFIG_DISPLAY_SUPPORT is not set ++# CONFIG_LOGO is not set ++ ++# ++# Sound ++# ++# CONFIG_SOUND is not set ++CONFIG_USB_SUPPORT=y ++# CONFIG_USB_ARCH_HAS_HCD is not set ++# CONFIG_USB_ARCH_HAS_OHCI is not set ++# CONFIG_USB_ARCH_HAS_EHCI is not set ++ ++# ++# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' ++# ++ ++# ++# USB Gadget Support ++# ++CONFIG_USB_GADGET=y ++# CONFIG_USB_GADGET_DEBUG_FILES is not set ++CONFIG_USB_GADGET_SELECTED=y ++# CONFIG_USB_GADGET_AMD5536UDC is not set ++CONFIG_USB_GADGET_ATMEL_USBA=y ++CONFIG_USB_ATMEL_USBA=y ++# CONFIG_USB_GADGET_FSL_USB2 is not set ++# CONFIG_USB_GADGET_NET2280 is not set ++# CONFIG_USB_GADGET_PXA2XX is not set ++# CONFIG_USB_GADGET_M66592 is not set ++# CONFIG_USB_GADGET_GOKU is not set ++# CONFIG_USB_GADGET_LH7A40X is not set ++# CONFIG_USB_GADGET_OMAP is not set ++# CONFIG_USB_GADGET_S3C2410 is not set ++# CONFIG_USB_GADGET_AT91 is not set ++# CONFIG_USB_GADGET_DUMMY_HCD is not set ++CONFIG_USB_GADGET_DUALSPEED=y ++# CONFIG_USB_ZERO is not set ++CONFIG_USB_ETH=y ++# CONFIG_USB_ETH_RNDIS is not set ++# CONFIG_USB_GADGETFS is not set ++# CONFIG_USB_FILE_STORAGE is not set ++# CONFIG_USB_G_SERIAL is not set ++# CONFIG_USB_MIDI_GADGET is not set ++# CONFIG_MMC is not set ++# CONFIG_NEW_LEDS is not set ++CONFIG_RTC_LIB=y ++CONFIG_RTC_CLASS=y ++CONFIG_RTC_HCTOSYS=y ++CONFIG_RTC_HCTOSYS_DEVICE="rtc0" ++# CONFIG_RTC_DEBUG is not set ++ ++# ++# RTC interfaces ++# ++CONFIG_RTC_INTF_SYSFS=y ++# CONFIG_RTC_INTF_PROC is not set ++CONFIG_RTC_INTF_DEV=y ++# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set ++# CONFIG_RTC_DRV_TEST is not set ++ ++# ++# SPI RTC drivers ++# ++# CONFIG_RTC_DRV_RS5C348 is not set ++# CONFIG_RTC_DRV_MAX6902 is not set ++ ++# ++# Platform RTC drivers ++# ++# CONFIG_RTC_DRV_DS1553 is not set ++# CONFIG_RTC_DRV_STK17TA8 is not set ++# CONFIG_RTC_DRV_DS1742 is not set ++# CONFIG_RTC_DRV_M48T86 is not set ++# CONFIG_RTC_DRV_M48T59 is not set ++# CONFIG_RTC_DRV_V3020 is not set ++ ++# ++# on-CPU RTC drivers ++# ++CONFIG_RTC_DRV_AT32AP700X=y ++ ++# ++# Userspace I/O ++# ++# CONFIG_UIO is not set ++ ++# ++# File systems ++# ++# CONFIG_INOTIFY is not set ++# CONFIG_QUOTA is not set ++# CONFIG_DNOTIFY is not set ++# CONFIG_AUTOFS_FS is not set ++# CONFIG_AUTOFS4_FS is not set ++# CONFIG_FUSE_FS is not set ++ ++# ++# Pseudo filesystems ++# ++CONFIG_PROC_FS=y ++CONFIG_PROC_KCORE=y ++CONFIG_PROC_SYSCTL=y ++CONFIG_SYSFS=y ++CONFIG_TMPFS=y ++# CONFIG_TMPFS_POSIX_ACL is not set ++# CONFIG_HUGETLB_PAGE is not set ++# CONFIG_CONFIGFS_FS is not set ++ ++# ++# Miscellaneous filesystems ++# ++CONFIG_JFFS2_FS=y ++CONFIG_JFFS2_FS_DEBUG=0 ++# CONFIG_JFFS2_FS_WRITEBUFFER is not set ++# CONFIG_JFFS2_SUMMARY is not set ++# CONFIG_JFFS2_FS_XATTR is not set ++# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set ++CONFIG_JFFS2_ZLIB=y ++# CONFIG_JFFS2_LZO is not set ++CONFIG_JFFS2_RTIME=y ++# CONFIG_JFFS2_RUBIN is not set ++# CONFIG_NETWORK_FILESYSTEMS is not set ++# CONFIG_NLS is not set ++# CONFIG_DLM is not set ++# CONFIG_INSTRUMENTATION is not set ++ ++# ++# Kernel hacking ++# ++# CONFIG_PRINTK_TIME is not set ++CONFIG_ENABLE_WARN_DEPRECATED=y ++CONFIG_ENABLE_MUST_CHECK=y ++CONFIG_MAGIC_SYSRQ=y ++# CONFIG_UNUSED_SYMBOLS is not set ++# CONFIG_DEBUG_FS is not set ++# CONFIG_HEADERS_CHECK is not set ++# CONFIG_DEBUG_KERNEL is not set ++# CONFIG_DEBUG_BUGVERBOSE is not set ++# CONFIG_SAMPLES is not set ++ ++# ++# Security options ++# ++# CONFIG_KEYS is not set ++# CONFIG_SECURITY is not set ++# CONFIG_SECURITY_FILE_CAPABILITIES is not set ++# CONFIG_CRYPTO is not set ++ ++# ++# Library routines ++# ++CONFIG_BITREVERSE=y ++# CONFIG_CRC_CCITT is not set ++# CONFIG_CRC16 is not set ++# CONFIG_CRC_ITU_T is not set ++CONFIG_CRC32=y ++# CONFIG_CRC7 is not set ++# CONFIG_LIBCRC32C is not set ++CONFIG_ZLIB_INFLATE=y ++CONFIG_ZLIB_DEFLATE=y ++CONFIG_HAS_IOMEM=y ++CONFIG_HAS_IOPORT=y ++CONFIG_HAS_DMA=y diff --git a/arch/avr32/drivers/Makefile b/arch/avr32/drivers/Makefile new file mode 100644 index 0000000..b429b75 @@ -2170,21 +5821,218 @@ index 0000000..1f67921 + +#endif /* __AVR32_DW_DMAC_H__ */ diff --git a/arch/avr32/kernel/Makefile b/arch/avr32/kernel/Makefile -index 90e5aff..1aedaeb 100644 +index 2d6d48f..88226b6 100644 --- a/arch/avr32/kernel/Makefile +++ b/arch/avr32/kernel/Makefile -@@ -9,10 +9,6 @@ obj-y += syscall_table.o syscall-stubs.o irq.o - obj-y += setup.o traps.o semaphore.o ptrace.o +@@ -6,9 +6,11 @@ extra-y := head.o vmlinux.lds + + obj-$(CONFIG_SUBARCH_AVR32B) += entry-avr32b.o + obj-y += syscall_table.o syscall-stubs.o irq.o +-obj-y += setup.o traps.o semaphore.o ptrace.o ++obj-y += setup.o traps.o semaphore.o ocd.o ptrace.o obj-y += signal.o sys_avr32.o process.o time.o obj-y += init_task.o switch_to.o cpu.o +obj-y += dma-controller.o obj-$(CONFIG_MODULES) += module.o avr32_ksyms.o obj-$(CONFIG_KPROBES) += kprobes.o -- --USE_STANDARD_AS_RULE := true -- --%.lds: %.lds.c FORCE -- $(call if_changed_dep,cpp_lds_S) + obj-$(CONFIG_STACKTRACE) += stacktrace.o ++obj-$(CONFIG_NMI_DEBUGGING) += nmi_debug.o +diff --git a/arch/avr32/kernel/cpu.c b/arch/avr32/kernel/cpu.c +index 2714cf6..b8409ca 100644 +--- a/arch/avr32/kernel/cpu.c ++++ b/arch/avr32/kernel/cpu.c +@@ -13,6 +13,7 @@ + #include <linux/percpu.h> + #include <linux/param.h> + #include <linux/errno.h> ++#include <linux/clk.h> + + #include <asm/setup.h> + #include <asm/sysreg.h> +@@ -187,9 +188,20 @@ static int __init topology_init(void) + + subsys_initcall(topology_init); + ++struct chip_id_map { ++ u16 mid; ++ u16 pn; ++ const char *name; ++}; ++ ++static const struct chip_id_map chip_names[] = { ++ { .mid = 0x1f, .pn = 0x1e82, .name = "AT32AP700x" }, ++}; ++#define NR_CHIP_NAMES ARRAY_SIZE(chip_names) ++ + static const char *cpu_names[] = { + "Morgan", +- "AP7000", ++ "AP7", + }; + #define NR_CPU_NAMES ARRAY_SIZE(cpu_names) + +@@ -206,12 +218,32 @@ static const char *mmu_types[] = { + "MPU" + }; + ++static const char *cpu_feature_flags[] = { ++ "rmw", "dsp", "simd", "ocd", "perfctr", "java", "fpu", ++}; ++ ++static const char *get_chip_name(struct avr32_cpuinfo *cpu) ++{ ++ unsigned int i; ++ unsigned int mid = avr32_get_manufacturer_id(cpu); ++ unsigned int pn = avr32_get_product_number(cpu); ++ ++ for (i = 0; i < NR_CHIP_NAMES; i++) { ++ if (chip_names[i].mid == mid && chip_names[i].pn == pn) ++ return chip_names[i].name; ++ } ++ ++ return "(unknown)"; ++} ++ + void __init setup_processor(void) + { + unsigned long config0, config1; + unsigned long features; + unsigned cpu_id, cpu_rev, arch_id, arch_rev, mmu_type; ++ unsigned device_id; + unsigned tmp; ++ unsigned i; + + config0 = sysreg_read(CONFIG0); + config1 = sysreg_read(CONFIG1); +@@ -221,11 +253,14 @@ void __init setup_processor(void) + arch_rev = SYSREG_BFEXT(AR, config0); + mmu_type = SYSREG_BFEXT(MMUT, config0); + ++ device_id = ocd_read(DID); ++ + boot_cpu_data.arch_type = arch_id; + boot_cpu_data.cpu_type = cpu_id; + boot_cpu_data.arch_revision = arch_rev; + boot_cpu_data.cpu_revision = cpu_rev; + boot_cpu_data.tlb_config = mmu_type; ++ boot_cpu_data.device_id = device_id; + + tmp = SYSREG_BFEXT(ILSZ, config1); + if (tmp) { +@@ -247,41 +282,34 @@ void __init setup_processor(void) + return; + } + +- printk ("CPU: %s [%02x] revision %d (%s revision %d)\n", ++ printk ("CPU: %s chip revision %c\n", get_chip_name(&boot_cpu_data), ++ avr32_get_chip_revision(&boot_cpu_data) + 'A'); ++ printk ("CPU: %s [%02x] core revision %d (%s arch revision %d)\n", + cpu_names[cpu_id], cpu_id, cpu_rev, + arch_names[arch_id], arch_rev); + printk ("CPU: MMU configuration: %s\n", mmu_types[mmu_type]); + + printk ("CPU: features:"); + features = 0; +- if (config0 & SYSREG_BIT(CONFIG0_R)) { ++ if (config0 & SYSREG_BIT(CONFIG0_R)) + features |= AVR32_FEATURE_RMW; +- printk(" rmw"); +- } +- if (config0 & SYSREG_BIT(CONFIG0_D)) { ++ if (config0 & SYSREG_BIT(CONFIG0_D)) + features |= AVR32_FEATURE_DSP; +- printk(" dsp"); +- } +- if (config0 & SYSREG_BIT(CONFIG0_S)) { ++ if (config0 & SYSREG_BIT(CONFIG0_S)) + features |= AVR32_FEATURE_SIMD; +- printk(" simd"); +- } +- if (config0 & SYSREG_BIT(CONFIG0_O)) { ++ if (config0 & SYSREG_BIT(CONFIG0_O)) + features |= AVR32_FEATURE_OCD; +- printk(" ocd"); +- } +- if (config0 & SYSREG_BIT(CONFIG0_P)) { ++ if (config0 & SYSREG_BIT(CONFIG0_P)) + features |= AVR32_FEATURE_PCTR; +- printk(" perfctr"); +- } +- if (config0 & SYSREG_BIT(CONFIG0_J)) { ++ if (config0 & SYSREG_BIT(CONFIG0_J)) + features |= AVR32_FEATURE_JAVA; +- printk(" java"); +- } +- if (config0 & SYSREG_BIT(CONFIG0_F)) { ++ if (config0 & SYSREG_BIT(CONFIG0_F)) + features |= AVR32_FEATURE_FPU; +- printk(" fpu"); +- } ++ ++ for (i = 0; i < ARRAY_SIZE(cpu_feature_flags); i++) ++ if (features & (1 << i)) ++ printk(" %s", cpu_feature_flags[i]); ++ + printk("\n"); + boot_cpu_data.features = features; + } +@@ -291,6 +319,8 @@ static int c_show(struct seq_file *m, void *v) + { + unsigned int icache_size, dcache_size; + unsigned int cpu = smp_processor_id(); ++ unsigned int freq; ++ unsigned int i; + + icache_size = boot_cpu_data.icache.ways * + boot_cpu_data.icache.sets * +@@ -301,15 +331,21 @@ static int c_show(struct seq_file *m, void *v) + + seq_printf(m, "processor\t: %d\n", cpu); + ++ seq_printf(m, "chip type\t: %s revision %c\n", ++ get_chip_name(&boot_cpu_data), ++ avr32_get_chip_revision(&boot_cpu_data) + 'A'); + if (boot_cpu_data.arch_type < NR_ARCH_NAMES) +- seq_printf(m, "cpu family\t: %s revision %d\n", ++ seq_printf(m, "cpu arch\t: %s revision %d\n", + arch_names[boot_cpu_data.arch_type], + boot_cpu_data.arch_revision); + if (boot_cpu_data.cpu_type < NR_CPU_NAMES) +- seq_printf(m, "cpu type\t: %s revision %d\n", ++ seq_printf(m, "cpu core\t: %s revision %d\n", + cpu_names[boot_cpu_data.cpu_type], + boot_cpu_data.cpu_revision); + ++ freq = (clk_get_rate(boot_cpu_data.clk) + 500) / 1000; ++ seq_printf(m, "cpu MHz\t\t: %u.%03u\n", freq / 1000, freq % 1000); ++ + seq_printf(m, "i-cache\t\t: %dK (%u ways x %u sets x %u)\n", + icache_size >> 10, + boot_cpu_data.icache.ways, +@@ -320,7 +356,13 @@ static int c_show(struct seq_file *m, void *v) + boot_cpu_data.dcache.ways, + boot_cpu_data.dcache.sets, + boot_cpu_data.dcache.linesz); +- seq_printf(m, "bogomips\t: %lu.%02lu\n", ++ ++ seq_printf(m, "features\t:"); ++ for (i = 0; i < ARRAY_SIZE(cpu_feature_flags); i++) ++ if (boot_cpu_data.features & (1 << i)) ++ seq_printf(m, " %s", cpu_feature_flags[i]); ++ ++ seq_printf(m, "\nbogomips\t: %lu.%02lu\n", + boot_cpu_data.loops_per_jiffy / (500000/HZ), + (boot_cpu_data.loops_per_jiffy / (5000/HZ)) % 100); + +@@ -343,7 +385,7 @@ static void c_stop(struct seq_file *m, void *v) + + } + +-struct seq_operations cpuinfo_op = { ++const struct seq_operations cpuinfo_op = { + .start = c_start, + .next = c_next, + .stop = c_stop, diff --git a/arch/avr32/kernel/dma-controller.c b/arch/avr32/kernel/dma-controller.c new file mode 100644 index 0000000..fb654b3 @@ -2225,419 +6073,2795 @@ index 0000000..fb654b3 + return NULL; +} +EXPORT_SYMBOL(find_dma_controller); -diff --git a/arch/avr32/kernel/entry-avr32b.S b/arch/avr32/kernel/entry-avr32b.S -index 42657f1..ccadfd9 100644 ---- a/arch/avr32/kernel/entry-avr32b.S -+++ b/arch/avr32/kernel/entry-avr32b.S -@@ -159,11 +159,18 @@ handle_vmalloc_miss: - - .section .scall.text,"ax",@progbits - system_call: -+#ifdef CONFIG_PREEMPT -+ mask_interrupts -+#endif - pushm r12 /* r12_orig */ - stmts --sp, r0-lr -- zero_fp -+ - mfsr r0, SYSREG_RAR_SUP - mfsr r1, SYSREG_RSR_SUP -+#ifdef CONFIG_PREEMPT -+ unmask_interrupts -+#endif -+ zero_fp - stm --sp, r0-r1 - - /* check for syscall tracing */ -@@ -638,6 +645,13 @@ irq_level\level: - stmts --sp,r0-lr - mfsr r8, rar_int\level - mfsr r9, rsr_int\level -+ -+#ifdef CONFIG_PREEMPT -+ sub r11, pc, (. - system_call) -+ cp.w r11, r8 -+ breq 4f -+#endif +diff --git a/arch/avr32/kernel/irq.c b/arch/avr32/kernel/irq.c +index 61f2de2..a8e767d 100644 +--- a/arch/avr32/kernel/irq.c ++++ b/arch/avr32/kernel/irq.c +@@ -25,6 +25,17 @@ void ack_bad_irq(unsigned int irq) + printk("unexpected IRQ %u\n", irq); + } + ++/* May be overridden by platform code */ ++int __weak nmi_enable(void) ++{ ++ return -ENOSYS; ++} + - pushm r8-r9 - - mov r11, sp -@@ -668,6 +682,16 @@ irq_level\level: - sub sp, -4 /* ignore r12_orig */ - rete - -+#ifdef CONFIG_PREEMPT -+4: mask_interrupts -+ mfsr r8, rsr_int\level -+ sbr r8, 16 -+ mtsr rsr_int\level, r8 -+ ldmts sp++, r0-lr -+ sub sp, -4 /* ignore r12_orig */ -+ rete -+#endif ++void __weak nmi_disable(void) ++{ + - 2: get_thread_info r0 - ld.w r1, r0[TI_flags] - bld r1, TIF_CPU_GOING_TO_SLEEP -diff --git a/arch/avr32/kernel/setup.c b/arch/avr32/kernel/setup.c -index d08b0bc..4b4c188 100644 ---- a/arch/avr32/kernel/setup.c -+++ b/arch/avr32/kernel/setup.c -@@ -248,7 +248,7 @@ static int __init early_parse_fbmem(char *p) - - fbmem_size = memparse(p, &p); - if (*p == '@') { -- fbmem_start = memparse(p, &p); -+ fbmem_start = memparse(p + 1, &p); - ret = add_reserved_region(fbmem_start, - fbmem_start + fbmem_size - 1, - "Framebuffer"); -diff --git a/arch/avr32/kernel/vmlinux.lds.S b/arch/avr32/kernel/vmlinux.lds.S ++} ++ + #ifdef CONFIG_PROC_FS + int show_interrupts(struct seq_file *p, void *v) + { +diff --git a/arch/avr32/kernel/kprobes.c b/arch/avr32/kernel/kprobes.c +index 799ba89..f820e9f 100644 +--- a/arch/avr32/kernel/kprobes.c ++++ b/arch/avr32/kernel/kprobes.c +@@ -48,6 +48,7 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p) + void __kprobes arch_arm_kprobe(struct kprobe *p) + { + pr_debug("arming kprobe at %p\n", p->addr); ++ ocd_enable(NULL); + *p->addr = BREAKPOINT_INSTRUCTION; + flush_icache_range((unsigned long)p->addr, + (unsigned long)p->addr + sizeof(kprobe_opcode_t)); +@@ -56,6 +57,7 @@ void __kprobes arch_arm_kprobe(struct kprobe *p) + void __kprobes arch_disarm_kprobe(struct kprobe *p) + { + pr_debug("disarming kprobe at %p\n", p->addr); ++ ocd_disable(NULL); + *p->addr = p->opcode; + flush_icache_range((unsigned long)p->addr, + (unsigned long)p->addr + sizeof(kprobe_opcode_t)); +@@ -260,9 +262,6 @@ int __kprobes longjmp_break_handler(struct kprobe *p, struct pt_regs *regs) + + int __init arch_init_kprobes(void) + { +- printk("KPROBES: Enabling monitor mode (MM|DBE)...\n"); +- ocd_write(DC, (1 << OCD_DC_MM_BIT) | (1 << OCD_DC_DBE_BIT)); +- + /* TODO: Register kretprobe trampoline */ + return 0; + } +diff --git a/arch/avr32/kernel/nmi_debug.c b/arch/avr32/kernel/nmi_debug.c new file mode 100644 -index 0000000..ce9ac96 +index 0000000..3414b85 --- /dev/null -+++ b/arch/avr32/kernel/vmlinux.lds.S -@@ -0,0 +1,143 @@ ++++ b/arch/avr32/kernel/nmi_debug.c +@@ -0,0 +1,82 @@ +/* -+ * AVR32 linker script for the Linux kernel -+ * -+ * Copyright (C) 2004-2006 Atmel Corporation ++ * Copyright (C) 2007 Atmel Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ -+#define LOAD_OFFSET 0x00000000 -+#include <asm-generic/vmlinux.lds.h> -+#include <asm/cache.h> -+#include <asm/thread_info.h> -+ -+OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32") -+OUTPUT_ARCH(avr32) -+ENTRY(_start) -+ -+/* Big endian */ -+jiffies = jiffies_64 + 4; -+ -+SECTIONS -+{ -+ . = CONFIG_ENTRY_ADDRESS; -+ .init : AT(ADDR(.init) - LOAD_OFFSET) { -+ _stext = .; -+ __init_begin = .; -+ _sinittext = .; -+ *(.text.reset) -+ *(.init.text) -+ /* -+ * .exit.text is discarded at runtime, not -+ * link time, to deal with references from -+ * __bug_table -+ */ -+ *(.exit.text) -+ _einittext = .; -+ . = ALIGN(4); -+ __tagtable_begin = .; -+ *(.taglist.init) -+ __tagtable_end = .; -+ *(.init.data) -+ . = ALIGN(16); -+ __setup_start = .; -+ *(.init.setup) -+ __setup_end = .; -+ . = ALIGN(4); -+ __initcall_start = .; -+ INITCALLS -+ __initcall_end = .; -+ __con_initcall_start = .; -+ *(.con_initcall.init) -+ __con_initcall_end = .; -+ __security_initcall_start = .; -+ *(.security_initcall.init) -+ __security_initcall_end = .; -+#ifdef CONFIG_BLK_DEV_INITRD -+ . = ALIGN(32); -+ __initramfs_start = .; -+ *(.init.ramfs) -+ __initramfs_end = .; -+#endif -+ . = ALIGN(PAGE_SIZE); -+ __init_end = .; -+ } -+ -+ .text : AT(ADDR(.text) - LOAD_OFFSET) { -+ _evba = .; -+ _text = .; -+ *(.ex.text) -+ . = 0x50; -+ *(.tlbx.ex.text) -+ . = 0x60; -+ *(.tlbr.ex.text) -+ . = 0x70; -+ *(.tlbw.ex.text) -+ . = 0x100; -+ *(.scall.text) -+ *(.irq.text) -+ TEXT_TEXT -+ SCHED_TEXT -+ LOCK_TEXT -+ KPROBES_TEXT -+ *(.fixup) -+ *(.gnu.warning) -+ _etext = .; -+ } = 0xd703d703 -+ -+ . = ALIGN(4); -+ __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) { -+ __start___ex_table = .; -+ *(__ex_table) -+ __stop___ex_table = .; -+ } -+ -+ BUG_TABLE -+ -+ RODATA -+ -+ . = ALIGN(THREAD_SIZE); -+ -+ .data : AT(ADDR(.data) - LOAD_OFFSET) { -+ _data = .; -+ _sdata = .; -+ /* -+ * First, the init task union, aligned to an 8K boundary. -+ */ -+ *(.data.init_task) ++#include <linux/delay.h> ++#include <linux/kdebug.h> ++#include <linux/notifier.h> ++#include <linux/sched.h> ++ ++#include <asm/irq.h> ++ ++enum nmi_action { ++ NMI_SHOW_STATE = 1 << 0, ++ NMI_SHOW_REGS = 1 << 1, ++ NMI_DIE = 1 << 2, ++ NMI_DEBOUNCE = 1 << 3, ++}; ++ ++static unsigned long nmi_actions; ++ ++static int nmi_debug_notify(struct notifier_block *self, ++ unsigned long val, void *data) ++{ ++ struct die_args *args = data; ++ ++ if (likely(val != DIE_NMI)) ++ return NOTIFY_DONE; ++ ++ if (nmi_actions & NMI_SHOW_STATE) ++ show_state(); ++ if (nmi_actions & NMI_SHOW_REGS) ++ show_regs(args->regs); ++ if (nmi_actions & NMI_DEBOUNCE) ++ mdelay(10); ++ if (nmi_actions & NMI_DIE) ++ return NOTIFY_BAD; + -+ /* Then, the cacheline aligned data */ -+ . = ALIGN(L1_CACHE_BYTES); -+ *(.data.cacheline_aligned) ++ return NOTIFY_OK; ++} + -+ /* And the rest... */ -+ *(.data.rel*) -+ DATA_DATA -+ CONSTRUCTORS ++static struct notifier_block nmi_debug_nb = { ++ .notifier_call = nmi_debug_notify, ++}; + -+ _edata = .; ++static int __init nmi_debug_setup(char *str) ++{ ++ char *p, *sep; ++ ++ register_die_notifier(&nmi_debug_nb); ++ if (nmi_enable()) { ++ printk(KERN_WARNING "Unable to enable NMI.\n"); ++ return 0; + } + ++ if (*str != '=') ++ return 0; + -+ . = ALIGN(8); -+ .bss : AT(ADDR(.bss) - LOAD_OFFSET) { -+ __bss_start = .; -+ *(.bss) -+ *(COMMON) -+ . = ALIGN(8); -+ __bss_stop = .; -+ _end = .; ++ for (p = str + 1; *p; p = sep + 1) { ++ sep = strchr(p, ','); ++ if (sep) ++ *sep = 0; ++ if (strcmp(p, "state") == 0) ++ nmi_actions |= NMI_SHOW_STATE; ++ else if (strcmp(p, "regs") == 0) ++ nmi_actions |= NMI_SHOW_REGS; ++ else if (strcmp(p, "debounce") == 0) ++ nmi_actions |= NMI_DEBOUNCE; ++ else if (strcmp(p, "die") == 0) ++ nmi_actions |= NMI_DIE; ++ else ++ printk(KERN_WARNING "NMI: Unrecognized action `%s'\n", ++ p); ++ if (!sep) ++ break; + } + -+ /* When something in the kernel is NOT compiled as a module, the module -+ * cleanup code and data are put into these segments. Both can then be -+ * thrown away, as cleanup code is never called unless it's a module. -+ */ -+ /DISCARD/ : { -+ *(.exit.data) -+ *(.exitcall.exit) ++ return 0; ++} ++__setup("nmi_debug", nmi_debug_setup); +diff --git a/arch/avr32/kernel/ocd.c b/arch/avr32/kernel/ocd.c +new file mode 100644 +index 0000000..c4f0232 +--- /dev/null ++++ b/arch/avr32/kernel/ocd.c +@@ -0,0 +1,163 @@ ++/* ++ * Copyright (C) 2007 Atmel Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++#include <linux/init.h> ++#include <linux/sched.h> ++#include <linux/spinlock.h> ++ ++#include <asm/ocd.h> ++ ++static long ocd_count; ++static spinlock_t ocd_lock; ++ ++/** ++ * ocd_enable - enable on-chip debugging ++ * @child: task to be debugged ++ * ++ * If @child is non-NULL, ocd_enable() first checks if debugging has ++ * already been enabled for @child, and if it has, does nothing. ++ * ++ * If @child is NULL (e.g. when debugging the kernel), or debugging ++ * has not already been enabled for it, ocd_enable() increments the ++ * reference count and enables the debugging hardware. ++ */ ++void ocd_enable(struct task_struct *child) ++{ ++ u32 dc; ++ ++ if (child) ++ pr_debug("ocd_enable: child=%s [%u]\n", ++ child->comm, child->pid); ++ else ++ pr_debug("ocd_enable (no child)\n"); ++ ++ if (!child || !test_and_set_tsk_thread_flag(child, TIF_DEBUG)) { ++ spin_lock(&ocd_lock); ++ ocd_count++; ++ dc = ocd_read(DC); ++ dc |= (1 << OCD_DC_MM_BIT) | (1 << OCD_DC_DBE_BIT); ++ ocd_write(DC, dc); ++ spin_unlock(&ocd_lock); ++ } ++} ++ ++/** ++ * ocd_disable - disable on-chip debugging ++ * @child: task that was being debugged, but isn't anymore ++ * ++ * If @child is non-NULL, ocd_disable() checks if debugging is enabled ++ * for @child, and if it isn't, does nothing. ++ * ++ * If @child is NULL (e.g. when debugging the kernel), or debugging is ++ * enabled, ocd_disable() decrements the reference count, and if it ++ * reaches zero, disables the debugging hardware. ++ */ ++void ocd_disable(struct task_struct *child) ++{ ++ u32 dc; ++ ++ if (!child) ++ pr_debug("ocd_disable (no child)\n"); ++ else if (test_tsk_thread_flag(child, TIF_DEBUG)) ++ pr_debug("ocd_disable: child=%s [%u]\n", ++ child->comm, child->pid); ++ ++ if (!child || test_and_clear_tsk_thread_flag(child, TIF_DEBUG)) { ++ spin_lock(&ocd_lock); ++ ocd_count--; ++ ++ WARN_ON(ocd_count < 0); ++ ++ if (ocd_count <= 0) { ++ dc = ocd_read(DC); ++ dc &= ~((1 << OCD_DC_MM_BIT) | (1 << OCD_DC_DBE_BIT)); ++ ocd_write(DC, dc); ++ } ++ spin_unlock(&ocd_lock); + } ++} ++ ++#ifdef CONFIG_DEBUG_FS ++#include <linux/debugfs.h> ++#include <linux/module.h> ++ ++static struct dentry *ocd_debugfs_root; ++static struct dentry *ocd_debugfs_DC; ++static struct dentry *ocd_debugfs_DS; ++static struct dentry *ocd_debugfs_count; ++ ++static u64 ocd_DC_get(void *data) ++{ ++ return ocd_read(DC); ++} ++static void ocd_DC_set(void *data, u64 val) ++{ ++ ocd_write(DC, val); ++} ++DEFINE_SIMPLE_ATTRIBUTE(fops_DC, ocd_DC_get, ocd_DC_set, "0x%08llx\n"); ++ ++static u64 ocd_DS_get(void *data) ++{ ++ return ocd_read(DS); ++} ++DEFINE_SIMPLE_ATTRIBUTE(fops_DS, ocd_DS_get, NULL, "0x%08llx\n"); + -+ DWARF_DEBUG ++static u64 ocd_count_get(void *data) ++{ ++ return ocd_count; +} -diff --git a/arch/avr32/kernel/vmlinux.lds.c b/arch/avr32/kernel/vmlinux.lds.c ++DEFINE_SIMPLE_ATTRIBUTE(fops_count, ocd_count_get, NULL, "%lld\n"); ++ ++static void ocd_debugfs_init(void) ++{ ++ struct dentry *root; ++ ++ root = debugfs_create_dir("ocd", NULL); ++ if (IS_ERR(root) || !root) ++ goto err_root; ++ ocd_debugfs_root = root; ++ ++ ocd_debugfs_DC = debugfs_create_file("DC", S_IRUSR | S_IWUSR, ++ root, NULL, &fops_DC); ++ if (!ocd_debugfs_DC) ++ goto err_DC; ++ ++ ocd_debugfs_DS = debugfs_create_file("DS", S_IRUSR, root, ++ NULL, &fops_DS); ++ if (!ocd_debugfs_DS) ++ goto err_DS; ++ ++ ocd_debugfs_count = debugfs_create_file("count", S_IRUSR, root, ++ NULL, &fops_count); ++ if (!ocd_debugfs_count) ++ goto err_count; ++ ++ return; ++ ++err_count: ++ debugfs_remove(ocd_debugfs_DS); ++err_DS: ++ debugfs_remove(ocd_debugfs_DC); ++err_DC: ++ debugfs_remove(ocd_debugfs_root); ++err_root: ++ printk(KERN_WARNING "OCD: Failed to create debugfs entries\n"); ++} ++#else ++static inline void ocd_debugfs_init(void) ++{ ++ ++} ++#endif ++ ++static int __init ocd_init(void) ++{ ++ spin_lock_init(&ocd_lock); ++ ocd_debugfs_init(); ++ return 0; ++} ++arch_initcall(ocd_init); +diff --git a/arch/avr32/kernel/process.c b/arch/avr32/kernel/process.c +index 9d6dac8..eaaa69b 100644 +--- a/arch/avr32/kernel/process.c ++++ b/arch/avr32/kernel/process.c +@@ -103,7 +103,7 @@ EXPORT_SYMBOL(kernel_thread); + */ + void exit_thread(void) + { +- /* nothing to do */ ++ ocd_disable(current); + } + + void flush_thread(void) +@@ -345,6 +345,9 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long usp, + p->thread.cpu_context.ksp = (unsigned long)childregs; + p->thread.cpu_context.pc = (unsigned long)ret_from_fork; + ++ if ((clone_flags & CLONE_PTRACE) && test_thread_flag(TIF_DEBUG)) ++ ocd_enable(p); ++ + return 0; + } + +diff --git a/arch/avr32/kernel/ptrace.c b/arch/avr32/kernel/ptrace.c +index 002369e..1fed38f 100644 +--- a/arch/avr32/kernel/ptrace.c ++++ b/arch/avr32/kernel/ptrace.c +@@ -58,6 +58,7 @@ void ptrace_disable(struct task_struct *child) + { + clear_tsk_thread_flag(child, TIF_SINGLE_STEP); + clear_tsk_thread_flag(child, TIF_BREAKPOINT); ++ ocd_disable(child); + } + + /* +@@ -144,10 +145,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) + { + int ret; + +- pr_debug("ptrace: Enabling monitor mode...\n"); +- ocd_write(DC, ocd_read(DC) | (1 << OCD_DC_MM_BIT) +- | (1 << OCD_DC_DBE_BIT)); +- + switch (request) { + /* Read the word at location addr in the child process */ + case PTRACE_PEEKTEXT: +diff --git a/arch/avr32/kernel/setup.c b/arch/avr32/kernel/setup.c +index 4b4c188..488078d 100644 +--- a/arch/avr32/kernel/setup.c ++++ b/arch/avr32/kernel/setup.c +@@ -273,6 +273,8 @@ static int __init early_parse_fbmem(char *p) + printk(KERN_WARNING + "Failed to allocate framebuffer memory\n"); + fbmem_size = 0; ++ } else { ++ memset(__va(fbmem_start), 0, fbmem_size); + } + } + +diff --git a/arch/avr32/kernel/signal.c b/arch/avr32/kernel/signal.c +index 0ec1485..5616a00 100644 +--- a/arch/avr32/kernel/signal.c ++++ b/arch/avr32/kernel/signal.c +@@ -270,19 +270,12 @@ int do_signal(struct pt_regs *regs, sigset_t *oldset, int syscall) + if (!user_mode(regs)) + return 0; + +- if (try_to_freeze()) { +- signr = 0; +- if (!signal_pending(current)) +- goto no_signal; +- } +- + if (test_thread_flag(TIF_RESTORE_SIGMASK)) + oldset = ¤t->saved_sigmask; + else if (!oldset) + oldset = ¤t->blocked; + + signr = get_signal_to_deliver(&info, &ka, regs, NULL); +-no_signal: + if (syscall) { + switch (regs->r12) { + case -ERESTART_RESTARTBLOCK: +diff --git a/arch/avr32/kernel/traps.c b/arch/avr32/kernel/traps.c +index 870c075..cf6f686 100644 +--- a/arch/avr32/kernel/traps.c ++++ b/arch/avr32/kernel/traps.c +@@ -9,6 +9,7 @@ + #include <linux/bug.h> + #include <linux/init.h> + #include <linux/kallsyms.h> ++#include <linux/kdebug.h> + #include <linux/module.h> + #include <linux/notifier.h> + #include <linux/sched.h> +@@ -107,9 +108,23 @@ void _exception(long signr, struct pt_regs *regs, int code, + + asmlinkage void do_nmi(unsigned long ecr, struct pt_regs *regs) + { +- printk(KERN_ALERT "Got Non-Maskable Interrupt, dumping regs\n"); +- show_regs_log_lvl(regs, KERN_ALERT); +- show_stack_log_lvl(current, regs->sp, regs, KERN_ALERT); ++ int ret; ++ ++ nmi_enter(); ++ ++ ret = notify_die(DIE_NMI, "NMI", regs, 0, ecr, SIGINT); ++ switch (ret) { ++ case NOTIFY_OK: ++ case NOTIFY_STOP: ++ return; ++ case NOTIFY_BAD: ++ die("Fatal Non-Maskable Interrupt", regs, SIGINT); ++ default: ++ break; ++ } ++ ++ printk(KERN_ALERT "Got NMI, but nobody cared. Disabling...\n"); ++ nmi_disable(); + } + + asmlinkage void do_critical_exception(unsigned long ecr, struct pt_regs *regs) +diff --git a/arch/avr32/mach-at32ap/Kconfig b/arch/avr32/mach-at32ap/Kconfig +index eb30783..0eb590a 100644 +--- a/arch/avr32/mach-at32ap/Kconfig ++++ b/arch/avr32/mach-at32ap/Kconfig +@@ -3,9 +3,9 @@ if PLATFORM_AT32AP + menu "Atmel AVR32 AP options" + + choice +- prompt "AT32AP7000 static memory bus width" +- depends on CPU_AT32AP7000 +- default AP7000_16_BIT_SMC ++ prompt "AT32AP700x static memory bus width" ++ depends on CPU_AT32AP700X ++ default AP700X_16_BIT_SMC + help + Define the width of the AP7000 external static memory interface. + This is used to determine how to mangle the address and/or data +@@ -15,17 +15,24 @@ choice + width for all chip selects, excluding the flash (which is using + raw access and is thus not affected by any of this.) + +-config AP7000_32_BIT_SMC ++config AP700X_32_BIT_SMC + bool "32 bit" + +-config AP7000_16_BIT_SMC ++config AP700X_16_BIT_SMC + bool "16 bit" + +-config AP7000_8_BIT_SMC ++config AP700X_8_BIT_SMC + bool "8 bit" + + endchoice + ++config GPIO_DEV ++ bool "GPIO /dev interface" ++ select CONFIGFS_FS ++ default n ++ help ++ Say `Y' to enable a /dev interface to the GPIO pins. ++ + endmenu + + endif # PLATFORM_AT32AP +diff --git a/arch/avr32/mach-at32ap/Makefile b/arch/avr32/mach-at32ap/Makefile +index a8b4450..0f6162e 100644 +--- a/arch/avr32/mach-at32ap/Makefile ++++ b/arch/avr32/mach-at32ap/Makefile +@@ -1,4 +1,5 @@ + obj-y += at32ap.o clock.o intc.o extint.o pio.o hsmc.o +-obj-$(CONFIG_CPU_AT32AP7000) += at32ap7000.o +-obj-$(CONFIG_CPU_AT32AP7000) += time-tc.o ++obj-$(CONFIG_CPU_AT32AP700X) += at32ap700x.o ++obj-$(CONFIG_CPU_AT32AP700X) += time-tc.o + obj-$(CONFIG_CPU_FREQ_AT32AP) += cpufreq.o ++obj-$(CONFIG_GPIO_DEV) += gpio-dev.o +diff --git a/arch/avr32/mach-at32ap/at32ap7000.c b/arch/avr32/mach-at32ap/at32ap7000.c deleted file mode 100644 -index db0438f..0000000 ---- a/arch/avr32/kernel/vmlinux.lds.c +index 7c4388f..0000000 +--- a/arch/avr32/mach-at32ap/at32ap7000.c +++ /dev/null -@@ -1,142 +0,0 @@ +@@ -1,1730 +0,0 @@ -/* -- * AVR32 linker script for the Linux kernel -- * -- * Copyright (C) 2004-2006 Atmel Corporation +- * Copyright (C) 2005-2006 Atmel Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ --#define LOAD_OFFSET 0x00000000 --#include <asm-generic/vmlinux.lds.h> +-#include <linux/clk.h> +-#include <linux/fb.h> +-#include <linux/init.h> +-#include <linux/platform_device.h> +-#include <linux/dma-mapping.h> +-#include <linux/spi/spi.h> +- +-#include <asm/io.h> - --OUTPUT_FORMAT("elf32-avr32", "elf32-avr32", "elf32-avr32") --OUTPUT_ARCH(avr32) --ENTRY(_start) +-#include <asm/arch/at32ap7000.h> +-#include <asm/arch/board.h> +-#include <asm/arch/portmux.h> - --/* Big endian */ --jiffies = jiffies_64 + 4; +-#include <video/atmel_lcdc.h> - --SECTIONS +-#include "clock.h" +-#include "hmatrix.h" +-#include "pio.h" +-#include "pm.h" +- +- +-#define PBMEM(base) \ +- { \ +- .start = base, \ +- .end = base + 0x3ff, \ +- .flags = IORESOURCE_MEM, \ +- } +-#define IRQ(num) \ +- { \ +- .start = num, \ +- .end = num, \ +- .flags = IORESOURCE_IRQ, \ +- } +-#define NAMED_IRQ(num, _name) \ +- { \ +- .start = num, \ +- .end = num, \ +- .name = _name, \ +- .flags = IORESOURCE_IRQ, \ +- } +- +-/* REVISIT these assume *every* device supports DMA, but several +- * don't ... tc, smc, pio, rtc, watchdog, pwm, ps2, and more. +- */ +-#define DEFINE_DEV(_name, _id) \ +-static u64 _name##_id##_dma_mask = DMA_32BIT_MASK; \ +-static struct platform_device _name##_id##_device = { \ +- .name = #_name, \ +- .id = _id, \ +- .dev = { \ +- .dma_mask = &_name##_id##_dma_mask, \ +- .coherent_dma_mask = DMA_32BIT_MASK, \ +- }, \ +- .resource = _name##_id##_resource, \ +- .num_resources = ARRAY_SIZE(_name##_id##_resource), \ +-} +-#define DEFINE_DEV_DATA(_name, _id) \ +-static u64 _name##_id##_dma_mask = DMA_32BIT_MASK; \ +-static struct platform_device _name##_id##_device = { \ +- .name = #_name, \ +- .id = _id, \ +- .dev = { \ +- .dma_mask = &_name##_id##_dma_mask, \ +- .platform_data = &_name##_id##_data, \ +- .coherent_dma_mask = DMA_32BIT_MASK, \ +- }, \ +- .resource = _name##_id##_resource, \ +- .num_resources = ARRAY_SIZE(_name##_id##_resource), \ +-} +- +-#define select_peripheral(pin, periph, flags) \ +- at32_select_periph(GPIO_PIN_##pin, GPIO_##periph, flags) +- +-#define DEV_CLK(_name, devname, bus, _index) \ +-static struct clk devname##_##_name = { \ +- .name = #_name, \ +- .dev = &devname##_device.dev, \ +- .parent = &bus##_clk, \ +- .mode = bus##_clk_mode, \ +- .get_rate = bus##_clk_get_rate, \ +- .index = _index, \ +-} +- +-static DEFINE_SPINLOCK(pm_lock); +- +-unsigned long at32ap7000_osc_rates[3] = { +- [0] = 32768, +- /* FIXME: these are ATSTK1002-specific */ +- [1] = 20000000, +- [2] = 12000000, +-}; +- +-static unsigned long osc_get_rate(struct clk *clk) -{ -- . = CONFIG_ENTRY_ADDRESS; -- .init : AT(ADDR(.init) - LOAD_OFFSET) { -- _stext = .; -- __init_begin = .; -- _sinittext = .; -- *(.text.reset) -- *(.init.text) -- /* -- * .exit.text is discarded at runtime, not -- * link time, to deal with references from -- * __bug_table -- */ -- *(.exit.text) -- _einittext = .; -- . = ALIGN(4); -- __tagtable_begin = .; -- *(.taglist.init) -- __tagtable_end = .; -- *(.init.data) -- . = ALIGN(16); -- __setup_start = .; -- *(.init.setup) -- __setup_end = .; -- . = ALIGN(4); -- __initcall_start = .; -- INITCALLS -- __initcall_end = .; -- __con_initcall_start = .; -- *(.con_initcall.init) -- __con_initcall_end = .; -- __security_initcall_start = .; -- *(.security_initcall.init) -- __security_initcall_end = .; --#ifdef CONFIG_BLK_DEV_INITRD -- . = ALIGN(32); -- __initramfs_start = .; -- *(.init.ramfs) -- __initramfs_end = .; --#endif -- . = ALIGN(4096); -- __init_end = .; +- return at32ap7000_osc_rates[clk->index]; +-} +- +-static unsigned long pll_get_rate(struct clk *clk, unsigned long control) +-{ +- unsigned long div, mul, rate; +- +- if (!(control & PM_BIT(PLLEN))) +- return 0; +- +- div = PM_BFEXT(PLLDIV, control) + 1; +- mul = PM_BFEXT(PLLMUL, control) + 1; +- +- rate = clk->parent->get_rate(clk->parent); +- rate = (rate + div / 2) / div; +- rate *= mul; +- +- return rate; +-} +- +-static unsigned long pll0_get_rate(struct clk *clk) +-{ +- u32 control; +- +- control = pm_readl(PLL0); +- +- return pll_get_rate(clk, control); +-} +- +-static unsigned long pll1_get_rate(struct clk *clk) +-{ +- u32 control; +- +- control = pm_readl(PLL1); +- +- return pll_get_rate(clk, control); +-} +- +-/* +- * The AT32AP7000 has five primary clock sources: One 32kHz +- * oscillator, two crystal oscillators and two PLLs. +- */ +-static struct clk osc32k = { +- .name = "osc32k", +- .get_rate = osc_get_rate, +- .users = 1, +- .index = 0, +-}; +-static struct clk osc0 = { +- .name = "osc0", +- .get_rate = osc_get_rate, +- .users = 1, +- .index = 1, +-}; +-static struct clk osc1 = { +- .name = "osc1", +- .get_rate = osc_get_rate, +- .index = 2, +-}; +-static struct clk pll0 = { +- .name = "pll0", +- .get_rate = pll0_get_rate, +- .parent = &osc0, +-}; +-static struct clk pll1 = { +- .name = "pll1", +- .get_rate = pll1_get_rate, +- .parent = &osc0, +-}; +- +-/* +- * The main clock can be either osc0 or pll0. The boot loader may +- * have chosen one for us, so we don't really know which one until we +- * have a look at the SM. +- */ +-static struct clk *main_clock; +- +-/* +- * Synchronous clocks are generated from the main clock. The clocks +- * must satisfy the constraint +- * fCPU >= fHSB >= fPB +- * i.e. each clock must not be faster than its parent. +- */ +-static unsigned long bus_clk_get_rate(struct clk *clk, unsigned int shift) +-{ +- return main_clock->get_rate(main_clock) >> shift; +-}; +- +-static void cpu_clk_mode(struct clk *clk, int enabled) +-{ +- unsigned long flags; +- u32 mask; +- +- spin_lock_irqsave(&pm_lock, flags); +- mask = pm_readl(CPU_MASK); +- if (enabled) +- mask |= 1 << clk->index; +- else +- mask &= ~(1 << clk->index); +- pm_writel(CPU_MASK, mask); +- spin_unlock_irqrestore(&pm_lock, flags); +-} +- +-static unsigned long cpu_clk_get_rate(struct clk *clk) +-{ +- unsigned long cksel, shift = 0; +- +- cksel = pm_readl(CKSEL); +- if (cksel & PM_BIT(CPUDIV)) +- shift = PM_BFEXT(CPUSEL, cksel) + 1; +- +- return bus_clk_get_rate(clk, shift); +-} +- +-static long cpu_clk_set_rate(struct clk *clk, unsigned long rate, int apply) +-{ +- u32 control; +- unsigned long parent_rate, child_div, actual_rate, div; +- +- parent_rate = clk->parent->get_rate(clk->parent); +- control = pm_readl(CKSEL); +- +- if (control & PM_BIT(HSBDIV)) +- child_div = 1 << (PM_BFEXT(HSBSEL, control) + 1); +- else +- child_div = 1; +- +- if (rate > 3 * (parent_rate / 4) || child_div == 1) { +- actual_rate = parent_rate; +- control &= ~PM_BIT(CPUDIV); +- } else { +- unsigned int cpusel; +- div = (parent_rate + rate / 2) / rate; +- if (div > child_div) +- div = child_div; +- cpusel = (div > 1) ? (fls(div) - 2) : 0; +- control = PM_BIT(CPUDIV) | PM_BFINS(CPUSEL, cpusel, control); +- actual_rate = parent_rate / (1 << (cpusel + 1)); - } - -- . = ALIGN(8192); -- .text : AT(ADDR(.text) - LOAD_OFFSET) { -- _evba = .; -- _text = .; -- *(.ex.text) -- . = 0x50; -- *(.tlbx.ex.text) -- . = 0x60; -- *(.tlbr.ex.text) -- . = 0x70; -- *(.tlbw.ex.text) -- . = 0x100; -- *(.scall.text) -- *(.irq.text) -- TEXT_TEXT -- SCHED_TEXT -- LOCK_TEXT -- KPROBES_TEXT -- *(.fixup) -- *(.gnu.warning) -- _etext = .; -- } = 0xd703d703 -- -- . = ALIGN(4); -- __ex_table : AT(ADDR(__ex_table) - LOAD_OFFSET) { -- __start___ex_table = .; -- *(__ex_table) -- __stop___ex_table = .; +- pr_debug("clk %s: new rate %lu (actual rate %lu)\n", +- clk->name, rate, actual_rate); +- +- if (apply) +- pm_writel(CKSEL, control); +- +- return actual_rate; +-} +- +-static void hsb_clk_mode(struct clk *clk, int enabled) +-{ +- unsigned long flags; +- u32 mask; +- +- spin_lock_irqsave(&pm_lock, flags); +- mask = pm_readl(HSB_MASK); +- if (enabled) +- mask |= 1 << clk->index; +- else +- mask &= ~(1 << clk->index); +- pm_writel(HSB_MASK, mask); +- spin_unlock_irqrestore(&pm_lock, flags); +-} +- +-static unsigned long hsb_clk_get_rate(struct clk *clk) +-{ +- unsigned long cksel, shift = 0; +- +- cksel = pm_readl(CKSEL); +- if (cksel & PM_BIT(HSBDIV)) +- shift = PM_BFEXT(HSBSEL, cksel) + 1; +- +- return bus_clk_get_rate(clk, shift); +-} +- +-static void pba_clk_mode(struct clk *clk, int enabled) +-{ +- unsigned long flags; +- u32 mask; +- +- spin_lock_irqsave(&pm_lock, flags); +- mask = pm_readl(PBA_MASK); +- if (enabled) +- mask |= 1 << clk->index; +- else +- mask &= ~(1 << clk->index); +- pm_writel(PBA_MASK, mask); +- spin_unlock_irqrestore(&pm_lock, flags); +-} +- +-static unsigned long pba_clk_get_rate(struct clk *clk) +-{ +- unsigned long cksel, shift = 0; +- +- cksel = pm_readl(CKSEL); +- if (cksel & PM_BIT(PBADIV)) +- shift = PM_BFEXT(PBASEL, cksel) + 1; +- +- return bus_clk_get_rate(clk, shift); +-} +- +-static void pbb_clk_mode(struct clk *clk, int enabled) +-{ +- unsigned long flags; +- u32 mask; +- +- spin_lock_irqsave(&pm_lock, flags); +- mask = pm_readl(PBB_MASK); +- if (enabled) +- mask |= 1 << clk->index; +- else +- mask &= ~(1 << clk->index); +- pm_writel(PBB_MASK, mask); +- spin_unlock_irqrestore(&pm_lock, flags); +-} +- +-static unsigned long pbb_clk_get_rate(struct clk *clk) +-{ +- unsigned long cksel, shift = 0; +- +- cksel = pm_readl(CKSEL); +- if (cksel & PM_BIT(PBBDIV)) +- shift = PM_BFEXT(PBBSEL, cksel) + 1; +- +- return bus_clk_get_rate(clk, shift); +-} +- +-static struct clk cpu_clk = { +- .name = "cpu", +- .get_rate = cpu_clk_get_rate, +- .set_rate = cpu_clk_set_rate, +- .users = 1, +-}; +-static struct clk hsb_clk = { +- .name = "hsb", +- .parent = &cpu_clk, +- .get_rate = hsb_clk_get_rate, +-}; +-static struct clk pba_clk = { +- .name = "pba", +- .parent = &hsb_clk, +- .mode = hsb_clk_mode, +- .get_rate = pba_clk_get_rate, +- .index = 1, +-}; +-static struct clk pbb_clk = { +- .name = "pbb", +- .parent = &hsb_clk, +- .mode = hsb_clk_mode, +- .get_rate = pbb_clk_get_rate, +- .users = 1, +- .index = 2, +-}; +- +-/* -------------------------------------------------------------------- +- * Generic Clock operations +- * -------------------------------------------------------------------- */ +- +-static void genclk_mode(struct clk *clk, int enabled) +-{ +- u32 control; +- +- control = pm_readl(GCCTRL(clk->index)); +- if (enabled) +- control |= PM_BIT(CEN); +- else +- control &= ~PM_BIT(CEN); +- pm_writel(GCCTRL(clk->index), control); +-} +- +-static unsigned long genclk_get_rate(struct clk *clk) +-{ +- u32 control; +- unsigned long div = 1; +- +- control = pm_readl(GCCTRL(clk->index)); +- if (control & PM_BIT(DIVEN)) +- div = 2 * (PM_BFEXT(DIV, control) + 1); +- +- return clk->parent->get_rate(clk->parent) / div; +-} +- +-static long genclk_set_rate(struct clk *clk, unsigned long rate, int apply) +-{ +- u32 control; +- unsigned long parent_rate, actual_rate, div; +- +- parent_rate = clk->parent->get_rate(clk->parent); +- control = pm_readl(GCCTRL(clk->index)); +- +- if (rate > 3 * parent_rate / 4) { +- actual_rate = parent_rate; +- control &= ~PM_BIT(DIVEN); +- } else { +- div = (parent_rate + rate) / (2 * rate) - 1; +- control = PM_BFINS(DIV, div, control) | PM_BIT(DIVEN); +- actual_rate = parent_rate / (2 * (div + 1)); - } - -- BUG_TABLE +- dev_dbg(clk->dev, "clk %s: new rate %lu (actual rate %lu)\n", +- clk->name, rate, actual_rate); - -- RODATA +- if (apply) +- pm_writel(GCCTRL(clk->index), control); - -- . = ALIGN(8192); +- return actual_rate; +-} - -- .data : AT(ADDR(.data) - LOAD_OFFSET) { -- _data = .; -- _sdata = .; -- /* -- * First, the init task union, aligned to an 8K boundary. -- */ -- *(.data.init_task) +-int genclk_set_parent(struct clk *clk, struct clk *parent) +-{ +- u32 control; - -- /* Then, the cacheline aligned data */ -- . = ALIGN(32); -- *(.data.cacheline_aligned) +- dev_dbg(clk->dev, "clk %s: new parent %s (was %s)\n", +- clk->name, parent->name, clk->parent->name); - -- /* And the rest... */ -- *(.data.rel*) -- DATA_DATA -- CONSTRUCTORS +- control = pm_readl(GCCTRL(clk->index)); +- +- if (parent == &osc1 || parent == &pll1) +- control |= PM_BIT(OSCSEL); +- else if (parent == &osc0 || parent == &pll0) +- control &= ~PM_BIT(OSCSEL); +- else +- return -EINVAL; +- +- if (parent == &pll0 || parent == &pll1) +- control |= PM_BIT(PLLSEL); +- else +- control &= ~PM_BIT(PLLSEL); +- +- pm_writel(GCCTRL(clk->index), control); +- clk->parent = parent; +- +- return 0; +-} - -- _edata = .; +-static void __init genclk_init_parent(struct clk *clk) +-{ +- u32 control; +- struct clk *parent; +- +- BUG_ON(clk->index > 7); +- +- control = pm_readl(GCCTRL(clk->index)); +- if (control & PM_BIT(OSCSEL)) +- parent = (control & PM_BIT(PLLSEL)) ? &pll1 : &osc1; +- else +- parent = (control & PM_BIT(PLLSEL)) ? &pll0 : &osc0; +- +- clk->parent = parent; +-} +- +-/* -------------------------------------------------------------------- +- * System peripherals +- * -------------------------------------------------------------------- */ +-static struct resource at32_pm0_resource[] = { +- { +- .start = 0xfff00000, +- .end = 0xfff0007f, +- .flags = IORESOURCE_MEM, +- }, +- IRQ(20), +-}; +- +-static struct resource at32ap700x_rtc0_resource[] = { +- { +- .start = 0xfff00080, +- .end = 0xfff000af, +- .flags = IORESOURCE_MEM, +- }, +- IRQ(21), +-}; +- +-static struct resource at32_wdt0_resource[] = { +- { +- .start = 0xfff000b0, +- .end = 0xfff000cf, +- .flags = IORESOURCE_MEM, +- }, +-}; +- +-static struct resource at32_eic0_resource[] = { +- { +- .start = 0xfff00100, +- .end = 0xfff0013f, +- .flags = IORESOURCE_MEM, +- }, +- IRQ(19), +-}; +- +-DEFINE_DEV(at32_pm, 0); +-DEFINE_DEV(at32ap700x_rtc, 0); +-DEFINE_DEV(at32_wdt, 0); +-DEFINE_DEV(at32_eic, 0); +- +-/* +- * Peripheral clock for PM, RTC, WDT and EIC. PM will ensure that this +- * is always running. +- */ +-static struct clk at32_pm_pclk = { +- .name = "pclk", +- .dev = &at32_pm0_device.dev, +- .parent = &pbb_clk, +- .mode = pbb_clk_mode, +- .get_rate = pbb_clk_get_rate, +- .users = 1, +- .index = 0, +-}; +- +-static struct resource intc0_resource[] = { +- PBMEM(0xfff00400), +-}; +-struct platform_device at32_intc0_device = { +- .name = "intc", +- .id = 0, +- .resource = intc0_resource, +- .num_resources = ARRAY_SIZE(intc0_resource), +-}; +-DEV_CLK(pclk, at32_intc0, pbb, 1); +- +-static struct clk ebi_clk = { +- .name = "ebi", +- .parent = &hsb_clk, +- .mode = hsb_clk_mode, +- .get_rate = hsb_clk_get_rate, +- .users = 1, +-}; +-static struct clk hramc_clk = { +- .name = "hramc", +- .parent = &hsb_clk, +- .mode = hsb_clk_mode, +- .get_rate = hsb_clk_get_rate, +- .users = 1, +- .index = 3, +-}; +- +-static struct resource smc0_resource[] = { +- PBMEM(0xfff03400), +-}; +-DEFINE_DEV(smc, 0); +-DEV_CLK(pclk, smc0, pbb, 13); +-DEV_CLK(mck, smc0, hsb, 0); +- +-static struct platform_device pdc_device = { +- .name = "pdc", +- .id = 0, +-}; +-DEV_CLK(hclk, pdc, hsb, 4); +-DEV_CLK(pclk, pdc, pba, 16); +- +-static struct clk pico_clk = { +- .name = "pico", +- .parent = &cpu_clk, +- .mode = cpu_clk_mode, +- .get_rate = cpu_clk_get_rate, +- .users = 1, +-}; +- +-static struct resource dmaca0_resource[] = { +- { +- .start = 0xff200000, +- .end = 0xff20ffff, +- .flags = IORESOURCE_MEM, +- }, +- IRQ(2), +-}; +-DEFINE_DEV(dmaca, 0); +-DEV_CLK(hclk, dmaca0, hsb, 10); +- +-/* -------------------------------------------------------------------- +- * HMATRIX +- * -------------------------------------------------------------------- */ +- +-static struct clk hmatrix_clk = { +- .name = "hmatrix_clk", +- .parent = &pbb_clk, +- .mode = pbb_clk_mode, +- .get_rate = pbb_clk_get_rate, +- .index = 2, +- .users = 1, +-}; +-#define HMATRIX_BASE ((void __iomem *)0xfff00800) +- +-#define hmatrix_readl(reg) \ +- __raw_readl((HMATRIX_BASE) + HMATRIX_##reg) +-#define hmatrix_writel(reg,value) \ +- __raw_writel((value), (HMATRIX_BASE) + HMATRIX_##reg) +- +-/* +- * Set bits in the HMATRIX Special Function Register (SFR) used by the +- * External Bus Interface (EBI). This can be used to enable special +- * features like CompactFlash support, NAND Flash support, etc. on +- * certain chipselects. +- */ +-static inline void set_ebi_sfr_bits(u32 mask) +-{ +- u32 sfr; +- +- clk_enable(&hmatrix_clk); +- sfr = hmatrix_readl(SFR4); +- sfr |= mask; +- hmatrix_writel(SFR4, sfr); +- clk_disable(&hmatrix_clk); +-} +- +-/* -------------------------------------------------------------------- +- * System Timer/Counter (TC) +- * -------------------------------------------------------------------- */ +-static struct resource at32_systc0_resource[] = { +- PBMEM(0xfff00c00), +- IRQ(22), +-}; +-struct platform_device at32_systc0_device = { +- .name = "systc", +- .id = 0, +- .resource = at32_systc0_resource, +- .num_resources = ARRAY_SIZE(at32_systc0_resource), +-}; +-DEV_CLK(pclk, at32_systc0, pbb, 3); +- +-/* -------------------------------------------------------------------- +- * PIO +- * -------------------------------------------------------------------- */ +- +-static struct resource pio0_resource[] = { +- PBMEM(0xffe02800), +- IRQ(13), +-}; +-DEFINE_DEV(pio, 0); +-DEV_CLK(mck, pio0, pba, 10); +- +-static struct resource pio1_resource[] = { +- PBMEM(0xffe02c00), +- IRQ(14), +-}; +-DEFINE_DEV(pio, 1); +-DEV_CLK(mck, pio1, pba, 11); +- +-static struct resource pio2_resource[] = { +- PBMEM(0xffe03000), +- IRQ(15), +-}; +-DEFINE_DEV(pio, 2); +-DEV_CLK(mck, pio2, pba, 12); +- +-static struct resource pio3_resource[] = { +- PBMEM(0xffe03400), +- IRQ(16), +-}; +-DEFINE_DEV(pio, 3); +-DEV_CLK(mck, pio3, pba, 13); +- +-static struct resource pio4_resource[] = { +- PBMEM(0xffe03800), +- IRQ(17), +-}; +-DEFINE_DEV(pio, 4); +-DEV_CLK(mck, pio4, pba, 14); +- +-void __init at32_add_system_devices(void) +-{ +- platform_device_register(&at32_pm0_device); +- platform_device_register(&at32_intc0_device); +- platform_device_register(&at32ap700x_rtc0_device); +- platform_device_register(&at32_wdt0_device); +- platform_device_register(&at32_eic0_device); +- platform_device_register(&smc0_device); +- platform_device_register(&pdc_device); +- platform_device_register(&dmaca0_device); +- +- platform_device_register(&at32_systc0_device); +- +- platform_device_register(&pio0_device); +- platform_device_register(&pio1_device); +- platform_device_register(&pio2_device); +- platform_device_register(&pio3_device); +- platform_device_register(&pio4_device); +-} +- +-/* -------------------------------------------------------------------- +- * USART +- * -------------------------------------------------------------------- */ +- +-static struct atmel_uart_data atmel_usart0_data = { +- .use_dma_tx = 1, +- .use_dma_rx = 1, +-}; +-static struct resource atmel_usart0_resource[] = { +- PBMEM(0xffe00c00), +- IRQ(6), +-}; +-DEFINE_DEV_DATA(atmel_usart, 0); +-DEV_CLK(usart, atmel_usart0, pba, 3); +- +-static struct atmel_uart_data atmel_usart1_data = { +- .use_dma_tx = 1, +- .use_dma_rx = 1, +-}; +-static struct resource atmel_usart1_resource[] = { +- PBMEM(0xffe01000), +- IRQ(7), +-}; +-DEFINE_DEV_DATA(atmel_usart, 1); +-DEV_CLK(usart, atmel_usart1, pba, 4); +- +-static struct atmel_uart_data atmel_usart2_data = { +- .use_dma_tx = 1, +- .use_dma_rx = 1, +-}; +-static struct resource atmel_usart2_resource[] = { +- PBMEM(0xffe01400), +- IRQ(8), +-}; +-DEFINE_DEV_DATA(atmel_usart, 2); +-DEV_CLK(usart, atmel_usart2, pba, 5); +- +-static struct atmel_uart_data atmel_usart3_data = { +- .use_dma_tx = 1, +- .use_dma_rx = 1, +-}; +-static struct resource atmel_usart3_resource[] = { +- PBMEM(0xffe01800), +- IRQ(9), +-}; +-DEFINE_DEV_DATA(atmel_usart, 3); +-DEV_CLK(usart, atmel_usart3, pba, 6); +- +-static inline void configure_usart0_pins(void) +-{ +- select_peripheral(PA(8), PERIPH_B, 0); /* RXD */ +- select_peripheral(PA(9), PERIPH_B, 0); /* TXD */ +-} +- +-static inline void configure_usart1_pins(void) +-{ +- select_peripheral(PA(17), PERIPH_A, 0); /* RXD */ +- select_peripheral(PA(18), PERIPH_A, 0); /* TXD */ +-} +- +-static inline void configure_usart2_pins(void) +-{ +- select_peripheral(PB(26), PERIPH_B, 0); /* RXD */ +- select_peripheral(PB(27), PERIPH_B, 0); /* TXD */ +-} +- +-static inline void configure_usart3_pins(void) +-{ +- select_peripheral(PB(18), PERIPH_B, 0); /* RXD */ +- select_peripheral(PB(17), PERIPH_B, 0); /* TXD */ +-} +- +-static struct platform_device *__initdata at32_usarts[4]; +- +-void __init at32_map_usart(unsigned int hw_id, unsigned int line) +-{ +- struct platform_device *pdev; +- +- switch (hw_id) { +- case 0: +- pdev = &atmel_usart0_device; +- configure_usart0_pins(); +- break; +- case 1: +- pdev = &atmel_usart1_device; +- configure_usart1_pins(); +- break; +- case 2: +- pdev = &atmel_usart2_device; +- configure_usart2_pins(); +- break; +- case 3: +- pdev = &atmel_usart3_device; +- configure_usart3_pins(); +- break; +- default: +- return; +- } +- +- if (PXSEG(pdev->resource[0].start) == P4SEG) { +- /* Addresses in the P4 segment are permanently mapped 1:1 */ +- struct atmel_uart_data *data = pdev->dev.platform_data; +- data->regs = (void __iomem *)pdev->resource[0].start; +- } +- +- pdev->id = line; +- at32_usarts[line] = pdev; +-} +- +-struct platform_device *__init at32_add_device_usart(unsigned int id) +-{ +- platform_device_register(at32_usarts[id]); +- return at32_usarts[id]; +-} +- +-struct platform_device *atmel_default_console_device; +- +-void __init at32_setup_serial_console(unsigned int usart_id) +-{ +- atmel_default_console_device = at32_usarts[usart_id]; +-} +- +-/* -------------------------------------------------------------------- +- * Ethernet +- * -------------------------------------------------------------------- */ +- +-static struct eth_platform_data macb0_data; +-static struct resource macb0_resource[] = { +- PBMEM(0xfff01800), +- IRQ(25), +-}; +-DEFINE_DEV_DATA(macb, 0); +-DEV_CLK(hclk, macb0, hsb, 8); +-DEV_CLK(pclk, macb0, pbb, 6); +- +-static struct eth_platform_data macb1_data; +-static struct resource macb1_resource[] = { +- PBMEM(0xfff01c00), +- IRQ(26), +-}; +-DEFINE_DEV_DATA(macb, 1); +-DEV_CLK(hclk, macb1, hsb, 9); +-DEV_CLK(pclk, macb1, pbb, 7); +- +-struct platform_device *__init +-at32_add_device_eth(unsigned int id, struct eth_platform_data *data) +-{ +- struct platform_device *pdev; +- +- switch (id) { +- case 0: +- pdev = &macb0_device; +- +- select_peripheral(PC(3), PERIPH_A, 0); /* TXD0 */ +- select_peripheral(PC(4), PERIPH_A, 0); /* TXD1 */ +- select_peripheral(PC(7), PERIPH_A, 0); /* TXEN */ +- select_peripheral(PC(8), PERIPH_A, 0); /* TXCK */ +- select_peripheral(PC(9), PERIPH_A, 0); /* RXD0 */ +- select_peripheral(PC(10), PERIPH_A, 0); /* RXD1 */ +- select_peripheral(PC(13), PERIPH_A, 0); /* RXER */ +- select_peripheral(PC(15), PERIPH_A, 0); /* RXDV */ +- select_peripheral(PC(16), PERIPH_A, 0); /* MDC */ +- select_peripheral(PC(17), PERIPH_A, 0); /* MDIO */ +- +- if (!data->is_rmii) { +- select_peripheral(PC(0), PERIPH_A, 0); /* COL */ +- select_peripheral(PC(1), PERIPH_A, 0); /* CRS */ +- select_peripheral(PC(2), PERIPH_A, 0); /* TXER */ +- select_peripheral(PC(5), PERIPH_A, 0); /* TXD2 */ +- select_peripheral(PC(6), PERIPH_A, 0); /* TXD3 */ +- select_peripheral(PC(11), PERIPH_A, 0); /* RXD2 */ +- select_peripheral(PC(12), PERIPH_A, 0); /* RXD3 */ +- select_peripheral(PC(14), PERIPH_A, 0); /* RXCK */ +- select_peripheral(PC(18), PERIPH_A, 0); /* SPD */ +- } +- break; +- +- case 1: +- pdev = &macb1_device; +- +- select_peripheral(PD(13), PERIPH_B, 0); /* TXD0 */ +- select_peripheral(PD(14), PERIPH_B, 0); /* TXD1 */ +- select_peripheral(PD(11), PERIPH_B, 0); /* TXEN */ +- select_peripheral(PD(12), PERIPH_B, 0); /* TXCK */ +- select_peripheral(PD(10), PERIPH_B, 0); /* RXD0 */ +- select_peripheral(PD(6), PERIPH_B, 0); /* RXD1 */ +- select_peripheral(PD(5), PERIPH_B, 0); /* RXER */ +- select_peripheral(PD(4), PERIPH_B, 0); /* RXDV */ +- select_peripheral(PD(3), PERIPH_B, 0); /* MDC */ +- select_peripheral(PD(2), PERIPH_B, 0); /* MDIO */ +- +- if (!data->is_rmii) { +- select_peripheral(PC(19), PERIPH_B, 0); /* COL */ +- select_peripheral(PC(23), PERIPH_B, 0); /* CRS */ +- select_peripheral(PC(26), PERIPH_B, 0); /* TXER */ +- select_peripheral(PC(27), PERIPH_B, 0); /* TXD2 */ +- select_peripheral(PC(28), PERIPH_B, 0); /* TXD3 */ +- select_peripheral(PC(29), PERIPH_B, 0); /* RXD2 */ +- select_peripheral(PC(30), PERIPH_B, 0); /* RXD3 */ +- select_peripheral(PC(24), PERIPH_B, 0); /* RXCK */ +- select_peripheral(PD(15), PERIPH_B, 0); /* SPD */ +- } +- break; +- +- default: +- return NULL; - } - +- memcpy(pdev->dev.platform_data, data, sizeof(struct eth_platform_data)); +- platform_device_register(pdev); - -- . = ALIGN(8); -- .bss : AT(ADDR(.bss) - LOAD_OFFSET) { -- __bss_start = .; -- *(.bss) -- *(COMMON) -- . = ALIGN(8); -- __bss_stop = .; -- _end = .; +- return pdev; +-} +- +-/* -------------------------------------------------------------------- +- * SPI +- * -------------------------------------------------------------------- */ +-static struct resource atmel_spi0_resource[] = { +- PBMEM(0xffe00000), +- IRQ(3), +-}; +-DEFINE_DEV(atmel_spi, 0); +-DEV_CLK(spi_clk, atmel_spi0, pba, 0); +- +-static struct resource atmel_spi1_resource[] = { +- PBMEM(0xffe00400), +- IRQ(4), +-}; +-DEFINE_DEV(atmel_spi, 1); +-DEV_CLK(spi_clk, atmel_spi1, pba, 1); +- +-static void __init +-at32_spi_setup_slaves(unsigned int bus_num, struct spi_board_info *b, +- unsigned int n, const u8 *pins) +-{ +- unsigned int pin, mode; +- +- for (; n; n--, b++) { +- b->bus_num = bus_num; +- if (b->chip_select >= 4) +- continue; +- pin = (unsigned)b->controller_data; +- if (!pin) { +- pin = pins[b->chip_select]; +- b->controller_data = (void *)pin; +- } +- mode = AT32_GPIOF_OUTPUT; +- if (!(b->mode & SPI_CS_HIGH)) +- mode |= AT32_GPIOF_HIGH; +- at32_select_gpio(pin, mode); - } +-} - -- /* When something in the kernel is NOT compiled as a module, the module -- * cleanup code and data are put into these segments. Both can then be -- * thrown away, as cleanup code is never called unless it's a module. +-struct platform_device *__init +-at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n) +-{ +- /* +- * Manage the chipselects as GPIOs, normally using the same pins +- * the SPI controller expects; but boards can use other pins. - */ -- /DISCARD/ : { -- *(.exit.data) -- *(.exitcall.exit) +- static u8 __initdata spi0_pins[] = +- { GPIO_PIN_PA(3), GPIO_PIN_PA(4), +- GPIO_PIN_PA(5), GPIO_PIN_PA(20), }; +- static u8 __initdata spi1_pins[] = +- { GPIO_PIN_PB(2), GPIO_PIN_PB(3), +- GPIO_PIN_PB(4), GPIO_PIN_PA(27), }; +- struct platform_device *pdev; +- +- switch (id) { +- case 0: +- pdev = &atmel_spi0_device; +- select_peripheral(PA(0), PERIPH_A, 0); /* MISO */ +- select_peripheral(PA(1), PERIPH_A, 0); /* MOSI */ +- select_peripheral(PA(2), PERIPH_A, 0); /* SCK */ +- at32_spi_setup_slaves(0, b, n, spi0_pins); +- break; +- +- case 1: +- pdev = &atmel_spi1_device; +- select_peripheral(PB(0), PERIPH_B, 0); /* MISO */ +- select_peripheral(PB(1), PERIPH_B, 0); /* MOSI */ +- select_peripheral(PB(5), PERIPH_B, 0); /* SCK */ +- at32_spi_setup_slaves(1, b, n, spi1_pins); +- break; +- +- default: +- return NULL; - } - -- DWARF_DEBUG +- spi_register_board_info(b, n); +- platform_device_register(pdev); +- return pdev; -} -diff --git a/arch/avr32/mach-at32ap/Kconfig b/arch/avr32/mach-at32ap/Kconfig -index eb30783..43c5b9f 100644 ---- a/arch/avr32/mach-at32ap/Kconfig -+++ b/arch/avr32/mach-at32ap/Kconfig -@@ -26,6 +26,13 @@ config AP7000_8_BIT_SMC - - endchoice - -+config GPIO_DEV -+ bool "GPIO /dev interface" -+ select CONFIGFS_FS -+ default n -+ help -+ Say `Y' to enable a /dev interface to the GPIO pins. +- +-/* -------------------------------------------------------------------- +- * TWI +- * -------------------------------------------------------------------- */ +-static struct resource atmel_twi0_resource[] __initdata = { +- PBMEM(0xffe00800), +- IRQ(5), +-}; +-static struct clk atmel_twi0_pclk = { +- .name = "twi_pclk", +- .parent = &pba_clk, +- .mode = pba_clk_mode, +- .get_rate = pba_clk_get_rate, +- .index = 2, +-}; +- +-struct platform_device *__init at32_add_device_twi(unsigned int id) +-{ +- struct platform_device *pdev; +- +- if (id != 0) +- return NULL; +- +- pdev = platform_device_alloc("atmel_twi", id); +- if (!pdev) +- return NULL; +- +- if (platform_device_add_resources(pdev, atmel_twi0_resource, +- ARRAY_SIZE(atmel_twi0_resource))) +- goto err_add_resources; +- +- select_peripheral(PA(6), PERIPH_A, 0); /* SDA */ +- select_peripheral(PA(7), PERIPH_A, 0); /* SDL */ +- +- atmel_twi0_pclk.dev = &pdev->dev; +- +- platform_device_add(pdev); +- return pdev; +- +-err_add_resources: +- platform_device_put(pdev); +- return NULL; +-} +- +-/* -------------------------------------------------------------------- +- * MMC +- * -------------------------------------------------------------------- */ +-static struct resource atmel_mci0_resource[] __initdata = { +- PBMEM(0xfff02400), +- IRQ(28), +-}; +-static struct clk atmel_mci0_pclk = { +- .name = "mci_clk", +- .parent = &pbb_clk, +- .mode = pbb_clk_mode, +- .get_rate = pbb_clk_get_rate, +- .index = 9, +-}; +- +-struct platform_device *__init at32_add_device_mci(unsigned int id) +-{ +- struct platform_device *pdev; +- +- if (id != 0) +- return NULL; +- +- pdev = platform_device_alloc("atmel_mci", id); +- if (!pdev) +- return NULL; +- +- if (platform_device_add_resources(pdev, atmel_mci0_resource, +- ARRAY_SIZE(atmel_mci0_resource))) +- goto err_add_resources; +- +- select_peripheral(PA(10), PERIPH_A, 0); /* CLK */ +- select_peripheral(PA(11), PERIPH_A, 0); /* CMD */ +- select_peripheral(PA(12), PERIPH_A, 0); /* DATA0 */ +- select_peripheral(PA(13), PERIPH_A, 0); /* DATA1 */ +- select_peripheral(PA(14), PERIPH_A, 0); /* DATA2 */ +- select_peripheral(PA(15), PERIPH_A, 0); /* DATA3 */ +- +- atmel_mci0_pclk.dev = &pdev->dev; +- +- platform_device_add(pdev); +- return pdev; +- +-err_add_resources: +- platform_device_put(pdev); +- return NULL; +-} +- +-/* -------------------------------------------------------------------- +- * LCDC +- * -------------------------------------------------------------------- */ +-static struct atmel_lcdfb_info atmel_lcdfb0_data; +-static struct resource atmel_lcdfb0_resource[] = { +- { +- .start = 0xff000000, +- .end = 0xff000fff, +- .flags = IORESOURCE_MEM, +- }, +- IRQ(1), +- { +- /* Placeholder for pre-allocated fb memory */ +- .start = 0x00000000, +- .end = 0x00000000, +- .flags = 0, +- }, +-}; +-DEFINE_DEV_DATA(atmel_lcdfb, 0); +-DEV_CLK(hck1, atmel_lcdfb0, hsb, 7); +-static struct clk atmel_lcdfb0_pixclk = { +- .name = "lcdc_clk", +- .dev = &atmel_lcdfb0_device.dev, +- .mode = genclk_mode, +- .get_rate = genclk_get_rate, +- .set_rate = genclk_set_rate, +- .set_parent = genclk_set_parent, +- .index = 7, +-}; +- +-struct platform_device *__init +-at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data, +- unsigned long fbmem_start, unsigned long fbmem_len) +-{ +- struct platform_device *pdev; +- struct atmel_lcdfb_info *info; +- struct fb_monspecs *monspecs; +- struct fb_videomode *modedb; +- unsigned int modedb_size; +- +- /* +- * Do a deep copy of the fb data, monspecs and modedb. Make +- * sure all allocations are done before setting up the +- * portmux. +- */ +- monspecs = kmemdup(data->default_monspecs, +- sizeof(struct fb_monspecs), GFP_KERNEL); +- if (!monspecs) +- return NULL; +- +- modedb_size = sizeof(struct fb_videomode) * monspecs->modedb_len; +- modedb = kmemdup(monspecs->modedb, modedb_size, GFP_KERNEL); +- if (!modedb) +- goto err_dup_modedb; +- monspecs->modedb = modedb; +- +- switch (id) { +- case 0: +- pdev = &atmel_lcdfb0_device; +- select_peripheral(PC(19), PERIPH_A, 0); /* CC */ +- select_peripheral(PC(20), PERIPH_A, 0); /* HSYNC */ +- select_peripheral(PC(21), PERIPH_A, 0); /* PCLK */ +- select_peripheral(PC(22), PERIPH_A, 0); /* VSYNC */ +- select_peripheral(PC(23), PERIPH_A, 0); /* DVAL */ +- select_peripheral(PC(24), PERIPH_A, 0); /* MODE */ +- select_peripheral(PC(25), PERIPH_A, 0); /* PWR */ +- select_peripheral(PC(26), PERIPH_A, 0); /* DATA0 */ +- select_peripheral(PC(27), PERIPH_A, 0); /* DATA1 */ +- select_peripheral(PC(28), PERIPH_A, 0); /* DATA2 */ +- select_peripheral(PC(29), PERIPH_A, 0); /* DATA3 */ +- select_peripheral(PC(30), PERIPH_A, 0); /* DATA4 */ +- select_peripheral(PC(31), PERIPH_A, 0); /* DATA5 */ +- select_peripheral(PD(0), PERIPH_A, 0); /* DATA6 */ +- select_peripheral(PD(1), PERIPH_A, 0); /* DATA7 */ +- select_peripheral(PD(2), PERIPH_A, 0); /* DATA8 */ +- select_peripheral(PD(3), PERIPH_A, 0); /* DATA9 */ +- select_peripheral(PD(4), PERIPH_A, 0); /* DATA10 */ +- select_peripheral(PD(5), PERIPH_A, 0); /* DATA11 */ +- select_peripheral(PD(6), PERIPH_A, 0); /* DATA12 */ +- select_peripheral(PD(7), PERIPH_A, 0); /* DATA13 */ +- select_peripheral(PD(8), PERIPH_A, 0); /* DATA14 */ +- select_peripheral(PD(9), PERIPH_A, 0); /* DATA15 */ +- select_peripheral(PD(10), PERIPH_A, 0); /* DATA16 */ +- select_peripheral(PD(11), PERIPH_A, 0); /* DATA17 */ +- select_peripheral(PD(12), PERIPH_A, 0); /* DATA18 */ +- select_peripheral(PD(13), PERIPH_A, 0); /* DATA19 */ +- select_peripheral(PD(14), PERIPH_A, 0); /* DATA20 */ +- select_peripheral(PD(15), PERIPH_A, 0); /* DATA21 */ +- select_peripheral(PD(16), PERIPH_A, 0); /* DATA22 */ +- select_peripheral(PD(17), PERIPH_A, 0); /* DATA23 */ +- +- clk_set_parent(&atmel_lcdfb0_pixclk, &pll0); +- clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0)); +- break; +- +- default: +- goto err_invalid_id; +- } +- +- if (fbmem_len) { +- pdev->resource[2].start = fbmem_start; +- pdev->resource[2].end = fbmem_start + fbmem_len - 1; +- pdev->resource[2].flags = IORESOURCE_MEM; +- } +- +- info = pdev->dev.platform_data; +- memcpy(info, data, sizeof(struct atmel_lcdfb_info)); +- info->default_monspecs = monspecs; +- +- platform_device_register(pdev); +- return pdev; +- +-err_invalid_id: +- kfree(modedb); +-err_dup_modedb: +- kfree(monspecs); +- return NULL; +-} +- +-/* -------------------------------------------------------------------- +- * SSC +- * -------------------------------------------------------------------- */ +-static struct resource ssc0_resource[] = { +- PBMEM(0xffe01c00), +- IRQ(10), +-}; +-DEFINE_DEV(ssc, 0); +-DEV_CLK(pclk, ssc0, pba, 7); +- +-static struct resource ssc1_resource[] = { +- PBMEM(0xffe02000), +- IRQ(11), +-}; +-DEFINE_DEV(ssc, 1); +-DEV_CLK(pclk, ssc1, pba, 8); +- +-static struct resource ssc2_resource[] = { +- PBMEM(0xffe02400), +- IRQ(12), +-}; +-DEFINE_DEV(ssc, 2); +-DEV_CLK(pclk, ssc2, pba, 9); +- +-struct platform_device *__init +-at32_add_device_ssc(unsigned int id, unsigned int flags) +-{ +- struct platform_device *pdev; +- +- switch (id) { +- case 0: +- pdev = &ssc0_device; +- if (flags & ATMEL_SSC_RF) +- select_peripheral(PA(21), PERIPH_A, 0); /* RF */ +- if (flags & ATMEL_SSC_RK) +- select_peripheral(PA(22), PERIPH_A, 0); /* RK */ +- if (flags & ATMEL_SSC_TK) +- select_peripheral(PA(23), PERIPH_A, 0); /* TK */ +- if (flags & ATMEL_SSC_TF) +- select_peripheral(PA(24), PERIPH_A, 0); /* TF */ +- if (flags & ATMEL_SSC_TD) +- select_peripheral(PA(25), PERIPH_A, 0); /* TD */ +- if (flags & ATMEL_SSC_RD) +- select_peripheral(PA(26), PERIPH_A, 0); /* RD */ +- break; +- case 1: +- pdev = &ssc1_device; +- if (flags & ATMEL_SSC_RF) +- select_peripheral(PA(0), PERIPH_B, 0); /* RF */ +- if (flags & ATMEL_SSC_RK) +- select_peripheral(PA(1), PERIPH_B, 0); /* RK */ +- if (flags & ATMEL_SSC_TK) +- select_peripheral(PA(2), PERIPH_B, 0); /* TK */ +- if (flags & ATMEL_SSC_TF) +- select_peripheral(PA(3), PERIPH_B, 0); /* TF */ +- if (flags & ATMEL_SSC_TD) +- select_peripheral(PA(4), PERIPH_B, 0); /* TD */ +- if (flags & ATMEL_SSC_RD) +- select_peripheral(PA(5), PERIPH_B, 0); /* RD */ +- break; +- case 2: +- pdev = &ssc2_device; +- if (flags & ATMEL_SSC_TD) +- select_peripheral(PB(13), PERIPH_A, 0); /* TD */ +- if (flags & ATMEL_SSC_RD) +- select_peripheral(PB(14), PERIPH_A, 0); /* RD */ +- if (flags & ATMEL_SSC_TK) +- select_peripheral(PB(15), PERIPH_A, 0); /* TK */ +- if (flags & ATMEL_SSC_TF) +- select_peripheral(PB(16), PERIPH_A, 0); /* TF */ +- if (flags & ATMEL_SSC_RF) +- select_peripheral(PB(17), PERIPH_A, 0); /* RF */ +- if (flags & ATMEL_SSC_RK) +- select_peripheral(PB(18), PERIPH_A, 0); /* RK */ +- break; +- default: +- return NULL; +- } +- +- platform_device_register(pdev); +- return pdev; +-} +- +-/* -------------------------------------------------------------------- +- * USB Device Controller +- * -------------------------------------------------------------------- */ +-static struct resource usba0_resource[] __initdata = { +- { +- .start = 0xff300000, +- .end = 0xff3fffff, +- .flags = IORESOURCE_MEM, +- }, { +- .start = 0xfff03000, +- .end = 0xfff033ff, +- .flags = IORESOURCE_MEM, +- }, +- IRQ(31), +-}; +-static struct clk usba0_pclk = { +- .name = "pclk", +- .parent = &pbb_clk, +- .mode = pbb_clk_mode, +- .get_rate = pbb_clk_get_rate, +- .index = 12, +-}; +-static struct clk usba0_hclk = { +- .name = "hclk", +- .parent = &hsb_clk, +- .mode = hsb_clk_mode, +- .get_rate = hsb_clk_get_rate, +- .index = 6, +-}; +- +-struct platform_device *__init +-at32_add_device_usba(unsigned int id, struct usba_platform_data *data) +-{ +- struct platform_device *pdev; +- +- if (id != 0) +- return NULL; +- +- pdev = platform_device_alloc("atmel_usba_udc", 0); +- if (!pdev) +- return NULL; +- +- if (platform_device_add_resources(pdev, usba0_resource, +- ARRAY_SIZE(usba0_resource))) +- goto out_free_pdev; +- +- if (data) { +- if (platform_device_add_data(pdev, data, sizeof(*data))) +- goto out_free_pdev; +- +- if (data->vbus_pin != GPIO_PIN_NONE) +- at32_select_gpio(data->vbus_pin, 0); +- } +- +- usba0_pclk.dev = &pdev->dev; +- usba0_hclk.dev = &pdev->dev; +- +- platform_device_add(pdev); +- +- return pdev; +- +-out_free_pdev: +- platform_device_put(pdev); +- return NULL; +-} +- +-/* -------------------------------------------------------------------- +- * IDE / CompactFlash +- * -------------------------------------------------------------------- */ +-static struct resource at32_smc_cs4_resource[] __initdata = { +- { +- .start = 0x04000000, +- .end = 0x07ffffff, +- .flags = IORESOURCE_MEM, +- }, +- IRQ(~0UL), /* Magic IRQ will be overridden */ +-}; +-static struct resource at32_smc_cs5_resource[] __initdata = { +- { +- .start = 0x20000000, +- .end = 0x23ffffff, +- .flags = IORESOURCE_MEM, +- }, +- IRQ(~0UL), /* Magic IRQ will be overridden */ +-}; +- +-static int __init at32_init_ide_or_cf(struct platform_device *pdev, +- unsigned int cs, unsigned int extint) +-{ +- static unsigned int extint_pin_map[4] __initdata = { +- GPIO_PIN_PB(25), +- GPIO_PIN_PB(26), +- GPIO_PIN_PB(27), +- GPIO_PIN_PB(28), +- }; +- static bool common_pins_initialized __initdata = false; +- unsigned int extint_pin; +- int ret; +- +- if (extint >= ARRAY_SIZE(extint_pin_map)) +- return -EINVAL; +- extint_pin = extint_pin_map[extint]; +- +- switch (cs) { +- case 4: +- ret = platform_device_add_resources(pdev, +- at32_smc_cs4_resource, +- ARRAY_SIZE(at32_smc_cs4_resource)); +- if (ret) +- return ret; +- +- select_peripheral(PE(21), PERIPH_A, 0); /* NCS4 -> OE_N */ +- set_ebi_sfr_bits(HMATRIX_BIT(CS4A)); +- break; +- case 5: +- ret = platform_device_add_resources(pdev, +- at32_smc_cs5_resource, +- ARRAY_SIZE(at32_smc_cs5_resource)); +- if (ret) +- return ret; +- +- select_peripheral(PE(22), PERIPH_A, 0); /* NCS5 -> OE_N */ +- set_ebi_sfr_bits(HMATRIX_BIT(CS5A)); +- break; +- default: +- return -EINVAL; +- } +- +- if (!common_pins_initialized) { +- select_peripheral(PE(19), PERIPH_A, 0); /* CFCE1 -> CS0_N */ +- select_peripheral(PE(20), PERIPH_A, 0); /* CFCE2 -> CS1_N */ +- select_peripheral(PE(23), PERIPH_A, 0); /* CFRNW -> DIR */ +- select_peripheral(PE(24), PERIPH_A, 0); /* NWAIT <- IORDY */ +- common_pins_initialized = true; +- } +- +- at32_select_periph(extint_pin, GPIO_PERIPH_A, AT32_GPIOF_DEGLITCH); +- +- pdev->resource[1].start = EIM_IRQ_BASE + extint; +- pdev->resource[1].end = pdev->resource[1].start; +- +- return 0; +-} +- +-struct platform_device *__init +-at32_add_device_ide(unsigned int id, unsigned int extint, +- struct ide_platform_data *data) +-{ +- struct platform_device *pdev; +- +- pdev = platform_device_alloc("at32_ide", id); +- if (!pdev) +- goto fail; +- +- if (platform_device_add_data(pdev, data, +- sizeof(struct ide_platform_data))) +- goto fail; +- +- if (at32_init_ide_or_cf(pdev, data->cs, extint)) +- goto fail; +- +- platform_device_add(pdev); +- return pdev; +- +-fail: +- platform_device_put(pdev); +- return NULL; +-} +- +-struct platform_device *__init +-at32_add_device_cf(unsigned int id, unsigned int extint, +- struct cf_platform_data *data) +-{ +- struct platform_device *pdev; +- +- pdev = platform_device_alloc("at32_cf", id); +- if (!pdev) +- goto fail; +- +- if (platform_device_add_data(pdev, data, +- sizeof(struct cf_platform_data))) +- goto fail; +- +- if (at32_init_ide_or_cf(pdev, data->cs, extint)) +- goto fail; +- +- if (data->detect_pin != GPIO_PIN_NONE) +- at32_select_gpio(data->detect_pin, AT32_GPIOF_DEGLITCH); +- if (data->reset_pin != GPIO_PIN_NONE) +- at32_select_gpio(data->reset_pin, 0); +- if (data->vcc_pin != GPIO_PIN_NONE) +- at32_select_gpio(data->vcc_pin, 0); +- /* READY is used as extint, so we can't select it as gpio */ +- +- platform_device_add(pdev); +- return pdev; +- +-fail: +- platform_device_put(pdev); +- return NULL; +-} +- +-/* -------------------------------------------------------------------- +- * AC97C +- * -------------------------------------------------------------------- */ +-static struct resource atmel_ac97c0_resource[] __initdata = { +- PBMEM(0xfff02800), +- IRQ(29), +-}; +-static struct clk atmel_ac97c0_pclk = { +- .name = "pclk", +- .parent = &pbb_clk, +- .mode = pbb_clk_mode, +- .get_rate = pbb_clk_get_rate, +- .index = 10, +-}; +- +-struct platform_device *__init at32_add_device_ac97c(unsigned int id) +-{ +- struct platform_device *pdev; +- +- if (id != 0) +- return NULL; +- +- pdev = platform_device_alloc("atmel_ac97c", id); +- if (!pdev) +- return NULL; +- +- if (platform_device_add_resources(pdev, atmel_ac97c0_resource, +- ARRAY_SIZE(atmel_ac97c0_resource))) +- goto err_add_resources; +- +- select_peripheral(PB(20), PERIPH_B, 0); /* SYNC */ +- select_peripheral(PB(21), PERIPH_B, 0); /* SDO */ +- select_peripheral(PB(22), PERIPH_B, 0); /* SDI */ +- select_peripheral(PB(23), PERIPH_B, 0); /* SCLK */ +- +- atmel_ac97c0_pclk.dev = &pdev->dev; +- +- platform_device_add(pdev); +- return pdev; +- +-err_add_resources: +- platform_device_put(pdev); +- return NULL; +-} +- +-/* -------------------------------------------------------------------- +- * ABDAC +- * -------------------------------------------------------------------- */ +-static struct resource abdac0_resource[] __initdata = { +- PBMEM(0xfff02000), +- IRQ(27), +-}; +-static struct clk abdac0_pclk = { +- .name = "pclk", +- .parent = &pbb_clk, +- .mode = pbb_clk_mode, +- .get_rate = pbb_clk_get_rate, +- .index = 8, +-}; +-static struct clk abdac0_sample_clk = { +- .name = "sample_clk", +- .mode = genclk_mode, +- .get_rate = genclk_get_rate, +- .set_rate = genclk_set_rate, +- .set_parent = genclk_set_parent, +- .index = 6, +-}; +- +-struct platform_device *__init at32_add_device_abdac(unsigned int id) +-{ +- struct platform_device *pdev; +- +- if (id != 0) +- return NULL; +- +- pdev = platform_device_alloc("abdac", id); +- if (!pdev) +- return NULL; +- +- if (platform_device_add_resources(pdev, abdac0_resource, +- ARRAY_SIZE(abdac0_resource))) +- goto err_add_resources; +- +- select_peripheral(PB(20), PERIPH_A, 0); /* DATA1 */ +- select_peripheral(PB(21), PERIPH_A, 0); /* DATA0 */ +- select_peripheral(PB(22), PERIPH_A, 0); /* DATAN1 */ +- select_peripheral(PB(23), PERIPH_A, 0); /* DATAN0 */ +- +- abdac0_pclk.dev = &pdev->dev; +- abdac0_sample_clk.dev = &pdev->dev; +- +- platform_device_add(pdev); +- return pdev; +- +-err_add_resources: +- platform_device_put(pdev); +- return NULL; +-} +- +-/* -------------------------------------------------------------------- +- * GCLK +- * -------------------------------------------------------------------- */ +-static struct clk gclk0 = { +- .name = "gclk0", +- .mode = genclk_mode, +- .get_rate = genclk_get_rate, +- .set_rate = genclk_set_rate, +- .set_parent = genclk_set_parent, +- .index = 0, +-}; +-static struct clk gclk1 = { +- .name = "gclk1", +- .mode = genclk_mode, +- .get_rate = genclk_get_rate, +- .set_rate = genclk_set_rate, +- .set_parent = genclk_set_parent, +- .index = 1, +-}; +-static struct clk gclk2 = { +- .name = "gclk2", +- .mode = genclk_mode, +- .get_rate = genclk_get_rate, +- .set_rate = genclk_set_rate, +- .set_parent = genclk_set_parent, +- .index = 2, +-}; +-static struct clk gclk3 = { +- .name = "gclk3", +- .mode = genclk_mode, +- .get_rate = genclk_get_rate, +- .set_rate = genclk_set_rate, +- .set_parent = genclk_set_parent, +- .index = 3, +-}; +-static struct clk gclk4 = { +- .name = "gclk4", +- .mode = genclk_mode, +- .get_rate = genclk_get_rate, +- .set_rate = genclk_set_rate, +- .set_parent = genclk_set_parent, +- .index = 4, +-}; +- +-struct clk *at32_clock_list[] = { +- &osc32k, +- &osc0, +- &osc1, +- &pll0, +- &pll1, +- &cpu_clk, +- &hsb_clk, +- &pba_clk, +- &pbb_clk, +- &at32_pm_pclk, +- &at32_intc0_pclk, +- &hmatrix_clk, +- &ebi_clk, +- &hramc_clk, +- &smc0_pclk, +- &smc0_mck, +- &pdc_hclk, +- &pdc_pclk, +- &dmaca0_hclk, +- &pico_clk, +- &pio0_mck, +- &pio1_mck, +- &pio2_mck, +- &pio3_mck, +- &pio4_mck, +- &at32_systc0_pclk, +- &atmel_usart0_usart, +- &atmel_usart1_usart, +- &atmel_usart2_usart, +- &atmel_usart3_usart, +- &macb0_hclk, +- &macb0_pclk, +- &macb1_hclk, +- &macb1_pclk, +- &atmel_spi0_spi_clk, +- &atmel_spi1_spi_clk, +- &atmel_twi0_pclk, +- &atmel_mci0_pclk, +- &atmel_lcdfb0_hck1, +- &atmel_lcdfb0_pixclk, +- &ssc0_pclk, +- &ssc1_pclk, +- &ssc2_pclk, +- &usba0_hclk, +- &usba0_pclk, +- &atmel_ac97c0_pclk, +- &abdac0_pclk, +- &abdac0_sample_clk, +- &gclk0, +- &gclk1, +- &gclk2, +- &gclk3, +- &gclk4, +-}; +-unsigned int at32_nr_clocks = ARRAY_SIZE(at32_clock_list); +- +-void __init at32_portmux_init(void) +-{ +- at32_init_pio(&pio0_device); +- at32_init_pio(&pio1_device); +- at32_init_pio(&pio2_device); +- at32_init_pio(&pio3_device); +- at32_init_pio(&pio4_device); +-} +- +-void __init at32_clock_init(void) +-{ +- u32 cpu_mask = 0, hsb_mask = 0, pba_mask = 0, pbb_mask = 0; +- int i; +- +- if (pm_readl(MCCTRL) & PM_BIT(PLLSEL)) { +- main_clock = &pll0; +- cpu_clk.parent = &pll0; +- } else { +- main_clock = &osc0; +- cpu_clk.parent = &osc0; +- } +- +- if (pm_readl(PLL0) & PM_BIT(PLLOSC)) +- pll0.parent = &osc1; +- if (pm_readl(PLL1) & PM_BIT(PLLOSC)) +- pll1.parent = &osc1; +- +- genclk_init_parent(&gclk0); +- genclk_init_parent(&gclk1); +- genclk_init_parent(&gclk2); +- genclk_init_parent(&gclk3); +- genclk_init_parent(&gclk4); +- genclk_init_parent(&atmel_lcdfb0_pixclk); +- genclk_init_parent(&abdac0_sample_clk); +- +- /* +- * Turn on all clocks that have at least one user already, and +- * turn off everything else. We only do this for module +- * clocks, and even though it isn't particularly pretty to +- * check the address of the mode function, it should do the +- * trick... +- */ +- for (i = 0; i < ARRAY_SIZE(at32_clock_list); i++) { +- struct clk *clk = at32_clock_list[i]; +- +- if (clk->users == 0) +- continue; +- +- if (clk->mode == &cpu_clk_mode) +- cpu_mask |= 1 << clk->index; +- else if (clk->mode == &hsb_clk_mode) +- hsb_mask |= 1 << clk->index; +- else if (clk->mode == &pba_clk_mode) +- pba_mask |= 1 << clk->index; +- else if (clk->mode == &pbb_clk_mode) +- pbb_mask |= 1 << clk->index; +- } +- +- pm_writel(CPU_MASK, cpu_mask); +- pm_writel(HSB_MASK, hsb_mask); +- pm_writel(PBA_MASK, pba_mask); +- pm_writel(PBB_MASK, pbb_mask); +-} +diff --git a/arch/avr32/mach-at32ap/at32ap700x.c b/arch/avr32/mach-at32ap/at32ap700x.c +new file mode 100644 +index 0000000..06795d0 +--- /dev/null ++++ b/arch/avr32/mach-at32ap/at32ap700x.c +@@ -0,0 +1,1809 @@ ++/* ++ * Copyright (C) 2005-2006 Atmel Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ */ ++#include <linux/clk.h> ++#include <linux/fb.h> ++#include <linux/init.h> ++#include <linux/platform_device.h> ++#include <linux/dma-mapping.h> ++#include <linux/spi/spi.h> ++ ++#include <asm/io.h> ++#include <asm/irq.h> ++ ++#include <asm/arch/at32ap700x.h> ++#include <asm/arch/board.h> ++#include <asm/arch/portmux.h> ++ ++#include <video/atmel_lcdc.h> ++ ++#include "clock.h" ++#include "hmatrix.h" ++#include "pio.h" ++#include "pm.h" ++ ++ ++#define PBMEM(base) \ ++ { \ ++ .start = base, \ ++ .end = base + 0x3ff, \ ++ .flags = IORESOURCE_MEM, \ ++ } ++#define IRQ(num) \ ++ { \ ++ .start = num, \ ++ .end = num, \ ++ .flags = IORESOURCE_IRQ, \ ++ } ++#define NAMED_IRQ(num, _name) \ ++ { \ ++ .start = num, \ ++ .end = num, \ ++ .name = _name, \ ++ .flags = IORESOURCE_IRQ, \ ++ } ++ ++/* REVISIT these assume *every* device supports DMA, but several ++ * don't ... tc, smc, pio, rtc, watchdog, pwm, ps2, and more. ++ */ ++#define DEFINE_DEV(_name, _id) \ ++static u64 _name##_id##_dma_mask = DMA_32BIT_MASK; \ ++static struct platform_device _name##_id##_device = { \ ++ .name = #_name, \ ++ .id = _id, \ ++ .dev = { \ ++ .dma_mask = &_name##_id##_dma_mask, \ ++ .coherent_dma_mask = DMA_32BIT_MASK, \ ++ }, \ ++ .resource = _name##_id##_resource, \ ++ .num_resources = ARRAY_SIZE(_name##_id##_resource), \ ++} ++#define DEFINE_DEV_DATA(_name, _id) \ ++static u64 _name##_id##_dma_mask = DMA_32BIT_MASK; \ ++static struct platform_device _name##_id##_device = { \ ++ .name = #_name, \ ++ .id = _id, \ ++ .dev = { \ ++ .dma_mask = &_name##_id##_dma_mask, \ ++ .platform_data = &_name##_id##_data, \ ++ .coherent_dma_mask = DMA_32BIT_MASK, \ ++ }, \ ++ .resource = _name##_id##_resource, \ ++ .num_resources = ARRAY_SIZE(_name##_id##_resource), \ ++} ++ ++#define select_peripheral(pin, periph, flags) \ ++ at32_select_periph(GPIO_PIN_##pin, GPIO_##periph, flags) ++ ++#define DEV_CLK(_name, devname, bus, _index) \ ++static struct clk devname##_##_name = { \ ++ .name = #_name, \ ++ .dev = &devname##_device.dev, \ ++ .parent = &bus##_clk, \ ++ .mode = bus##_clk_mode, \ ++ .get_rate = bus##_clk_get_rate, \ ++ .index = _index, \ ++} ++ ++static DEFINE_SPINLOCK(pm_lock); ++ ++unsigned long at32ap7000_osc_rates[3] = { ++ [0] = 32768, ++ /* FIXME: these are ATSTK1002-specific */ ++ [1] = 20000000, ++ [2] = 12000000, ++}; ++ ++static unsigned long osc_get_rate(struct clk *clk) ++{ ++ return at32ap7000_osc_rates[clk->index]; ++} ++ ++static unsigned long pll_get_rate(struct clk *clk, unsigned long control) ++{ ++ unsigned long div, mul, rate; ++ ++ if (!(control & PM_BIT(PLLEN))) ++ return 0; ++ ++ div = PM_BFEXT(PLLDIV, control) + 1; ++ mul = PM_BFEXT(PLLMUL, control) + 1; ++ ++ rate = clk->parent->get_rate(clk->parent); ++ rate = (rate + div / 2) / div; ++ rate *= mul; ++ ++ return rate; ++} ++ ++static unsigned long pll0_get_rate(struct clk *clk) ++{ ++ u32 control; ++ ++ control = pm_readl(PLL0); ++ ++ return pll_get_rate(clk, control); ++} ++ ++static unsigned long pll1_get_rate(struct clk *clk) ++{ ++ u32 control; ++ ++ control = pm_readl(PLL1); ++ ++ return pll_get_rate(clk, control); ++} ++ ++/* ++ * The AT32AP7000 has five primary clock sources: One 32kHz ++ * oscillator, two crystal oscillators and two PLLs. ++ */ ++static struct clk osc32k = { ++ .name = "osc32k", ++ .get_rate = osc_get_rate, ++ .users = 1, ++ .index = 0, ++}; ++static struct clk osc0 = { ++ .name = "osc0", ++ .get_rate = osc_get_rate, ++ .users = 1, ++ .index = 1, ++}; ++static struct clk osc1 = { ++ .name = "osc1", ++ .get_rate = osc_get_rate, ++ .index = 2, ++}; ++static struct clk pll0 = { ++ .name = "pll0", ++ .get_rate = pll0_get_rate, ++ .parent = &osc0, ++}; ++static struct clk pll1 = { ++ .name = "pll1", ++ .get_rate = pll1_get_rate, ++ .parent = &osc0, ++}; ++ ++/* ++ * The main clock can be either osc0 or pll0. The boot loader may ++ * have chosen one for us, so we don't really know which one until we ++ * have a look at the SM. ++ */ ++static struct clk *main_clock; ++ ++/* ++ * Synchronous clocks are generated from the main clock. The clocks ++ * must satisfy the constraint ++ * fCPU >= fHSB >= fPB ++ * i.e. each clock must not be faster than its parent. ++ */ ++static unsigned long bus_clk_get_rate(struct clk *clk, unsigned int shift) ++{ ++ return main_clock->get_rate(main_clock) >> shift; ++}; ++ ++static void cpu_clk_mode(struct clk *clk, int enabled) ++{ ++ unsigned long flags; ++ u32 mask; ++ ++ spin_lock_irqsave(&pm_lock, flags); ++ mask = pm_readl(CPU_MASK); ++ if (enabled) ++ mask |= 1 << clk->index; ++ else ++ mask &= ~(1 << clk->index); ++ pm_writel(CPU_MASK, mask); ++ spin_unlock_irqrestore(&pm_lock, flags); ++} ++ ++static unsigned long cpu_clk_get_rate(struct clk *clk) ++{ ++ unsigned long cksel, shift = 0; ++ ++ cksel = pm_readl(CKSEL); ++ if (cksel & PM_BIT(CPUDIV)) ++ shift = PM_BFEXT(CPUSEL, cksel) + 1; ++ ++ return bus_clk_get_rate(clk, shift); ++} ++ ++static long cpu_clk_set_rate(struct clk *clk, unsigned long rate, int apply) ++{ ++ u32 control; ++ unsigned long parent_rate, child_div, actual_rate, div; ++ ++ parent_rate = clk->parent->get_rate(clk->parent); ++ control = pm_readl(CKSEL); ++ ++ if (control & PM_BIT(HSBDIV)) ++ child_div = 1 << (PM_BFEXT(HSBSEL, control) + 1); ++ else ++ child_div = 1; ++ ++ if (rate > 3 * (parent_rate / 4) || child_div == 1) { ++ actual_rate = parent_rate; ++ control &= ~PM_BIT(CPUDIV); ++ } else { ++ unsigned int cpusel; ++ div = (parent_rate + rate / 2) / rate; ++ if (div > child_div) ++ div = child_div; ++ cpusel = (div > 1) ? (fls(div) - 2) : 0; ++ control = PM_BIT(CPUDIV) | PM_BFINS(CPUSEL, cpusel, control); ++ actual_rate = parent_rate / (1 << (cpusel + 1)); ++ } ++ ++ pr_debug("clk %s: new rate %lu (actual rate %lu)\n", ++ clk->name, rate, actual_rate); ++ ++ if (apply) ++ pm_writel(CKSEL, control); ++ ++ return actual_rate; ++} ++ ++static void hsb_clk_mode(struct clk *clk, int enabled) ++{ ++ unsigned long flags; ++ u32 mask; ++ ++ spin_lock_irqsave(&pm_lock, flags); ++ mask = pm_readl(HSB_MASK); ++ if (enabled) ++ mask |= 1 << clk->index; ++ else ++ mask &= ~(1 << clk->index); ++ pm_writel(HSB_MASK, mask); ++ spin_unlock_irqrestore(&pm_lock, flags); ++} ++ ++static unsigned long hsb_clk_get_rate(struct clk *clk) ++{ ++ unsigned long cksel, shift = 0; ++ ++ cksel = pm_readl(CKSEL); ++ if (cksel & PM_BIT(HSBDIV)) ++ shift = PM_BFEXT(HSBSEL, cksel) + 1; ++ ++ return bus_clk_get_rate(clk, shift); ++} ++ ++static void pba_clk_mode(struct clk *clk, int enabled) ++{ ++ unsigned long flags; ++ u32 mask; ++ ++ spin_lock_irqsave(&pm_lock, flags); ++ mask = pm_readl(PBA_MASK); ++ if (enabled) ++ mask |= 1 << clk->index; ++ else ++ mask &= ~(1 << clk->index); ++ pm_writel(PBA_MASK, mask); ++ spin_unlock_irqrestore(&pm_lock, flags); ++} ++ ++static unsigned long pba_clk_get_rate(struct clk *clk) ++{ ++ unsigned long cksel, shift = 0; ++ ++ cksel = pm_readl(CKSEL); ++ if (cksel & PM_BIT(PBADIV)) ++ shift = PM_BFEXT(PBASEL, cksel) + 1; ++ ++ return bus_clk_get_rate(clk, shift); ++} ++ ++static void pbb_clk_mode(struct clk *clk, int enabled) ++{ ++ unsigned long flags; ++ u32 mask; ++ ++ spin_lock_irqsave(&pm_lock, flags); ++ mask = pm_readl(PBB_MASK); ++ if (enabled) ++ mask |= 1 << clk->index; ++ else ++ mask &= ~(1 << clk->index); ++ pm_writel(PBB_MASK, mask); ++ spin_unlock_irqrestore(&pm_lock, flags); ++} ++ ++static unsigned long pbb_clk_get_rate(struct clk *clk) ++{ ++ unsigned long cksel, shift = 0; ++ ++ cksel = pm_readl(CKSEL); ++ if (cksel & PM_BIT(PBBDIV)) ++ shift = PM_BFEXT(PBBSEL, cksel) + 1; ++ ++ return bus_clk_get_rate(clk, shift); ++} ++ ++static struct clk cpu_clk = { ++ .name = "cpu", ++ .get_rate = cpu_clk_get_rate, ++ .set_rate = cpu_clk_set_rate, ++ .users = 1, ++}; ++static struct clk hsb_clk = { ++ .name = "hsb", ++ .parent = &cpu_clk, ++ .get_rate = hsb_clk_get_rate, ++}; ++static struct clk pba_clk = { ++ .name = "pba", ++ .parent = &hsb_clk, ++ .mode = hsb_clk_mode, ++ .get_rate = pba_clk_get_rate, ++ .index = 1, ++}; ++static struct clk pbb_clk = { ++ .name = "pbb", ++ .parent = &hsb_clk, ++ .mode = hsb_clk_mode, ++ .get_rate = pbb_clk_get_rate, ++ .users = 1, ++ .index = 2, ++}; ++ ++/* -------------------------------------------------------------------- ++ * Generic Clock operations ++ * -------------------------------------------------------------------- */ ++ ++static void genclk_mode(struct clk *clk, int enabled) ++{ ++ u32 control; ++ ++ control = pm_readl(GCCTRL(clk->index)); ++ if (enabled) ++ control |= PM_BIT(CEN); ++ else ++ control &= ~PM_BIT(CEN); ++ pm_writel(GCCTRL(clk->index), control); ++} ++ ++static unsigned long genclk_get_rate(struct clk *clk) ++{ ++ u32 control; ++ unsigned long div = 1; ++ ++ control = pm_readl(GCCTRL(clk->index)); ++ if (control & PM_BIT(DIVEN)) ++ div = 2 * (PM_BFEXT(DIV, control) + 1); ++ ++ return clk->parent->get_rate(clk->parent) / div; ++} ++ ++static long genclk_set_rate(struct clk *clk, unsigned long rate, int apply) ++{ ++ u32 control; ++ unsigned long parent_rate, actual_rate, div; ++ ++ parent_rate = clk->parent->get_rate(clk->parent); ++ control = pm_readl(GCCTRL(clk->index)); ++ ++ if (rate > 3 * parent_rate / 4) { ++ actual_rate = parent_rate; ++ control &= ~PM_BIT(DIVEN); ++ } else { ++ div = (parent_rate + rate) / (2 * rate) - 1; ++ control = PM_BFINS(DIV, div, control) | PM_BIT(DIVEN); ++ actual_rate = parent_rate / (2 * (div + 1)); ++ } ++ ++ dev_dbg(clk->dev, "clk %s: new rate %lu (actual rate %lu)\n", ++ clk->name, rate, actual_rate); ++ ++ if (apply) ++ pm_writel(GCCTRL(clk->index), control); ++ ++ return actual_rate; ++} ++ ++int genclk_set_parent(struct clk *clk, struct clk *parent) ++{ ++ u32 control; ++ ++ dev_dbg(clk->dev, "clk %s: new parent %s (was %s)\n", ++ clk->name, parent->name, clk->parent->name); ++ ++ control = pm_readl(GCCTRL(clk->index)); ++ ++ if (parent == &osc1 || parent == &pll1) ++ control |= PM_BIT(OSCSEL); ++ else if (parent == &osc0 || parent == &pll0) ++ control &= ~PM_BIT(OSCSEL); ++ else ++ return -EINVAL; ++ ++ if (parent == &pll0 || parent == &pll1) ++ control |= PM_BIT(PLLSEL); ++ else ++ control &= ~PM_BIT(PLLSEL); ++ ++ pm_writel(GCCTRL(clk->index), control); ++ clk->parent = parent; ++ ++ return 0; ++} ++ ++static void __init genclk_init_parent(struct clk *clk) ++{ ++ u32 control; ++ struct clk *parent; ++ ++ BUG_ON(clk->index > 7); ++ ++ control = pm_readl(GCCTRL(clk->index)); ++ if (control & PM_BIT(OSCSEL)) ++ parent = (control & PM_BIT(PLLSEL)) ? &pll1 : &osc1; ++ else ++ parent = (control & PM_BIT(PLLSEL)) ? &pll0 : &osc0; ++ ++ clk->parent = parent; ++} ++ ++/* -------------------------------------------------------------------- ++ * System peripherals ++ * -------------------------------------------------------------------- */ ++static struct resource at32_pm0_resource[] = { ++ { ++ .start = 0xfff00000, ++ .end = 0xfff0007f, ++ .flags = IORESOURCE_MEM, ++ }, ++ IRQ(20), ++}; ++ ++static struct resource at32ap700x_rtc0_resource[] = { ++ { ++ .start = 0xfff00080, ++ .end = 0xfff000af, ++ .flags = IORESOURCE_MEM, ++ }, ++ IRQ(21), ++}; ++ ++static struct resource at32_wdt0_resource[] = { ++ { ++ .start = 0xfff000b0, ++ .end = 0xfff000cf, ++ .flags = IORESOURCE_MEM, ++ }, ++}; ++ ++static struct resource at32_eic0_resource[] = { ++ { ++ .start = 0xfff00100, ++ .end = 0xfff0013f, ++ .flags = IORESOURCE_MEM, ++ }, ++ IRQ(19), ++}; ++ ++DEFINE_DEV(at32_pm, 0); ++DEFINE_DEV(at32ap700x_rtc, 0); ++DEFINE_DEV(at32_wdt, 0); ++DEFINE_DEV(at32_eic, 0); ++ ++/* ++ * Peripheral clock for PM, RTC, WDT and EIC. PM will ensure that this ++ * is always running. ++ */ ++static struct clk at32_pm_pclk = { ++ .name = "pclk", ++ .dev = &at32_pm0_device.dev, ++ .parent = &pbb_clk, ++ .mode = pbb_clk_mode, ++ .get_rate = pbb_clk_get_rate, ++ .users = 1, ++ .index = 0, ++}; ++ ++static struct resource intc0_resource[] = { ++ PBMEM(0xfff00400), ++}; ++struct platform_device at32_intc0_device = { ++ .name = "intc", ++ .id = 0, ++ .resource = intc0_resource, ++ .num_resources = ARRAY_SIZE(intc0_resource), ++}; ++DEV_CLK(pclk, at32_intc0, pbb, 1); ++ ++static struct clk ebi_clk = { ++ .name = "ebi", ++ .parent = &hsb_clk, ++ .mode = hsb_clk_mode, ++ .get_rate = hsb_clk_get_rate, ++ .users = 1, ++}; ++static struct clk hramc_clk = { ++ .name = "hramc", ++ .parent = &hsb_clk, ++ .mode = hsb_clk_mode, ++ .get_rate = hsb_clk_get_rate, ++ .users = 1, ++ .index = 3, ++}; ++ ++static struct resource smc0_resource[] = { ++ PBMEM(0xfff03400), ++}; ++DEFINE_DEV(smc, 0); ++DEV_CLK(pclk, smc0, pbb, 13); ++DEV_CLK(mck, smc0, hsb, 0); ++ ++static struct platform_device pdc_device = { ++ .name = "pdc", ++ .id = 0, ++}; ++DEV_CLK(hclk, pdc, hsb, 4); ++DEV_CLK(pclk, pdc, pba, 16); ++ ++static struct clk pico_clk = { ++ .name = "pico", ++ .parent = &cpu_clk, ++ .mode = cpu_clk_mode, ++ .get_rate = cpu_clk_get_rate, ++ .users = 1, ++}; + - endmenu - - endif # PLATFORM_AT32AP -diff --git a/arch/avr32/mach-at32ap/Makefile b/arch/avr32/mach-at32ap/Makefile -index a8b4450..250372a 100644 ---- a/arch/avr32/mach-at32ap/Makefile -+++ b/arch/avr32/mach-at32ap/Makefile -@@ -2,3 +2,4 @@ obj-y += at32ap.o clock.o intc.o extint.o pio.o hsmc.o - obj-$(CONFIG_CPU_AT32AP7000) += at32ap7000.o - obj-$(CONFIG_CPU_AT32AP7000) += time-tc.o - obj-$(CONFIG_CPU_FREQ_AT32AP) += cpufreq.o -+obj-$(CONFIG_GPIO_DEV) += gpio-dev.o -diff --git a/arch/avr32/mach-at32ap/at32ap7000.c b/arch/avr32/mach-at32ap/at32ap7000.c -index 64cc558..8375f89 100644 ---- a/arch/avr32/mach-at32ap/at32ap7000.c -+++ b/arch/avr32/mach-at32ap/at32ap7000.c -@@ -25,12 +25,6 @@ - #include "pio.h" - #include "pm.h" - --/* -- * We can reduce the code size a bit by using a constant here. Since -- * this file is completely chip-specific, it's safe to not use -- * ioremap. Generic drivers should of course never do this. -- */ --#define AT32_PM_BASE 0xfff00000 - - #define PBMEM(base) \ - { \ -@@ -562,6 +556,17 @@ static struct clk pico_clk = { - .users = 1, - }; - +static struct resource dmaca0_resource[] = { + { + .start = 0xff200000, @@ -2649,91 +8873,765 @@ index 64cc558..8375f89 100644 +DEFINE_DEV(dmaca, 0); +DEV_CLK(hclk, dmaca0, hsb, 10); + - /* -------------------------------------------------------------------- - * HMATRIX - * -------------------------------------------------------------------- */ -@@ -661,6 +666,7 @@ void __init at32_add_system_devices(void) - platform_device_register(&at32_eic0_device); - platform_device_register(&smc0_device); - platform_device_register(&pdc_device); ++/* -------------------------------------------------------------------- ++ * HMATRIX ++ * -------------------------------------------------------------------- */ ++ ++static struct clk hmatrix_clk = { ++ .name = "hmatrix_clk", ++ .parent = &pbb_clk, ++ .mode = pbb_clk_mode, ++ .get_rate = pbb_clk_get_rate, ++ .index = 2, ++ .users = 1, ++}; ++#define HMATRIX_BASE ((void __iomem *)0xfff00800) ++ ++#define hmatrix_readl(reg) \ ++ __raw_readl((HMATRIX_BASE) + HMATRIX_##reg) ++#define hmatrix_writel(reg,value) \ ++ __raw_writel((value), (HMATRIX_BASE) + HMATRIX_##reg) ++ ++/* ++ * Set bits in the HMATRIX Special Function Register (SFR) used by the ++ * External Bus Interface (EBI). This can be used to enable special ++ * features like CompactFlash support, NAND Flash support, etc. on ++ * certain chipselects. ++ */ ++static inline void set_ebi_sfr_bits(u32 mask) ++{ ++ u32 sfr; ++ ++ clk_enable(&hmatrix_clk); ++ sfr = hmatrix_readl(SFR4); ++ sfr |= mask; ++ hmatrix_writel(SFR4, sfr); ++ clk_disable(&hmatrix_clk); ++} ++ ++/* -------------------------------------------------------------------- ++ * System Timer/Counter (TC) ++ * -------------------------------------------------------------------- */ ++static struct resource at32_systc0_resource[] = { ++ PBMEM(0xfff00c00), ++ IRQ(22), ++}; ++struct platform_device at32_systc0_device = { ++ .name = "systc", ++ .id = 0, ++ .resource = at32_systc0_resource, ++ .num_resources = ARRAY_SIZE(at32_systc0_resource), ++}; ++DEV_CLK(pclk, at32_systc0, pbb, 3); ++ ++/* -------------------------------------------------------------------- ++ * PIO ++ * -------------------------------------------------------------------- */ ++ ++static struct resource pio0_resource[] = { ++ PBMEM(0xffe02800), ++ IRQ(13), ++}; ++DEFINE_DEV(pio, 0); ++DEV_CLK(mck, pio0, pba, 10); ++ ++static struct resource pio1_resource[] = { ++ PBMEM(0xffe02c00), ++ IRQ(14), ++}; ++DEFINE_DEV(pio, 1); ++DEV_CLK(mck, pio1, pba, 11); ++ ++static struct resource pio2_resource[] = { ++ PBMEM(0xffe03000), ++ IRQ(15), ++}; ++DEFINE_DEV(pio, 2); ++DEV_CLK(mck, pio2, pba, 12); ++ ++static struct resource pio3_resource[] = { ++ PBMEM(0xffe03400), ++ IRQ(16), ++}; ++DEFINE_DEV(pio, 3); ++DEV_CLK(mck, pio3, pba, 13); ++ ++static struct resource pio4_resource[] = { ++ PBMEM(0xffe03800), ++ IRQ(17), ++}; ++DEFINE_DEV(pio, 4); ++DEV_CLK(mck, pio4, pba, 14); ++ ++void __init at32_add_system_devices(void) ++{ ++ platform_device_register(&at32_pm0_device); ++ platform_device_register(&at32_intc0_device); ++ platform_device_register(&at32ap700x_rtc0_device); ++ platform_device_register(&at32_wdt0_device); ++ platform_device_register(&at32_eic0_device); ++ platform_device_register(&smc0_device); ++ platform_device_register(&pdc_device); + platform_device_register(&dmaca0_device); - - platform_device_register(&at32_systc0_device); - -@@ -966,6 +972,83 @@ at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n) - } - - /* -------------------------------------------------------------------- -+ * TWI ++ ++ platform_device_register(&at32_systc0_device); ++ ++ platform_device_register(&pio0_device); ++ platform_device_register(&pio1_device); ++ platform_device_register(&pio2_device); ++ platform_device_register(&pio3_device); ++ platform_device_register(&pio4_device); ++} ++ ++/* -------------------------------------------------------------------- ++ * USART + * -------------------------------------------------------------------- */ + -+static struct resource atmel_twi0_resource[] = { -+ PBMEM(0xffe00800), -+ IRQ(5), ++static struct atmel_uart_data atmel_usart0_data = { ++ .use_dma_tx = 1, ++ .use_dma_rx = 1, ++}; ++static struct resource atmel_usart0_resource[] = { ++ PBMEM(0xffe00c00), ++ IRQ(6), ++}; ++DEFINE_DEV_DATA(atmel_usart, 0); ++DEV_CLK(usart, atmel_usart0, pba, 3); ++ ++static struct atmel_uart_data atmel_usart1_data = { ++ .use_dma_tx = 1, ++ .use_dma_rx = 1, ++}; ++static struct resource atmel_usart1_resource[] = { ++ PBMEM(0xffe01000), ++ IRQ(7), ++}; ++DEFINE_DEV_DATA(atmel_usart, 1); ++DEV_CLK(usart, atmel_usart1, pba, 4); ++ ++static struct atmel_uart_data atmel_usart2_data = { ++ .use_dma_tx = 1, ++ .use_dma_rx = 1, ++}; ++static struct resource atmel_usart2_resource[] = { ++ PBMEM(0xffe01400), ++ IRQ(8), ++}; ++DEFINE_DEV_DATA(atmel_usart, 2); ++DEV_CLK(usart, atmel_usart2, pba, 5); ++ ++static struct atmel_uart_data atmel_usart3_data = { ++ .use_dma_tx = 1, ++ .use_dma_rx = 1, ++}; ++static struct resource atmel_usart3_resource[] = { ++ PBMEM(0xffe01800), ++ IRQ(9), ++}; ++DEFINE_DEV_DATA(atmel_usart, 3); ++DEV_CLK(usart, atmel_usart3, pba, 6); ++ ++static inline void configure_usart0_pins(void) ++{ ++ select_peripheral(PA(8), PERIPH_B, 0); /* RXD */ ++ select_peripheral(PA(9), PERIPH_B, 0); /* TXD */ ++} ++ ++static inline void configure_usart1_pins(void) ++{ ++ select_peripheral(PA(17), PERIPH_A, 0); /* RXD */ ++ select_peripheral(PA(18), PERIPH_A, 0); /* TXD */ ++} ++ ++static inline void configure_usart2_pins(void) ++{ ++ select_peripheral(PB(26), PERIPH_B, 0); /* RXD */ ++ select_peripheral(PB(27), PERIPH_B, 0); /* TXD */ ++} ++ ++static inline void configure_usart3_pins(void) ++{ ++ select_peripheral(PB(18), PERIPH_B, 0); /* RXD */ ++ select_peripheral(PB(17), PERIPH_B, 0); /* TXD */ ++} ++ ++static struct platform_device *__initdata at32_usarts[4]; ++ ++void __init at32_map_usart(unsigned int hw_id, unsigned int line) ++{ ++ struct platform_device *pdev; ++ ++ switch (hw_id) { ++ case 0: ++ pdev = &atmel_usart0_device; ++ configure_usart0_pins(); ++ break; ++ case 1: ++ pdev = &atmel_usart1_device; ++ configure_usart1_pins(); ++ break; ++ case 2: ++ pdev = &atmel_usart2_device; ++ configure_usart2_pins(); ++ break; ++ case 3: ++ pdev = &atmel_usart3_device; ++ configure_usart3_pins(); ++ break; ++ default: ++ return; ++ } ++ ++ if (PXSEG(pdev->resource[0].start) == P4SEG) { ++ /* Addresses in the P4 segment are permanently mapped 1:1 */ ++ struct atmel_uart_data *data = pdev->dev.platform_data; ++ data->regs = (void __iomem *)pdev->resource[0].start; ++ } ++ ++ pdev->id = line; ++ at32_usarts[line] = pdev; ++} ++ ++struct platform_device *__init at32_add_device_usart(unsigned int id) ++{ ++ platform_device_register(at32_usarts[id]); ++ return at32_usarts[id]; ++} ++ ++struct platform_device *atmel_default_console_device; ++ ++void __init at32_setup_serial_console(unsigned int usart_id) ++{ ++ atmel_default_console_device = at32_usarts[usart_id]; ++} ++ ++/* -------------------------------------------------------------------- ++ * Ethernet ++ * -------------------------------------------------------------------- */ ++ ++#ifdef CONFIG_CPU_AT32AP7000 ++static struct eth_platform_data macb0_data; ++static struct resource macb0_resource[] = { ++ PBMEM(0xfff01800), ++ IRQ(25), ++}; ++DEFINE_DEV_DATA(macb, 0); ++DEV_CLK(hclk, macb0, hsb, 8); ++DEV_CLK(pclk, macb0, pbb, 6); ++ ++static struct eth_platform_data macb1_data; ++static struct resource macb1_resource[] = { ++ PBMEM(0xfff01c00), ++ IRQ(26), +}; -+DEFINE_DEV(atmel_twi, 0); -+DEV_CLK(pclk,atmel_twi0,pba,2); ++DEFINE_DEV_DATA(macb, 1); ++DEV_CLK(hclk, macb1, hsb, 9); ++DEV_CLK(pclk, macb1, pbb, 7); + +struct platform_device *__init -+at32_add_device_twi(unsigned int id) ++at32_add_device_eth(unsigned int id, struct eth_platform_data *data) +{ + struct platform_device *pdev; + + switch (id) { + case 0: -+ pdev = &atmel_twi0_device; -+ select_peripheral(PA(6), PERIPH_A, 0); /* SDA */ -+ select_peripheral(PA(7), PERIPH_A, 0); /* SCL */ ++ pdev = &macb0_device; ++ ++ select_peripheral(PC(3), PERIPH_A, 0); /* TXD0 */ ++ select_peripheral(PC(4), PERIPH_A, 0); /* TXD1 */ ++ select_peripheral(PC(7), PERIPH_A, 0); /* TXEN */ ++ select_peripheral(PC(8), PERIPH_A, 0); /* TXCK */ ++ select_peripheral(PC(9), PERIPH_A, 0); /* RXD0 */ ++ select_peripheral(PC(10), PERIPH_A, 0); /* RXD1 */ ++ select_peripheral(PC(13), PERIPH_A, 0); /* RXER */ ++ select_peripheral(PC(15), PERIPH_A, 0); /* RXDV */ ++ select_peripheral(PC(16), PERIPH_A, 0); /* MDC */ ++ select_peripheral(PC(17), PERIPH_A, 0); /* MDIO */ ++ ++ if (!data->is_rmii) { ++ select_peripheral(PC(0), PERIPH_A, 0); /* COL */ ++ select_peripheral(PC(1), PERIPH_A, 0); /* CRS */ ++ select_peripheral(PC(2), PERIPH_A, 0); /* TXER */ ++ select_peripheral(PC(5), PERIPH_A, 0); /* TXD2 */ ++ select_peripheral(PC(6), PERIPH_A, 0); /* TXD3 */ ++ select_peripheral(PC(11), PERIPH_A, 0); /* RXD2 */ ++ select_peripheral(PC(12), PERIPH_A, 0); /* RXD3 */ ++ select_peripheral(PC(14), PERIPH_A, 0); /* RXCK */ ++ select_peripheral(PC(18), PERIPH_A, 0); /* SPD */ ++ } ++ break; ++ ++ case 1: ++ pdev = &macb1_device; ++ ++ select_peripheral(PD(13), PERIPH_B, 0); /* TXD0 */ ++ select_peripheral(PD(14), PERIPH_B, 0); /* TXD1 */ ++ select_peripheral(PD(11), PERIPH_B, 0); /* TXEN */ ++ select_peripheral(PD(12), PERIPH_B, 0); /* TXCK */ ++ select_peripheral(PD(10), PERIPH_B, 0); /* RXD0 */ ++ select_peripheral(PD(6), PERIPH_B, 0); /* RXD1 */ ++ select_peripheral(PD(5), PERIPH_B, 0); /* RXER */ ++ select_peripheral(PD(4), PERIPH_B, 0); /* RXDV */ ++ select_peripheral(PD(3), PERIPH_B, 0); /* MDC */ ++ select_peripheral(PD(2), PERIPH_B, 0); /* MDIO */ ++ ++ if (!data->is_rmii) { ++ select_peripheral(PC(19), PERIPH_B, 0); /* COL */ ++ select_peripheral(PC(23), PERIPH_B, 0); /* CRS */ ++ select_peripheral(PC(26), PERIPH_B, 0); /* TXER */ ++ select_peripheral(PC(27), PERIPH_B, 0); /* TXD2 */ ++ select_peripheral(PC(28), PERIPH_B, 0); /* TXD3 */ ++ select_peripheral(PC(29), PERIPH_B, 0); /* RXD2 */ ++ select_peripheral(PC(30), PERIPH_B, 0); /* RXD3 */ ++ select_peripheral(PC(24), PERIPH_B, 0); /* RXCK */ ++ select_peripheral(PD(15), PERIPH_B, 0); /* SPD */ ++ } + break; + + default: + return NULL; + } + ++ memcpy(pdev->dev.platform_data, data, sizeof(struct eth_platform_data)); + platform_device_register(pdev); ++ + return pdev; +} ++#endif + +/* -------------------------------------------------------------------- -+ * MMC ++ * SPI + * -------------------------------------------------------------------- */ -+static struct mci_platform_data atmel_mci0_data = { -+ .detect_pin = GPIO_PIN_NONE, -+ .wp_pin = GPIO_PIN_NONE, ++static struct resource atmel_spi0_resource[] = { ++ PBMEM(0xffe00000), ++ IRQ(3), +}; -+static struct resource atmel_mci0_resource[] = { -+ PBMEM(0xfff02400), -+ IRQ(28), ++DEFINE_DEV(atmel_spi, 0); ++DEV_CLK(spi_clk, atmel_spi0, pba, 0); ++ ++static struct resource atmel_spi1_resource[] = { ++ PBMEM(0xffe00400), ++ IRQ(4), +}; -+DEFINE_DEV_DATA(atmel_mci, 0); -+DEV_CLK(mci_clk, atmel_mci0, pbb, 9); ++DEFINE_DEV(atmel_spi, 1); ++DEV_CLK(spi_clk, atmel_spi1, pba, 1); ++ ++static void __init ++at32_spi_setup_slaves(unsigned int bus_num, struct spi_board_info *b, ++ unsigned int n, const u8 *pins) ++{ ++ unsigned int pin, mode; ++ ++ for (; n; n--, b++) { ++ b->bus_num = bus_num; ++ if (b->chip_select >= 4) ++ continue; ++ pin = (unsigned)b->controller_data; ++ if (!pin) { ++ pin = pins[b->chip_select]; ++ b->controller_data = (void *)pin; ++ } ++ mode = AT32_GPIOF_OUTPUT; ++ if (!(b->mode & SPI_CS_HIGH)) ++ mode |= AT32_GPIOF_HIGH; ++ at32_select_gpio(pin, mode); ++ } ++} + +struct platform_device *__init -+at32_add_device_mci(unsigned int id, struct mci_platform_data *data) ++at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n) +{ ++ /* ++ * Manage the chipselects as GPIOs, normally using the same pins ++ * the SPI controller expects; but boards can use other pins. ++ */ ++ static u8 __initdata spi0_pins[] = ++ { GPIO_PIN_PA(3), GPIO_PIN_PA(4), ++ GPIO_PIN_PA(5), GPIO_PIN_PA(20), }; ++ static u8 __initdata spi1_pins[] = ++ { GPIO_PIN_PB(2), GPIO_PIN_PB(3), ++ GPIO_PIN_PB(4), GPIO_PIN_PA(27), }; + struct platform_device *pdev; + + switch (id) { + case 0: -+ pdev = &atmel_mci0_device; -+ select_peripheral(PA(10), PERIPH_A, 0); /* CLK */ -+ select_peripheral(PA(11), PERIPH_A, 0); /* CMD */ -+ select_peripheral(PA(12), PERIPH_A, 0); /* DATA0 */ -+ select_peripheral(PA(13), PERIPH_A, 0); /* DATA1 */ -+ select_peripheral(PA(14), PERIPH_A, 0); /* DATA2 */ -+ select_peripheral(PA(15), PERIPH_A, 0); /* DATA3 */ ++ pdev = &atmel_spi0_device; ++ select_peripheral(PA(0), PERIPH_A, 0); /* MISO */ ++ select_peripheral(PA(1), PERIPH_A, 0); /* MOSI */ ++ select_peripheral(PA(2), PERIPH_A, 0); /* SCK */ ++ at32_spi_setup_slaves(0, b, n, spi0_pins); ++ break; ++ ++ case 1: ++ pdev = &atmel_spi1_device; ++ select_peripheral(PB(0), PERIPH_B, 0); /* MISO */ ++ select_peripheral(PB(1), PERIPH_B, 0); /* MOSI */ ++ select_peripheral(PB(5), PERIPH_B, 0); /* SCK */ ++ at32_spi_setup_slaves(1, b, n, spi1_pins); + break; ++ + default: + return NULL; + } + ++ spi_register_board_info(b, n); ++ platform_device_register(pdev); ++ return pdev; ++} ++ ++/* -------------------------------------------------------------------- ++ * TWI ++ * -------------------------------------------------------------------- */ ++static struct resource atmel_twi0_resource[] __initdata = { ++ PBMEM(0xffe00800), ++ IRQ(5), ++}; ++static struct clk atmel_twi0_pclk = { ++ .name = "twi_pclk", ++ .parent = &pba_clk, ++ .mode = pba_clk_mode, ++ .get_rate = pba_clk_get_rate, ++ .index = 2, ++}; ++ ++struct platform_device *__init at32_add_device_twi(unsigned int id) ++{ ++ struct platform_device *pdev; ++ ++ if (id != 0) ++ return NULL; ++ ++ pdev = platform_device_alloc("atmel_twi", id); ++ if (!pdev) ++ return NULL; ++ ++ if (platform_device_add_resources(pdev, atmel_twi0_resource, ++ ARRAY_SIZE(atmel_twi0_resource))) ++ goto err_add_resources; ++ ++ select_peripheral(PA(6), PERIPH_A, 0); /* SDA */ ++ select_peripheral(PA(7), PERIPH_A, 0); /* SDL */ ++ ++ atmel_twi0_pclk.dev = &pdev->dev; ++ ++ platform_device_add(pdev); ++ return pdev; ++ ++err_add_resources: ++ platform_device_put(pdev); ++ return NULL; ++} ++ ++/* -------------------------------------------------------------------- ++ * MMC ++ * -------------------------------------------------------------------- */ ++static struct resource atmel_mci0_resource[] __initdata = { ++ PBMEM(0xfff02400), ++ IRQ(28), ++}; ++static struct clk atmel_mci0_pclk = { ++ .name = "mci_clk", ++ .parent = &pbb_clk, ++ .mode = pbb_clk_mode, ++ .get_rate = pbb_clk_get_rate, ++ .index = 9, ++}; ++ ++struct platform_device *__init ++at32_add_device_mci(unsigned int id, struct mci_platform_data *data) ++{ ++ struct platform_device *pdev; ++ ++ if (id != 0) ++ return NULL; ++ ++ pdev = platform_device_alloc("atmel_mci", id); ++ if (!pdev) ++ goto fail; ++ ++ if (platform_device_add_resources(pdev, atmel_mci0_resource, ++ ARRAY_SIZE(atmel_mci0_resource))) ++ goto fail; ++ ++ if (data && platform_device_add_data(pdev, data, ++ sizeof(struct mci_platform_data))) ++ goto fail; ++ ++ select_peripheral(PA(10), PERIPH_A, 0); /* CLK */ ++ select_peripheral(PA(11), PERIPH_A, 0); /* CMD */ ++ select_peripheral(PA(12), PERIPH_A, 0); /* DATA0 */ ++ select_peripheral(PA(13), PERIPH_A, 0); /* DATA1 */ ++ select_peripheral(PA(14), PERIPH_A, 0); /* DATA2 */ ++ select_peripheral(PA(15), PERIPH_A, 0); /* DATA3 */ ++ + if (data) { + if (data->detect_pin != GPIO_PIN_NONE) + at32_select_gpio(data->detect_pin, 0); + if (data->wp_pin != GPIO_PIN_NONE) + at32_select_gpio(data->wp_pin, 0); -+ memcpy(pdev->dev.platform_data, data, -+ sizeof(struct mci_platform_data)); ++ } ++ ++ atmel_mci0_pclk.dev = &pdev->dev; ++ ++ platform_device_add(pdev); ++ return pdev; ++ ++fail: ++ platform_device_put(pdev); ++ return NULL; ++} ++ ++/* -------------------------------------------------------------------- ++ * LCDC ++ * -------------------------------------------------------------------- */ ++#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002) ++static struct atmel_lcdfb_info atmel_lcdfb0_data; ++static struct resource atmel_lcdfb0_resource[] = { ++ { ++ .start = 0xff000000, ++ .end = 0xff000fff, ++ .flags = IORESOURCE_MEM, ++ }, ++ IRQ(1), ++ { ++ /* Placeholder for pre-allocated fb memory */ ++ .start = 0x00000000, ++ .end = 0x00000000, ++ .flags = 0, ++ }, ++}; ++DEFINE_DEV_DATA(atmel_lcdfb, 0); ++DEV_CLK(hck1, atmel_lcdfb0, hsb, 7); ++static struct clk atmel_lcdfb0_pixclk = { ++ .name = "lcdc_clk", ++ .dev = &atmel_lcdfb0_device.dev, ++ .mode = genclk_mode, ++ .get_rate = genclk_get_rate, ++ .set_rate = genclk_set_rate, ++ .set_parent = genclk_set_parent, ++ .index = 7, ++}; ++ ++struct platform_device *__init ++at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data, ++ unsigned long fbmem_start, unsigned long fbmem_len) ++{ ++ struct platform_device *pdev; ++ struct atmel_lcdfb_info *info; ++ struct fb_monspecs *monspecs; ++ struct fb_videomode *modedb; ++ unsigned int modedb_size; ++ ++ /* ++ * Do a deep copy of the fb data, monspecs and modedb. Make ++ * sure all allocations are done before setting up the ++ * portmux. ++ */ ++ monspecs = kmemdup(data->default_monspecs, ++ sizeof(struct fb_monspecs), GFP_KERNEL); ++ if (!monspecs) ++ return NULL; ++ ++ modedb_size = sizeof(struct fb_videomode) * monspecs->modedb_len; ++ modedb = kmemdup(monspecs->modedb, modedb_size, GFP_KERNEL); ++ if (!modedb) ++ goto err_dup_modedb; ++ monspecs->modedb = modedb; ++ ++ switch (id) { ++ case 0: ++ pdev = &atmel_lcdfb0_device; ++ select_peripheral(PC(19), PERIPH_A, 0); /* CC */ ++ select_peripheral(PC(20), PERIPH_A, 0); /* HSYNC */ ++ select_peripheral(PC(21), PERIPH_A, 0); /* PCLK */ ++ select_peripheral(PC(22), PERIPH_A, 0); /* VSYNC */ ++ select_peripheral(PC(23), PERIPH_A, 0); /* DVAL */ ++ select_peripheral(PC(24), PERIPH_A, 0); /* MODE */ ++ select_peripheral(PC(25), PERIPH_A, 0); /* PWR */ ++ select_peripheral(PC(26), PERIPH_A, 0); /* DATA0 */ ++ select_peripheral(PC(27), PERIPH_A, 0); /* DATA1 */ ++ select_peripheral(PC(28), PERIPH_A, 0); /* DATA2 */ ++ select_peripheral(PC(29), PERIPH_A, 0); /* DATA3 */ ++ select_peripheral(PC(30), PERIPH_A, 0); /* DATA4 */ ++ select_peripheral(PC(31), PERIPH_A, 0); /* DATA5 */ ++ select_peripheral(PD(0), PERIPH_A, 0); /* DATA6 */ ++ select_peripheral(PD(1), PERIPH_A, 0); /* DATA7 */ ++ select_peripheral(PD(2), PERIPH_A, 0); /* DATA8 */ ++ select_peripheral(PD(3), PERIPH_A, 0); /* DATA9 */ ++ select_peripheral(PD(4), PERIPH_A, 0); /* DATA10 */ ++ select_peripheral(PD(5), PERIPH_A, 0); /* DATA11 */ ++ select_peripheral(PD(6), PERIPH_A, 0); /* DATA12 */ ++ select_peripheral(PD(7), PERIPH_A, 0); /* DATA13 */ ++ select_peripheral(PD(8), PERIPH_A, 0); /* DATA14 */ ++ select_peripheral(PD(9), PERIPH_A, 0); /* DATA15 */ ++ select_peripheral(PD(10), PERIPH_A, 0); /* DATA16 */ ++ select_peripheral(PD(11), PERIPH_A, 0); /* DATA17 */ ++ select_peripheral(PD(12), PERIPH_A, 0); /* DATA18 */ ++ select_peripheral(PD(13), PERIPH_A, 0); /* DATA19 */ ++ select_peripheral(PD(14), PERIPH_A, 0); /* DATA20 */ ++ select_peripheral(PD(15), PERIPH_A, 0); /* DATA21 */ ++ select_peripheral(PD(16), PERIPH_A, 0); /* DATA22 */ ++ select_peripheral(PD(17), PERIPH_A, 0); /* DATA23 */ ++ ++ clk_set_parent(&atmel_lcdfb0_pixclk, &pll0); ++ clk_set_rate(&atmel_lcdfb0_pixclk, clk_get_rate(&pll0)); ++ break; ++ ++ default: ++ goto err_invalid_id; ++ } ++ ++ if (fbmem_len) { ++ pdev->resource[2].start = fbmem_start; ++ pdev->resource[2].end = fbmem_start + fbmem_len - 1; ++ pdev->resource[2].flags = IORESOURCE_MEM; ++ } ++ ++ info = pdev->dev.platform_data; ++ memcpy(info, data, sizeof(struct atmel_lcdfb_info)); ++ info->default_monspecs = monspecs; ++ ++ platform_device_register(pdev); ++ return pdev; ++ ++err_invalid_id: ++ kfree(modedb); ++err_dup_modedb: ++ kfree(monspecs); ++ return NULL; ++} ++#endif ++ ++/* -------------------------------------------------------------------- ++ * PWM ++ * -------------------------------------------------------------------- */ ++static struct resource atmel_pwm0_resource[] __initdata = { ++ PBMEM(0xfff01400), ++ IRQ(24), ++}; ++static struct clk atmel_pwm0_mck = { ++ .name = "mck", ++ .parent = &pbb_clk, ++ .mode = pbb_clk_mode, ++ .get_rate = pbb_clk_get_rate, ++ .index = 5, ++}; ++ ++struct platform_device *__init at32_add_device_pwm(u32 mask) ++{ ++ struct platform_device *pdev; ++ ++ if (!mask) ++ return NULL; ++ ++ pdev = platform_device_alloc("atmel_pwm", 0); ++ if (!pdev) ++ return NULL; ++ ++ if (platform_device_add_resources(pdev, atmel_pwm0_resource, ++ ARRAY_SIZE(atmel_pwm0_resource))) ++ goto out_free_pdev; ++ ++ if (platform_device_add_data(pdev, &mask, sizeof(mask))) ++ goto out_free_pdev; ++ ++ if (mask & (1 << 0)) ++ select_peripheral(PA(28), PERIPH_A, 0); ++ if (mask & (1 << 1)) ++ select_peripheral(PA(29), PERIPH_A, 0); ++ if (mask & (1 << 2)) ++ select_peripheral(PA(21), PERIPH_B, 0); ++ if (mask & (1 << 3)) ++ select_peripheral(PA(22), PERIPH_B, 0); ++ ++ atmel_pwm0_mck.dev = &pdev->dev; ++ ++ platform_device_add(pdev); ++ ++ return pdev; ++ ++out_free_pdev: ++ platform_device_put(pdev); ++ return NULL; ++} ++ ++/* -------------------------------------------------------------------- ++ * SSC ++ * -------------------------------------------------------------------- */ ++static struct resource ssc0_resource[] = { ++ PBMEM(0xffe01c00), ++ IRQ(10), ++}; ++DEFINE_DEV(ssc, 0); ++DEV_CLK(pclk, ssc0, pba, 7); ++ ++static struct resource ssc1_resource[] = { ++ PBMEM(0xffe02000), ++ IRQ(11), ++}; ++DEFINE_DEV(ssc, 1); ++DEV_CLK(pclk, ssc1, pba, 8); ++ ++static struct resource ssc2_resource[] = { ++ PBMEM(0xffe02400), ++ IRQ(12), ++}; ++DEFINE_DEV(ssc, 2); ++DEV_CLK(pclk, ssc2, pba, 9); ++ ++struct platform_device *__init ++at32_add_device_ssc(unsigned int id, unsigned int flags) ++{ ++ struct platform_device *pdev; ++ ++ switch (id) { ++ case 0: ++ pdev = &ssc0_device; ++ if (flags & ATMEL_SSC_RF) ++ select_peripheral(PA(21), PERIPH_A, 0); /* RF */ ++ if (flags & ATMEL_SSC_RK) ++ select_peripheral(PA(22), PERIPH_A, 0); /* RK */ ++ if (flags & ATMEL_SSC_TK) ++ select_peripheral(PA(23), PERIPH_A, 0); /* TK */ ++ if (flags & ATMEL_SSC_TF) ++ select_peripheral(PA(24), PERIPH_A, 0); /* TF */ ++ if (flags & ATMEL_SSC_TD) ++ select_peripheral(PA(25), PERIPH_A, 0); /* TD */ ++ if (flags & ATMEL_SSC_RD) ++ select_peripheral(PA(26), PERIPH_A, 0); /* RD */ ++ break; ++ case 1: ++ pdev = &ssc1_device; ++ if (flags & ATMEL_SSC_RF) ++ select_peripheral(PA(0), PERIPH_B, 0); /* RF */ ++ if (flags & ATMEL_SSC_RK) ++ select_peripheral(PA(1), PERIPH_B, 0); /* RK */ ++ if (flags & ATMEL_SSC_TK) ++ select_peripheral(PA(2), PERIPH_B, 0); /* TK */ ++ if (flags & ATMEL_SSC_TF) ++ select_peripheral(PA(3), PERIPH_B, 0); /* TF */ ++ if (flags & ATMEL_SSC_TD) ++ select_peripheral(PA(4), PERIPH_B, 0); /* TD */ ++ if (flags & ATMEL_SSC_RD) ++ select_peripheral(PA(5), PERIPH_B, 0); /* RD */ ++ break; ++ case 2: ++ pdev = &ssc2_device; ++ if (flags & ATMEL_SSC_TD) ++ select_peripheral(PB(13), PERIPH_A, 0); /* TD */ ++ if (flags & ATMEL_SSC_RD) ++ select_peripheral(PB(14), PERIPH_A, 0); /* RD */ ++ if (flags & ATMEL_SSC_TK) ++ select_peripheral(PB(15), PERIPH_A, 0); /* TK */ ++ if (flags & ATMEL_SSC_TF) ++ select_peripheral(PB(16), PERIPH_A, 0); /* TF */ ++ if (flags & ATMEL_SSC_RF) ++ select_peripheral(PB(17), PERIPH_A, 0); /* RF */ ++ if (flags & ATMEL_SSC_RK) ++ select_peripheral(PB(18), PERIPH_A, 0); /* RK */ ++ break; ++ default: ++ return NULL; + } + + platform_device_register(pdev); @@ -2741,13 +9639,6 @@ index 64cc558..8375f89 100644 +} + +/* -------------------------------------------------------------------- - * LCDC - * -------------------------------------------------------------------- */ - static struct atmel_lcdfb_info atmel_lcdfb0_data; -@@ -1168,6 +1251,143 @@ at32_add_device_ssc(unsigned int id, unsigned int flags) - } - - /* -------------------------------------------------------------------- + * USB Device Controller + * -------------------------------------------------------------------- */ +static struct resource usba0_resource[] __initdata = { @@ -2814,239 +9705,538 @@ index 64cc558..8375f89 100644 +} + +/* -------------------------------------------------------------------- -+ * AC97C ++ * IDE / CompactFlash + * -------------------------------------------------------------------- */ -+static struct resource atmel_ac97c0_resource[] = { ++#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7001) ++static struct resource at32_smc_cs4_resource[] __initdata = { ++ { ++ .start = 0x04000000, ++ .end = 0x07ffffff, ++ .flags = IORESOURCE_MEM, ++ }, ++ IRQ(~0UL), /* Magic IRQ will be overridden */ ++}; ++static struct resource at32_smc_cs5_resource[] __initdata = { ++ { ++ .start = 0x20000000, ++ .end = 0x23ffffff, ++ .flags = IORESOURCE_MEM, ++ }, ++ IRQ(~0UL), /* Magic IRQ will be overridden */ ++}; ++ ++static int __init at32_init_ide_or_cf(struct platform_device *pdev, ++ unsigned int cs, unsigned int extint) ++{ ++ static unsigned int extint_pin_map[4] __initdata = { ++ GPIO_PIN_PB(25), ++ GPIO_PIN_PB(26), ++ GPIO_PIN_PB(27), ++ GPIO_PIN_PB(28), ++ }; ++ static bool common_pins_initialized __initdata = false; ++ unsigned int extint_pin; ++ int ret; ++ ++ if (extint >= ARRAY_SIZE(extint_pin_map)) ++ return -EINVAL; ++ extint_pin = extint_pin_map[extint]; ++ ++ switch (cs) { ++ case 4: ++ ret = platform_device_add_resources(pdev, ++ at32_smc_cs4_resource, ++ ARRAY_SIZE(at32_smc_cs4_resource)); ++ if (ret) ++ return ret; ++ ++ select_peripheral(PE(21), PERIPH_A, 0); /* NCS4 -> OE_N */ ++ set_ebi_sfr_bits(HMATRIX_BIT(CS4A)); ++ break; ++ case 5: ++ ret = platform_device_add_resources(pdev, ++ at32_smc_cs5_resource, ++ ARRAY_SIZE(at32_smc_cs5_resource)); ++ if (ret) ++ return ret; ++ ++ select_peripheral(PE(22), PERIPH_A, 0); /* NCS5 -> OE_N */ ++ set_ebi_sfr_bits(HMATRIX_BIT(CS5A)); ++ break; ++ default: ++ return -EINVAL; ++ } ++ ++ if (!common_pins_initialized) { ++ select_peripheral(PE(19), PERIPH_A, 0); /* CFCE1 -> CS0_N */ ++ select_peripheral(PE(20), PERIPH_A, 0); /* CFCE2 -> CS1_N */ ++ select_peripheral(PE(23), PERIPH_A, 0); /* CFRNW -> DIR */ ++ select_peripheral(PE(24), PERIPH_A, 0); /* NWAIT <- IORDY */ ++ common_pins_initialized = true; ++ } ++ ++ at32_select_periph(extint_pin, GPIO_PERIPH_A, AT32_GPIOF_DEGLITCH); ++ ++ pdev->resource[1].start = EIM_IRQ_BASE + extint; ++ pdev->resource[1].end = pdev->resource[1].start; ++ ++ return 0; ++} ++ ++struct platform_device *__init ++at32_add_device_ide(unsigned int id, unsigned int extint, ++ struct ide_platform_data *data) ++{ ++ struct platform_device *pdev; ++ ++ pdev = platform_device_alloc("at32_ide", id); ++ if (!pdev) ++ goto fail; ++ ++ if (platform_device_add_data(pdev, data, ++ sizeof(struct ide_platform_data))) ++ goto fail; ++ ++ if (at32_init_ide_or_cf(pdev, data->cs, extint)) ++ goto fail; ++ ++ platform_device_add(pdev); ++ return pdev; ++ ++fail: ++ platform_device_put(pdev); ++ return NULL; ++} ++ ++struct platform_device *__init ++at32_add_device_cf(unsigned int id, unsigned int extint, ++ struct cf_platform_data *data) ++{ ++ struct platform_device *pdev; ++ ++ pdev = platform_device_alloc("at32_cf", id); ++ if (!pdev) ++ goto fail; ++ ++ if (platform_device_add_data(pdev, data, ++ sizeof(struct cf_platform_data))) ++ goto fail; ++ ++ if (at32_init_ide_or_cf(pdev, data->cs, extint)) ++ goto fail; ++ ++ if (data->detect_pin != GPIO_PIN_NONE) ++ at32_select_gpio(data->detect_pin, AT32_GPIOF_DEGLITCH); ++ if (data->reset_pin != GPIO_PIN_NONE) ++ at32_select_gpio(data->reset_pin, 0); ++ if (data->vcc_pin != GPIO_PIN_NONE) ++ at32_select_gpio(data->vcc_pin, 0); ++ /* READY is used as extint, so we can't select it as gpio */ ++ ++ platform_device_add(pdev); ++ return pdev; ++ ++fail: ++ platform_device_put(pdev); ++ return NULL; ++} ++#endif ++ ++/* -------------------------------------------------------------------- ++ * AC97C ++ * -------------------------------------------------------------------- */ ++static struct resource atmel_ac97c0_resource[] __initdata = { + PBMEM(0xfff02800), + IRQ(29), +}; -+DEFINE_DEV(atmel_ac97c, 0); -+DEV_CLK(pclk, atmel_ac97c0, pbb, 10); ++static struct clk atmel_ac97c0_pclk = { ++ .name = "pclk", ++ .parent = &pbb_clk, ++ .mode = pbb_clk_mode, ++ .get_rate = pbb_clk_get_rate, ++ .index = 10, ++}; + -+struct platform_device *__init -+at32_add_device_ac97c(unsigned int id) ++struct platform_device *__init at32_add_device_ac97c(unsigned int id) +{ + struct platform_device *pdev; + -+ switch (id) { -+ case 0: -+ pdev = &atmel_ac97c0_device; -+ select_peripheral(PB(20), PERIPH_B, 0); /* SYNC */ -+ select_peripheral(PB(21), PERIPH_B, 0); /* SDO */ -+ select_peripheral(PB(22), PERIPH_B, 0); /* SDI */ -+ select_peripheral(PB(23), PERIPH_B, 0); /* SCLK */ -+ break; -+ default: ++ if (id != 0) + return NULL; -+ } + -+ platform_device_register(pdev); ++ pdev = platform_device_alloc("atmel_ac97c", id); ++ if (!pdev) ++ return NULL; ++ ++ if (platform_device_add_resources(pdev, atmel_ac97c0_resource, ++ ARRAY_SIZE(atmel_ac97c0_resource))) ++ goto err_add_resources; ++ ++ select_peripheral(PB(20), PERIPH_B, 0); /* SYNC */ ++ select_peripheral(PB(21), PERIPH_B, 0); /* SDO */ ++ select_peripheral(PB(22), PERIPH_B, 0); /* SDI */ ++ select_peripheral(PB(23), PERIPH_B, 0); /* SCLK */ ++ ++ atmel_ac97c0_pclk.dev = &pdev->dev; ++ ++ platform_device_add(pdev); + return pdev; ++ ++err_add_resources: ++ platform_device_put(pdev); ++ return NULL; +} + +/* -------------------------------------------------------------------- -+ * DAC ++ * ABDAC + * -------------------------------------------------------------------- */ -+static struct resource abdac0_resource[] = { ++static struct resource abdac0_resource[] __initdata = { + PBMEM(0xfff02000), + IRQ(27), +}; -+DEFINE_DEV(abdac, 0); -+DEV_CLK(pclk, abdac0, pbb, 8); ++static struct clk abdac0_pclk = { ++ .name = "pclk", ++ .parent = &pbb_clk, ++ .mode = pbb_clk_mode, ++ .get_rate = pbb_clk_get_rate, ++ .index = 8, ++}; +static struct clk abdac0_sample_clk = { -+ .name = "sample_clk", -+ .dev = &abdac0_device.dev, -+ .mode = genclk_mode, -+ .get_rate = genclk_get_rate, -+ .set_rate = genclk_set_rate, -+ .set_parent = genclk_set_parent, -+ .index = 6, ++ .name = "sample_clk", ++ .mode = genclk_mode, ++ .get_rate = genclk_get_rate, ++ .set_rate = genclk_set_rate, ++ .set_parent = genclk_set_parent, ++ .index = 6, +}; + -+struct platform_device *__init -+at32_add_device_abdac(unsigned int id) ++struct platform_device *__init at32_add_device_abdac(unsigned int id) +{ + struct platform_device *pdev; + -+ switch (id) { -+ case 0: -+ pdev = &abdac0_device; -+ select_peripheral(PB(20), PERIPH_A, 0); /* DATA1 */ -+ select_peripheral(PB(21), PERIPH_A, 0); /* DATA0 */ -+ select_peripheral(PB(22), PERIPH_A, 0); /* DATAN1 */ -+ select_peripheral(PB(23), PERIPH_A, 0); /* DATAN0 */ -+ break; -+ default: ++ if (id != 0) + return NULL; -+ } + -+ platform_device_register(pdev); ++ pdev = platform_device_alloc("abdac", id); ++ if (!pdev) ++ return NULL; ++ ++ if (platform_device_add_resources(pdev, abdac0_resource, ++ ARRAY_SIZE(abdac0_resource))) ++ goto err_add_resources; ++ ++ select_peripheral(PB(20), PERIPH_A, 0); /* DATA1 */ ++ select_peripheral(PB(21), PERIPH_A, 0); /* DATA0 */ ++ select_peripheral(PB(22), PERIPH_A, 0); /* DATAN1 */ ++ select_peripheral(PB(23), PERIPH_A, 0); /* DATAN0 */ ++ ++ abdac0_pclk.dev = &pdev->dev; ++ abdac0_sample_clk.dev = &pdev->dev; ++ ++ platform_device_add(pdev); + return pdev; ++ ++err_add_resources: ++ platform_device_put(pdev); ++ return NULL; +} + +/* -------------------------------------------------------------------- - * GCLK - * -------------------------------------------------------------------- */ - static struct clk gclk0 = { -@@ -1230,6 +1450,7 @@ struct clk *at32_clock_list[] = { - &smc0_mck, - &pdc_hclk, - &pdc_pclk, ++ * GCLK ++ * -------------------------------------------------------------------- */ ++static struct clk gclk0 = { ++ .name = "gclk0", ++ .mode = genclk_mode, ++ .get_rate = genclk_get_rate, ++ .set_rate = genclk_set_rate, ++ .set_parent = genclk_set_parent, ++ .index = 0, ++}; ++static struct clk gclk1 = { ++ .name = "gclk1", ++ .mode = genclk_mode, ++ .get_rate = genclk_get_rate, ++ .set_rate = genclk_set_rate, ++ .set_parent = genclk_set_parent, ++ .index = 1, ++}; ++static struct clk gclk2 = { ++ .name = "gclk2", ++ .mode = genclk_mode, ++ .get_rate = genclk_get_rate, ++ .set_rate = genclk_set_rate, ++ .set_parent = genclk_set_parent, ++ .index = 2, ++}; ++static struct clk gclk3 = { ++ .name = "gclk3", ++ .mode = genclk_mode, ++ .get_rate = genclk_get_rate, ++ .set_rate = genclk_set_rate, ++ .set_parent = genclk_set_parent, ++ .index = 3, ++}; ++static struct clk gclk4 = { ++ .name = "gclk4", ++ .mode = genclk_mode, ++ .get_rate = genclk_get_rate, ++ .set_rate = genclk_set_rate, ++ .set_parent = genclk_set_parent, ++ .index = 4, ++}; ++ ++struct clk *at32_clock_list[] = { ++ &osc32k, ++ &osc0, ++ &osc1, ++ &pll0, ++ &pll1, ++ &cpu_clk, ++ &hsb_clk, ++ &pba_clk, ++ &pbb_clk, ++ &at32_pm_pclk, ++ &at32_intc0_pclk, ++ &hmatrix_clk, ++ &ebi_clk, ++ &hramc_clk, ++ &smc0_pclk, ++ &smc0_mck, ++ &pdc_hclk, ++ &pdc_pclk, + &dmaca0_hclk, - &pico_clk, - &pio0_mck, - &pio1_mck, -@@ -1247,11 +1468,18 @@ struct clk *at32_clock_list[] = { - &macb1_pclk, - &atmel_spi0_spi_clk, - &atmel_spi1_spi_clk, ++ &pico_clk, ++ &pio0_mck, ++ &pio1_mck, ++ &pio2_mck, ++ &pio3_mck, ++ &pio4_mck, ++ &at32_systc0_pclk, ++ &atmel_usart0_usart, ++ &atmel_usart1_usart, ++ &atmel_usart2_usart, ++ &atmel_usart3_usart, ++ &atmel_pwm0_mck, ++#if defined(CONFIG_CPU_AT32AP7000) ++ &macb0_hclk, ++ &macb0_pclk, ++ &macb1_hclk, ++ &macb1_pclk, ++#endif ++ &atmel_spi0_spi_clk, ++ &atmel_spi1_spi_clk, + &atmel_twi0_pclk, -+ &atmel_mci0_mci_clk, - &atmel_lcdfb0_hck1, - &atmel_lcdfb0_pixclk, - &ssc0_pclk, - &ssc1_pclk, - &ssc2_pclk, ++ &atmel_mci0_pclk, ++#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002) ++ &atmel_lcdfb0_hck1, ++ &atmel_lcdfb0_pixclk, ++#endif ++ &ssc0_pclk, ++ &ssc1_pclk, ++ &ssc2_pclk, + &usba0_hclk, + &usba0_pclk, + &atmel_ac97c0_pclk, + &abdac0_pclk, + &abdac0_sample_clk, - &gclk0, - &gclk1, - &gclk2, -@@ -1293,6 +1521,7 @@ void __init at32_clock_init(void) - genclk_init_parent(&gclk3); - genclk_init_parent(&gclk4); - genclk_init_parent(&atmel_lcdfb0_pixclk); -+ genclk_init_parent(&abdac0_sample_clk); - - /* - * Turn on all clocks that have at least one user already, and -diff --git a/arch/avr32/mach-at32ap/clock.c b/arch/avr32/mach-at32ap/clock.c -index 0f8c89c..4642117 100644 ---- a/arch/avr32/mach-at32ap/clock.c -+++ b/arch/avr32/mach-at32ap/clock.c -@@ -150,3 +150,119 @@ struct clk *clk_get_parent(struct clk *clk) - return clk->parent; - } - EXPORT_SYMBOL(clk_get_parent); ++ &gclk0, ++ &gclk1, ++ &gclk2, ++ &gclk3, ++ &gclk4, ++}; ++unsigned int at32_nr_clocks = ARRAY_SIZE(at32_clock_list); + ++void __init at32_portmux_init(void) ++{ ++ at32_init_pio(&pio0_device); ++ at32_init_pio(&pio1_device); ++ at32_init_pio(&pio2_device); ++ at32_init_pio(&pio3_device); ++ at32_init_pio(&pio4_device); ++} + ++void __init at32_clock_init(void) ++{ ++ u32 cpu_mask = 0, hsb_mask = 0, pba_mask = 0, pbb_mask = 0; ++ int i; + -+#ifdef CONFIG_DEBUG_FS ++ if (pm_readl(MCCTRL) & PM_BIT(PLLSEL)) { ++ main_clock = &pll0; ++ cpu_clk.parent = &pll0; ++ } else { ++ main_clock = &osc0; ++ cpu_clk.parent = &osc0; ++ } + -+/* /sys/kernel/debug/at32ap_clk */ ++ if (pm_readl(PLL0) & PM_BIT(PLLOSC)) ++ pll0.parent = &osc1; ++ if (pm_readl(PLL1) & PM_BIT(PLLOSC)) ++ pll1.parent = &osc1; ++ ++ genclk_init_parent(&gclk0); ++ genclk_init_parent(&gclk1); ++ genclk_init_parent(&gclk2); ++ genclk_init_parent(&gclk3); ++ genclk_init_parent(&gclk4); ++#if defined(CONFIG_CPU_AT32AP7000) || defined(CONFIG_CPU_AT32AP7002) ++ genclk_init_parent(&atmel_lcdfb0_pixclk); ++#endif ++ genclk_init_parent(&abdac0_sample_clk); + -+#include <linux/io.h> -+#include <linux/debugfs.h> -+#include <linux/seq_file.h> -+#include "pm.h" ++ /* ++ * Turn on all clocks that have at least one user already, and ++ * turn off everything else. We only do this for module ++ * clocks, and even though it isn't particularly pretty to ++ * check the address of the mode function, it should do the ++ * trick... ++ */ ++ for (i = 0; i < ARRAY_SIZE(at32_clock_list); i++) { ++ struct clk *clk = at32_clock_list[i]; + ++ if (clk->users == 0) ++ continue; + -+#define NEST_DELTA 2 -+#define NEST_MAX 6 ++ if (clk->mode == &cpu_clk_mode) ++ cpu_mask |= 1 << clk->index; ++ else if (clk->mode == &hsb_clk_mode) ++ hsb_mask |= 1 << clk->index; ++ else if (clk->mode == &pba_clk_mode) ++ pba_mask |= 1 << clk->index; ++ else if (clk->mode == &pbb_clk_mode) ++ pbb_mask |= 1 << clk->index; ++ } + -+struct clkinf { -+ struct seq_file *s; -+ unsigned nest; -+}; ++ pm_writel(CPU_MASK, cpu_mask); ++ pm_writel(HSB_MASK, hsb_mask); ++ pm_writel(PBA_MASK, pba_mask); ++ pm_writel(PBB_MASK, pbb_mask); ++} +diff --git a/arch/avr32/mach-at32ap/extint.c b/arch/avr32/mach-at32ap/extint.c +index f5bfd4c..c36a6d5 100644 +--- a/arch/avr32/mach-at32ap/extint.c ++++ b/arch/avr32/mach-at32ap/extint.c +@@ -26,16 +26,10 @@ + #define EIC_MODE 0x0014 + #define EIC_EDGE 0x0018 + #define EIC_LEVEL 0x001c +-#define EIC_TEST 0x0020 + #define EIC_NMIC 0x0024 + +-/* Bitfields in TEST */ +-#define EIC_TESTEN_OFFSET 31 +-#define EIC_TESTEN_SIZE 1 +- + /* Bitfields in NMIC */ +-#define EIC_EN_OFFSET 0 +-#define EIC_EN_SIZE 1 ++#define EIC_NMIC_ENABLE (1 << 0) + + /* Bit manipulation macros */ + #define EIC_BIT(name) \ +@@ -63,6 +57,9 @@ struct eic { + unsigned int first_irq; + }; + ++static struct eic *nmi_eic; ++static bool nmi_enabled; + -+static void -+dump_clock(struct clk *parent, struct clkinf *r) + static void eic_ack_irq(unsigned int irq) + { + struct eic *eic = get_irq_chip_data(irq); +@@ -133,8 +130,11 @@ static int eic_set_irq_type(unsigned int irq, unsigned int flow_type) + eic_writel(eic, EDGE, edge); + eic_writel(eic, LEVEL, level); + +- if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) ++ if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) { + flow_type |= IRQ_LEVEL; ++ __set_irq_handler_unlocked(irq, handle_level_irq); ++ } else ++ __set_irq_handler_unlocked(irq, handle_edge_irq); + desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL); + desc->status |= flow_type; + } +@@ -154,9 +154,8 @@ static struct irq_chip eic_chip = { + static void demux_eic_irq(unsigned int irq, struct irq_desc *desc) + { + struct eic *eic = desc->handler_data; +- struct irq_desc *ext_desc; + unsigned long status, pending; +- unsigned int i, ext_irq; ++ unsigned int i; + + status = eic_readl(eic, ISR); + pending = status & eic_readl(eic, IMR); +@@ -165,15 +164,28 @@ static void demux_eic_irq(unsigned int irq, struct irq_desc *desc) + i = fls(pending) - 1; + pending &= ~(1 << i); + +- ext_irq = i + eic->first_irq; +- ext_desc = irq_desc + ext_irq; +- if (ext_desc->status & IRQ_LEVEL) +- handle_level_irq(ext_irq, ext_desc); +- else +- handle_edge_irq(ext_irq, ext_desc); ++ generic_handle_irq(i + eic->first_irq); + } + } + ++int nmi_enable(void) +{ -+ unsigned nest = r->nest; -+ char buf[16 + NEST_MAX]; -+ struct clk *clk; -+ unsigned i; -+ -+ /* skip clocks coupled to devices that aren't registered */ -+ if (parent->dev && !parent->dev->bus_id[0] && !parent->users) -+ return; -+ -+ /* <nest spaces> name <pad to end> */ -+ memset(buf, ' ', sizeof(buf) - 1); -+ buf[sizeof(buf) - 1] = 0; -+ i = strlen(parent->name); -+ memcpy(buf + nest, parent->name, -+ min(i, (unsigned)(sizeof(buf) - 1 - nest))); -+ -+ seq_printf(r->s, "%s%c users=%2d %-3s %9ld Hz", -+ buf, parent->set_parent ? '*' : ' ', -+ parent->users, -+ parent->users ? "on" : "off", /* NOTE: not-paranoid!! */ -+ clk_get_rate(parent)); -+ if (parent->dev) -+ seq_printf(r->s, ", for %s", parent->dev->bus_id); -+ seq_printf(r->s, "\n"); -+ -+ /* cost of this scan is small, but not linear... */ -+ r->nest = nest + NEST_DELTA; -+ for (i = 3; i < at32_nr_clocks; i++) { -+ clk = at32_clock_list[i]; -+ if (clk->parent == parent) -+ dump_clock(clk, r); -+ } -+ r->nest = nest; -+} -+ -+static int clk_show(struct seq_file *s, void *unused) -+{ -+ struct clkinf r; -+ int i; -+ -+ /* show all the power manager registers */ -+ seq_printf(s, "MCCTRL = %8x\n", pm_readl(MCCTRL)); -+ seq_printf(s, "CKSEL = %8x\n", pm_readl(CKSEL)); -+ seq_printf(s, "CPUMASK = %8x\n", pm_readl(CPU_MASK)); -+ seq_printf(s, "HSBMASK = %8x\n", pm_readl(HSB_MASK)); -+ seq_printf(s, "PBAMASK = %8x\n", pm_readl(PBA_MASK)); -+ seq_printf(s, "PBBMASK = %8x\n", pm_readl(PBB_MASK)); -+ seq_printf(s, "PLL0 = %8x\n", pm_readl(PLL0)); -+ seq_printf(s, "PLL1 = %8x\n", pm_readl(PLL1)); -+ seq_printf(s, "IMR = %8x\n", pm_readl(IMR)); -+ for (i = 0; i < 8; i++) { -+ if (i == 5) -+ continue; -+ seq_printf(s, "GCCTRL%d = %8x\n", i, pm_readl(GCCTRL(i))); -+ } ++ nmi_enabled = true; + -+ seq_printf(s, "\n"); -+ -+ /* show clock tree as derived from the three oscillators -+ * we "know" are at the head of the list -+ */ -+ r.s = s; -+ r.nest = 0; -+ dump_clock(at32_clock_list[0], &r); -+ dump_clock(at32_clock_list[1], &r); -+ dump_clock(at32_clock_list[2], &r); ++ if (nmi_eic) ++ eic_writel(nmi_eic, NMIC, EIC_NMIC_ENABLE); + + return 0; +} + -+static int clk_open(struct inode *inode, struct file *file) ++void nmi_disable(void) +{ -+ return single_open(file, clk_show, NULL); -+} ++ if (nmi_eic) ++ eic_writel(nmi_eic, NMIC, 0); + -+static const struct file_operations clk_operations = { -+ .open = clk_open, -+ .read = seq_read, -+ .llseek = seq_lseek, -+ .release = single_release, -+}; -+ -+static int __init clk_debugfs_init(void) -+{ -+ (void) debugfs_create_file("at32ap_clk", S_IFREG | S_IRUGO, -+ NULL, NULL, &clk_operations); -+ -+ return 0; ++ nmi_enabled = false; +} -+postcore_initcall(clk_debugfs_init); + -+#endif + static int __init eic_probe(struct platform_device *pdev) + { + struct eic *eic; +@@ -214,14 +226,13 @@ static int __init eic_probe(struct platform_device *pdev) + pattern = eic_readl(eic, MODE); + nr_irqs = fls(pattern); + +- /* Trigger on falling edge unless overridden by driver */ +- eic_writel(eic, MODE, 0UL); ++ /* Trigger on low level unless overridden by driver */ + eic_writel(eic, EDGE, 0UL); ++ eic_writel(eic, LEVEL, 0UL); + + eic->chip = &eic_chip; + + for (i = 0; i < nr_irqs; i++) { +- /* NOTE the handler we set here is ignored by the demux */ + set_irq_chip_and_handler(eic->first_irq + i, &eic_chip, + handle_level_irq); + set_irq_chip_data(eic->first_irq + i, eic); +@@ -230,6 +241,16 @@ static int __init eic_probe(struct platform_device *pdev) + set_irq_chained_handler(int_irq, demux_eic_irq); + set_irq_data(int_irq, eic); + ++ if (pdev->id == 0) { ++ nmi_eic = eic; ++ if (nmi_enabled) ++ /* ++ * Someone tried to enable NMI before we were ++ * ready. Do it now. ++ */ ++ nmi_enable(); ++ } ++ + dev_info(&pdev->dev, + "External Interrupt Controller at 0x%p, IRQ %u\n", + eic->regs, int_irq); diff --git a/arch/avr32/mach-at32ap/gpio-dev.c b/arch/avr32/mach-at32ap/gpio-dev.c new file mode 100644 index 0000000..8cf6d11 @@ -3626,172 +10816,11 @@ index 0000000..8cf6d11 + return err; +} +late_initcall(gpio_dev_init); -diff --git a/arch/avr32/mach-at32ap/hsmc.c b/arch/avr32/mach-at32ap/hsmc.c -index 5e22a75..704607f 100644 ---- a/arch/avr32/mach-at32ap/hsmc.c -+++ b/arch/avr32/mach-at32ap/hsmc.c -@@ -29,16 +29,25 @@ struct hsmc { - - static struct hsmc *hsmc; - --int smc_set_configuration(int cs, const struct smc_config *config) -+void smc_set_timing(struct smc_config *config, -+ const struct smc_timing *timing) - { -+ int recover; -+ int cycle; -+ - unsigned long mul; -- unsigned long offset; -- u32 setup, pulse, cycle, mode; - -- if (!hsmc) -- return -ENODEV; -- if (cs >= NR_CHIP_SELECTS) -- return -EINVAL; -+ /* Reset all SMC timings */ -+ config->ncs_read_setup = 0; -+ config->nrd_setup = 0; -+ config->ncs_write_setup = 0; -+ config->nwe_setup = 0; -+ config->ncs_read_pulse = 0; -+ config->nrd_pulse = 0; -+ config->ncs_write_pulse = 0; -+ config->nwe_pulse = 0; -+ config->read_cycle = 0; -+ config->write_cycle = 0; - - /* - * cycles = x / T = x * f -@@ -50,16 +59,102 @@ int smc_set_configuration(int cs, const struct smc_config *config) - - #define ns2cyc(x) ((((x) * mul) + 65535) >> 16) - -- setup = (HSMC_BF(NWE_SETUP, ns2cyc(config->nwe_setup)) -- | HSMC_BF(NCS_WR_SETUP, ns2cyc(config->ncs_write_setup)) -- | HSMC_BF(NRD_SETUP, ns2cyc(config->nrd_setup)) -- | HSMC_BF(NCS_RD_SETUP, ns2cyc(config->ncs_read_setup))); -- pulse = (HSMC_BF(NWE_PULSE, ns2cyc(config->nwe_pulse)) -- | HSMC_BF(NCS_WR_PULSE, ns2cyc(config->ncs_write_pulse)) -- | HSMC_BF(NRD_PULSE, ns2cyc(config->nrd_pulse)) -- | HSMC_BF(NCS_RD_PULSE, ns2cyc(config->ncs_read_pulse))); -- cycle = (HSMC_BF(NWE_CYCLE, ns2cyc(config->write_cycle)) -- | HSMC_BF(NRD_CYCLE, ns2cyc(config->read_cycle))); -+ if (timing->ncs_read_setup > 0) -+ config->ncs_read_setup = ns2cyc(timing->ncs_read_setup); -+ -+ if (timing->nrd_setup > 0) -+ config->nrd_setup = ns2cyc(timing->nrd_setup); -+ -+ if (timing->ncs_write_setup > 0) -+ config->ncs_write_setup = ns2cyc(timing->ncs_write_setup); -+ -+ if (timing->nwe_setup > 0) -+ config->nwe_setup = ns2cyc(timing->nwe_setup); -+ -+ if (timing->ncs_read_pulse > 0) -+ config->ncs_read_pulse = ns2cyc(timing->ncs_read_pulse); -+ -+ if (timing->nrd_pulse > 0) -+ config->nrd_pulse = ns2cyc(timing->nrd_pulse); -+ -+ if (timing->ncs_write_pulse > 0) -+ config->ncs_write_pulse = ns2cyc(timing->ncs_write_pulse); -+ -+ if (timing->nwe_pulse > 0) -+ config->nwe_pulse = ns2cyc(timing->nwe_pulse); -+ -+ if (timing->read_cycle > 0) -+ config->read_cycle = ns2cyc(timing->read_cycle); -+ -+ if (timing->write_cycle > 0) -+ config->write_cycle = ns2cyc(timing->write_cycle); -+ -+ /* Extend read cycle in needed */ -+ if (timing->ncs_read_recover > 0) -+ recover = ns2cyc(timing->ncs_read_recover); -+ else -+ recover = 1; -+ -+ cycle = config->ncs_read_setup + config->ncs_read_pulse + recover; -+ -+ if (config->read_cycle < cycle) -+ config->read_cycle = cycle; -+ -+ /* Extend read cycle in needed */ -+ if (timing->nrd_recover > 0) -+ recover = ns2cyc(timing->nrd_recover); -+ else -+ recover = 1; -+ -+ cycle = config->nrd_setup + config->nrd_pulse + recover; -+ -+ if (config->read_cycle < cycle) -+ config->read_cycle = cycle; -+ -+ /* Extend write cycle in needed */ -+ if (timing->ncs_write_recover > 0) -+ recover = ns2cyc(timing->ncs_write_recover); -+ else -+ recover = 1; -+ -+ cycle = config->ncs_write_setup + config->ncs_write_pulse + recover; -+ -+ if (config->write_cycle < cycle) -+ config->write_cycle = cycle; -+ -+ /* Extend write cycle in needed */ -+ if (timing->nwe_recover > 0) -+ recover = ns2cyc(timing->nwe_recover); -+ else -+ recover = 1; -+ -+ cycle = config->nwe_setup + config->nwe_pulse + recover; -+ -+ if (config->write_cycle < cycle) -+ config->write_cycle = cycle; -+} -+EXPORT_SYMBOL(smc_set_timing); -+ -+int smc_set_configuration(int cs, const struct smc_config *config) -+{ -+ unsigned long offset; -+ u32 setup, pulse, cycle, mode; -+ -+ if (!hsmc) -+ return -ENODEV; -+ if (cs >= NR_CHIP_SELECTS) -+ return -EINVAL; -+ -+ setup = (HSMC_BF(NWE_SETUP, config->nwe_setup) -+ | HSMC_BF(NCS_WR_SETUP, config->ncs_write_setup) -+ | HSMC_BF(NRD_SETUP, config->nrd_setup) -+ | HSMC_BF(NCS_RD_SETUP, config->ncs_read_setup)); -+ pulse = (HSMC_BF(NWE_PULSE, config->nwe_pulse) -+ | HSMC_BF(NCS_WR_PULSE, config->ncs_write_pulse) -+ | HSMC_BF(NRD_PULSE, config->nrd_pulse) -+ | HSMC_BF(NCS_RD_PULSE, config->ncs_read_pulse)); -+ cycle = (HSMC_BF(NWE_CYCLE, config->write_cycle) -+ | HSMC_BF(NRD_CYCLE, config->read_cycle)); - - switch (config->bus_width) { - case 1: diff --git a/arch/avr32/mach-at32ap/pio.c b/arch/avr32/mach-at32ap/pio.c -index 1eb99b8..c978c36 100644 +index d61a02d..c978c36 100644 --- a/arch/avr32/mach-at32ap/pio.c +++ b/arch/avr32/mach-at32ap/pio.c -@@ -110,6 +110,10 @@ void __init at32_select_gpio(unsigned int pin, unsigned long flags) - pio_writel(pio, SODR, mask); - else - pio_writel(pio, CODR, mask); -+ if (flags & AT32_GPIOF_MULTIDRV) -+ pio_writel(pio, MDER, mask); -+ else -+ pio_writel(pio, MDDR, mask); - pio_writel(pio, PUDR, mask); - pio_writel(pio, OER, mask); - } else { -@@ -158,6 +162,82 @@ fail: +@@ -162,6 +162,82 @@ fail: dump_stack(); } @@ -3874,27 +10903,8 @@ index 1eb99b8..c978c36 100644 /*--------------------------------------------------------------------------*/ /* GPIO API */ -diff --git a/arch/avr32/mach-at32ap/pm.h b/arch/avr32/mach-at32ap/pm.h -index a1f8ace..47efd0d 100644 ---- a/arch/avr32/mach-at32ap/pm.h -+++ b/arch/avr32/mach-at32ap/pm.h -@@ -4,6 +4,14 @@ - #ifndef __ARCH_AVR32_MACH_AT32AP_PM_H__ - #define __ARCH_AVR32_MACH_AT32AP_PM_H__ - -+/* -+ * We can reduce the code size a bit by using a constant here. Since -+ * this file is only used on AVR32 AP CPUs with segmentation enabled, -+ * it's safe to not use ioremap. Generic drivers should of course -+ * never do this. -+ */ -+#define AT32_PM_BASE 0xfff00000 -+ - /* PM register offsets */ - #define PM_MCCTRL 0x0000 - #define PM_CKSEL 0x0004 diff --git a/arch/avr32/mm/dma-coherent.c b/arch/avr32/mm/dma-coherent.c -index 099212d..26f29c6 100644 +index 177fea8..6d8c794 100644 --- a/arch/avr32/mm/dma-coherent.c +++ b/arch/avr32/mm/dma-coherent.c @@ -41,6 +41,13 @@ static struct page *__dma_alloc(struct device *dev, size_t size, @@ -3911,38 +10921,281 @@ index 099212d..26f29c6 100644 size = PAGE_ALIGN(size); order = get_order(size); -diff --git a/arch/avr32/mm/init.c b/arch/avr32/mm/init.c -index 82cf708..480760b 100644 ---- a/arch/avr32/mm/init.c -+++ b/arch/avr32/mm/init.c -@@ -224,19 +224,9 @@ void free_initmem(void) - - #ifdef CONFIG_BLK_DEV_INITRD - --static int keep_initrd; -- - void free_initrd_mem(unsigned long start, unsigned long end) - { -- if (!keep_initrd) -- free_area(start, end, "initrd"); --} -- --static int __init keepinitrd_setup(char *__unused) --{ -- keep_initrd = 1; -- return 1; -+ free_area(start, end, "initrd"); +diff --git a/arch/avr32/mm/tlb.c b/arch/avr32/mm/tlb.c +index 5667201..b835257 100644 +--- a/arch/avr32/mm/tlb.c ++++ b/arch/avr32/mm/tlb.c +@@ -348,7 +348,7 @@ static int tlb_show(struct seq_file *tlb, void *v) + return 0; } --__setup("keepinitrd", keepinitrd_setup); - #endif +-static struct seq_operations tlb_ops = { ++static const struct seq_operations tlb_ops = { + .start = tlb_start, + .next = tlb_next, + .stop = tlb_stop, +diff --git a/arch/avr32/oprofile/Makefile b/arch/avr32/oprofile/Makefile +new file mode 100644 +index 0000000..1fe81c3 +--- /dev/null ++++ b/arch/avr32/oprofile/Makefile +@@ -0,0 +1,8 @@ ++obj-$(CONFIG_OPROFILE) += oprofile.o ++ ++oprofile-y := $(addprefix ../../../drivers/oprofile/, \ ++ oprof.o cpu_buffer.o buffer_sync.o \ ++ event_buffer.o oprofile_files.o \ ++ oprofilefs.o oprofile_stats.o \ ++ timer_int.o) ++oprofile-y += op_model_avr32.o +diff --git a/arch/avr32/oprofile/op_model_avr32.c b/arch/avr32/oprofile/op_model_avr32.c +new file mode 100644 +index 0000000..e2f876b +--- /dev/null ++++ b/arch/avr32/oprofile/op_model_avr32.c +@@ -0,0 +1,235 @@ ++/* ++ * AVR32 Performance Counter Driver ++ * ++ * Copyright (C) 2005-2007 Atmel Corporation ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ * Author: Ronny Pedersen ++ */ ++#include <linux/errno.h> ++#include <linux/interrupt.h> ++#include <linux/irq.h> ++#include <linux/oprofile.h> ++#include <linux/sched.h> ++#include <linux/types.h> ++ ++#include <asm/intc.h> ++#include <asm/sysreg.h> ++#include <asm/system.h> ++ ++#define AVR32_PERFCTR_IRQ_GROUP 0 ++#define AVR32_PERFCTR_IRQ_LINE 1 ++ ++enum { PCCNT, PCNT0, PCNT1, NR_counter }; ++ ++struct avr32_perf_counter { ++ unsigned long enabled; ++ unsigned long event; ++ unsigned long count; ++ unsigned long unit_mask; ++ unsigned long kernel; ++ unsigned long user; ++ ++ u32 ie_mask; ++ u32 flag_mask; ++}; ++ ++static struct avr32_perf_counter counter[NR_counter] = { ++ { ++ .ie_mask = SYSREG_BIT(IEC), ++ .flag_mask = SYSREG_BIT(FC), ++ }, { ++ .ie_mask = SYSREG_BIT(IE0), ++ .flag_mask = SYSREG_BIT(F0), ++ }, { ++ .ie_mask = SYSREG_BIT(IE1), ++ .flag_mask = SYSREG_BIT(F1), ++ }, ++}; ++ ++static void avr32_perf_counter_reset(void) ++{ ++ /* Reset all counter and disable/clear all interrupts */ ++ sysreg_write(PCCR, (SYSREG_BIT(PCCR_R) ++ | SYSREG_BIT(PCCR_C) ++ | SYSREG_BIT(FC) ++ | SYSREG_BIT(F0) ++ | SYSREG_BIT(F1))); ++} ++ ++static irqreturn_t avr32_perf_counter_interrupt(int irq, void *dev_id) ++{ ++ struct avr32_perf_counter *ctr = dev_id; ++ struct pt_regs *regs; ++ u32 pccr; ++ ++ if (likely(!(intc_get_pending(AVR32_PERFCTR_IRQ_GROUP) ++ & (1 << AVR32_PERFCTR_IRQ_LINE)))) ++ return IRQ_NONE; ++ ++ regs = get_irq_regs(); ++ pccr = sysreg_read(PCCR); ++ ++ /* Clear the interrupt flags we're about to handle */ ++ sysreg_write(PCCR, pccr); ++ ++ /* PCCNT */ ++ if (ctr->enabled && (pccr & ctr->flag_mask)) { ++ sysreg_write(PCCNT, -ctr->count); ++ oprofile_add_sample(regs, PCCNT); ++ } ++ ctr++; ++ /* PCNT0 */ ++ if (ctr->enabled && (pccr & ctr->flag_mask)) { ++ sysreg_write(PCNT0, -ctr->count); ++ oprofile_add_sample(regs, PCNT0); ++ } ++ ctr++; ++ /* PCNT1 */ ++ if (ctr->enabled && (pccr & ctr->flag_mask)) { ++ sysreg_write(PCNT1, -ctr->count); ++ oprofile_add_sample(regs, PCNT1); ++ } ++ ++ return IRQ_HANDLED; ++} ++ ++static int avr32_perf_counter_create_files(struct super_block *sb, ++ struct dentry *root) ++{ ++ struct dentry *dir; ++ unsigned int i; ++ char filename[4]; ++ ++ for (i = 0; i < NR_counter; i++) { ++ snprintf(filename, sizeof(filename), "%u", i); ++ dir = oprofilefs_mkdir(sb, root, filename); ++ ++ oprofilefs_create_ulong(sb, dir, "enabled", ++ &counter[i].enabled); ++ oprofilefs_create_ulong(sb, dir, "event", ++ &counter[i].event); ++ oprofilefs_create_ulong(sb, dir, "count", ++ &counter[i].count); ++ ++ /* Dummy entries */ ++ oprofilefs_create_ulong(sb, dir, "kernel", ++ &counter[i].kernel); ++ oprofilefs_create_ulong(sb, dir, "user", ++ &counter[i].user); ++ oprofilefs_create_ulong(sb, dir, "unit_mask", ++ &counter[i].unit_mask); ++ } ++ ++ return 0; ++} ++ ++static int avr32_perf_counter_setup(void) ++{ ++ struct avr32_perf_counter *ctr; ++ u32 pccr; ++ int ret; ++ int i; ++ ++ pr_debug("avr32_perf_counter_setup\n"); ++ ++ if (sysreg_read(PCCR) & SYSREG_BIT(PCCR_E)) { ++ printk(KERN_ERR ++ "oprofile: setup: perf counter already enabled\n"); ++ return -EBUSY; ++ } ++ ++ ret = request_irq(AVR32_PERFCTR_IRQ_GROUP, ++ avr32_perf_counter_interrupt, IRQF_SHARED, ++ "oprofile", counter); ++ if (ret) ++ return ret; ++ ++ avr32_perf_counter_reset(); ++ ++ pccr = 0; ++ for (i = PCCNT; i < NR_counter; i++) { ++ ctr = &counter[i]; ++ if (!ctr->enabled) ++ continue; ++ ++ pr_debug("enabling counter %d...\n", i); ++ ++ pccr |= ctr->ie_mask; ++ ++ switch (i) { ++ case PCCNT: ++ /* PCCNT always counts cycles, so no events */ ++ sysreg_write(PCCNT, -ctr->count); ++ break; ++ case PCNT0: ++ pccr |= SYSREG_BF(CONF0, ctr->event); ++ sysreg_write(PCNT0, -ctr->count); ++ break; ++ case PCNT1: ++ pccr |= SYSREG_BF(CONF1, ctr->event); ++ sysreg_write(PCNT1, -ctr->count); ++ break; ++ } ++ } ++ ++ pr_debug("oprofile: writing 0x%x to PCCR...\n", pccr); ++ ++ sysreg_write(PCCR, pccr); ++ ++ return 0; ++} ++ ++static void avr32_perf_counter_shutdown(void) ++{ ++ pr_debug("avr32_perf_counter_shutdown\n"); ++ ++ avr32_perf_counter_reset(); ++ free_irq(AVR32_PERFCTR_IRQ_GROUP, counter); ++} ++ ++static int avr32_perf_counter_start(void) ++{ ++ pr_debug("avr32_perf_counter_start\n"); ++ ++ sysreg_write(PCCR, sysreg_read(PCCR) | SYSREG_BIT(PCCR_E)); ++ ++ return 0; ++} ++ ++static void avr32_perf_counter_stop(void) ++{ ++ pr_debug("avr32_perf_counter_stop\n"); ++ ++ sysreg_write(PCCR, sysreg_read(PCCR) & ~SYSREG_BIT(PCCR_E)); ++} ++ ++static struct oprofile_operations avr32_perf_counter_ops __initdata = { ++ .create_files = avr32_perf_counter_create_files, ++ .setup = avr32_perf_counter_setup, ++ .shutdown = avr32_perf_counter_shutdown, ++ .start = avr32_perf_counter_start, ++ .stop = avr32_perf_counter_stop, ++ .cpu_type = "avr32", ++}; ++ ++int __init oprofile_arch_init(struct oprofile_operations *ops) ++{ ++ if (!(current_cpu_data.features & AVR32_FEATURE_PCTR)) ++ return -ENODEV; ++ ++ memcpy(ops, &avr32_perf_counter_ops, ++ sizeof(struct oprofile_operations)); ++ ++ printk(KERN_INFO "oprofile: using AVR32 performance monitoring.\n"); ++ ++ return 0; ++} ++ ++void oprofile_arch_exit(void) ++{ ++ ++} diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig -index 9f3a4cd..6f5bcd6 100644 +index c466c6c..0bb2052 100644 --- a/drivers/i2c/busses/Kconfig +++ b/drivers/i2c/busses/Kconfig -@@ -80,6 +80,14 @@ config I2C_AT91 - This supports the use of the I2C interface on Atmel AT91 - processors. +@@ -88,6 +88,14 @@ config I2C_AT91 + to support combined I2C messages. Use the i2c-gpio driver + unless your system can cope with those limitations. +config I2C_ATMELTWI + tristate "Atmel Two-Wire Interface (TWI)" @@ -3956,10 +11209,10 @@ index 9f3a4cd..6f5bcd6 100644 tristate "Au1550/Au1200 SMBus interface" depends on SOC_AU1550 || SOC_AU1200 diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile -index 5b752e4..e4644a8 100644 +index 81d43c2..af3f350 100644 --- a/drivers/i2c/busses/Makefile +++ b/drivers/i2c/busses/Makefile -@@ -52,6 +52,7 @@ obj-$(CONFIG_I2C_VIAPRO) += i2c-viapro.o +@@ -53,6 +53,7 @@ obj-$(CONFIG_I2C_VIAPRO) += i2c-viapro.o obj-$(CONFIG_I2C_VOODOO3) += i2c-voodoo3.o obj-$(CONFIG_SCx200_ACB) += scx200_acb.o obj-$(CONFIG_SCx200_I2C) += scx200_i2c.o @@ -3969,7 +11222,7 @@ index 5b752e4..e4644a8 100644 EXTRA_CFLAGS += -DDEBUG diff --git a/drivers/i2c/busses/i2c-atmeltwi.c b/drivers/i2c/busses/i2c-atmeltwi.c new file mode 100644 -index 0000000..3f78b31 +index 0000000..70c719a --- /dev/null +++ b/drivers/i2c/busses/i2c-atmeltwi.c @@ -0,0 +1,436 @@ @@ -4295,7 +11548,7 @@ index 0000000..3f78b31 + if (!regs) + return -ENXIO; + -+ pclk = clk_get(&pdev->dev, "pclk"); ++ pclk = clk_get(&pdev->dev, "twi_pclk"); + if (IS_ERR(pclk)) + return PTR_ERR(pclk); + clk_enable(pclk); @@ -4532,219 +11785,649 @@ index 0000000..1aca065 + __raw_writel((value), (port)->regs + TWI_##reg) + +#endif /* __ATMELTWI_H__ */ +diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig +index ec568fa..4e1db3b 100644 +--- a/drivers/leds/Kconfig ++++ b/drivers/leds/Kconfig +@@ -18,6 +18,13 @@ config LEDS_CLASS + + comment "LED drivers" + ++config LEDS_ATMEL_PWM ++ tristate "LED Support using Atmel PWM outputs" ++ depends on LEDS_CLASS && ATMEL_PWM ++ help ++ This option enables support for LEDs driven using outputs ++ of the dedicated PWM controller found on newer Atmel SOCs. ++ + config LEDS_CORGI + tristate "LED Support for the Sharp SL-C7x0 series" + depends on LEDS_CLASS && PXA_SHARP_C7xx +diff --git a/drivers/leds/Makefile b/drivers/leds/Makefile +index a60de1b..04bc850 100644 +--- a/drivers/leds/Makefile ++++ b/drivers/leds/Makefile +@@ -5,6 +5,7 @@ obj-$(CONFIG_LEDS_CLASS) += led-class.o + obj-$(CONFIG_LEDS_TRIGGERS) += led-triggers.o + + # LED Platform Drivers ++obj-$(CONFIG_LEDS_ATMEL_PWM) += leds-atmel-pwm.o + obj-$(CONFIG_LEDS_CORGI) += leds-corgi.o + obj-$(CONFIG_LEDS_LOCOMO) += leds-locomo.o + obj-$(CONFIG_LEDS_SPITZ) += leds-spitz.o +diff --git a/drivers/leds/leds-atmel-pwm.c b/drivers/leds/leds-atmel-pwm.c +new file mode 100644 +index 0000000..187031c +--- /dev/null ++++ b/drivers/leds/leds-atmel-pwm.c +@@ -0,0 +1,155 @@ ++#include <linux/kernel.h> ++#include <linux/platform_device.h> ++#include <linux/leds.h> ++#include <linux/io.h> ++#include <linux/atmel_pwm.h> ++ ++ ++struct pwmled { ++ struct led_classdev cdev; ++ struct pwm_channel pwmc; ++ struct gpio_led *desc; ++ u32 mult; ++ u8 active_low; ++}; ++ ++ ++/* ++ * For simplicity, we use "brightness" as if it were a linear function ++ * of PWM duty cycle. However, a logarithmic function of duty cycle is ++ * probably a better match for perceived brightness: two is half as bright ++ * as four, four is half as bright as eight, etc ++ */ ++static void pwmled_brightness(struct led_classdev *cdev, enum led_brightness b) ++{ ++ struct pwmled *led; ++ ++ /* update the duty cycle for the *next* period */ ++ led = container_of(cdev, struct pwmled, cdev); ++ pwm_channel_writel(&led->pwmc, PWM_CUPD, led->mult * (unsigned) b); ++} ++ ++/* ++ * NOTE: we reuse the platform_data structure of GPIO leds, ++ * but repurpose its "gpio" number as a PWM channel number. ++ */ ++static int __init pwmled_probe(struct platform_device *pdev) ++{ ++ const struct gpio_led_platform_data *pdata; ++ struct pwmled *leds; ++ unsigned i; ++ int status; ++ ++ pdata = pdev->dev.platform_data; ++ if (!pdata || pdata->num_leds < 1) ++ return -ENODEV; ++ ++ leds = kcalloc(pdata->num_leds, sizeof(*leds), GFP_KERNEL); ++ if (!leds) ++ return -ENOMEM; ++ ++ for (i = 0; i < pdata->num_leds; i++) { ++ struct pwmled *led = leds + i; ++ const struct gpio_led *dat = pdata->leds + i; ++ u32 tmp; ++ ++ led->cdev.name = dat->name; ++ led->cdev.brightness = LED_OFF; ++ led->cdev.brightness_set = pwmled_brightness; ++ led->cdev.default_trigger = dat->default_trigger; ++ ++ led->active_low = dat->active_low; ++ ++ status = pwm_channel_alloc(dat->gpio, &led->pwmc); ++ if (status < 0) ++ goto err; ++ ++ /* ++ * Prescale clock by 2^x, so PWM counts in low MHz. ++ * Start each cycle with the LED active, so increasing ++ * the duty cycle gives us more time on (== brighter). ++ */ ++ tmp = 5; ++ if (!led->active_low) ++ tmp |= PWM_CPR_CPOL; ++ pwm_channel_writel(&led->pwmc, PWM_CMR, tmp); ++ ++ /* ++ * Pick a period so PWM cycles at 100+ Hz; and a multiplier ++ * for scaling duty cycle: brightness * mult. ++ */ ++ tmp = (led->pwmc.mck / (1 << 5)) / 100; ++ tmp /= 255; ++ led->mult = tmp; ++ pwm_channel_writel(&led->pwmc, PWM_CDTY, ++ led->cdev.brightness * 255); ++ pwm_channel_writel(&led->pwmc, PWM_CPRD, ++ LED_FULL * tmp); ++ ++ pwm_channel_enable(&led->pwmc); ++ ++ /* Hand it over to the LED framework */ ++ status = led_classdev_register(&pdev->dev, &led->cdev); ++ if (status < 0) { ++ pwm_channel_free(&led->pwmc); ++ goto err; ++ } ++ } ++ ++ platform_set_drvdata(pdev, leds); ++ return 0; ++ ++err: ++ while (i-- > 0) { ++ led_classdev_unregister(&leds[i].cdev); ++ pwm_channel_free(&leds[i].pwmc); ++ } ++ kfree(leds); ++ ++ return status; ++} ++ ++static int __exit pwmled_remove(struct platform_device *pdev) ++{ ++ const struct gpio_led_platform_data *pdata; ++ struct pwmled *leds; ++ unsigned i; ++ ++ pdata = pdev->dev.platform_data; ++ leds = platform_get_drvdata(pdev); ++ ++ for (i = 0; i < pdata->num_leds; i++) { ++ struct pwmled *led = leds + i; ++ ++ led_classdev_unregister(&led->cdev); ++ pwm_channel_free(&led->pwmc); ++ } ++ ++ kfree(leds); ++ platform_set_drvdata(pdev, NULL); ++ return 0; ++} ++ ++static struct platform_driver pwmled_driver = { ++ .driver = { ++ .name = "leds-atmel-pwm", ++ .owner = THIS_MODULE, ++ }, ++ /* REVISIT add suspend() and resume() methods */ ++ .remove = __exit_p(pwmled_remove), ++}; ++ ++static int __init modinit(void) ++{ ++ return platform_driver_probe(&pwmled_driver, pwmled_probe); ++} ++module_init(modinit); ++ ++static void __exit modexit(void) ++{ ++ platform_driver_unregister(&pwmled_driver); ++} ++module_exit(modexit); ++ ++MODULE_DESCRIPTION("Driver for LEDs with PWM-controlled brightness"); ++MODULE_LICENSE("GPL"); diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig -index 73e248f..9e848cc 100644 +index b5e67c0..23a9231 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig -@@ -202,5 +202,14 @@ config THINKPAD_ACPI_BAY +@@ -13,6 +13,15 @@ menuconfig MISC_DEVICES - If you are not sure, say Y here. + if MISC_DEVICES -+config ATMEL_SSC -+ tristate "Device driver for Atmel SSC peripheral" ++config ATMEL_PWM ++ tristate "Atmel AT32/AT91 PWM support" + depends on AVR32 || ARCH_AT91 -+ ---help--- -+ This option enables device driver support for Atmel Syncronized -+ Serial Communication peripheral (SSC). -+ -+ The SSC peripheral supports a wide variety of serial frame based -+ communications, i.e. I2S, SPI, etc. - - endif # MISC_DEVICES ++ help ++ This option enables device driver support for the PWM channels ++ on certain Atmel prcoessors. Pulse Width Modulation is used for ++ purposes including software controlled power-efficent backlights ++ on LCD displays, motor control, and waveform generation. ++ + config IBM_ASM + tristate "Device driver for IBM RSA service processor" + depends on X86 && PCI && INPUT && EXPERIMENTAL diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile -index b5ce0e3..40d8ed1 100644 +index 87f2685..b4674c6 100644 --- a/drivers/misc/Makefile +++ b/drivers/misc/Makefile -@@ -15,3 +15,4 @@ obj-$(CONFIG_SGI_IOC4) += ioc4.o - obj-$(CONFIG_SONY_LAPTOP) += sony-laptop.o - obj-$(CONFIG_THINKPAD_ACPI) += thinkpad_acpi.o - obj-$(CONFIG_EEPROM_93CX6) += eeprom_93cx6.o -+obj-$(CONFIG_ATMEL_SSC) += atmel-ssc.o -diff --git a/drivers/misc/atmel-ssc.c b/drivers/misc/atmel-ssc.c +@@ -7,6 +7,7 @@ obj-$(CONFIG_IBM_ASM) += ibmasm/ + obj-$(CONFIG_HDPU_FEATURES) += hdpuftrs/ + obj-$(CONFIG_MSI_LAPTOP) += msi-laptop.o + obj-$(CONFIG_ASUS_LAPTOP) += asus-laptop.o ++obj-$(CONFIG_ATMEL_PWM) += atmel_pwm.o + obj-$(CONFIG_ATMEL_SSC) += atmel-ssc.o + obj-$(CONFIG_LKDTM) += lkdtm.o + obj-$(CONFIG_TIFM_CORE) += tifm_core.o +diff --git a/drivers/misc/atmel_pwm.c b/drivers/misc/atmel_pwm.c new file mode 100644 -index 0000000..058ccac +index 0000000..f8d3b9a --- /dev/null -+++ b/drivers/misc/atmel-ssc.c -@@ -0,0 +1,174 @@ ++++ b/drivers/misc/atmel_pwm.c +@@ -0,0 +1,409 @@ ++#include <linux/module.h> ++#include <linux/clk.h> ++#include <linux/err.h> ++#include <linux/io.h> ++#include <linux/interrupt.h> ++#include <linux/platform_device.h> ++#include <linux/atmel_pwm.h> ++ ++ +/* -+ * Atmel SSC driver -+ * -+ * Copyright (C) 2007 Atmel Corporation ++ * This is a simple driver for the PWM controller found in various newer ++ * Atmel SOCs, including the AVR32 series and the AT91sam9263. + * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. ++ * Chips with current Linux ports have only 4 PWM channels, out of max 32. ++ * AT32UC3A and AT32UC3B chips have 7 channels (but currently no Linux). ++ * Docs are inconsistent about the width of the channel counter registers; ++ * it's at least 16 bits, but several places say 20 bits. + */ ++#define PWM_NCHAN 4 /* max 32 */ ++ ++struct pwm { ++ spinlock_t lock; ++ struct platform_device *pdev; ++ u32 mask; ++ int irq; ++ void __iomem *base; ++ struct clk *clk; ++ struct pwm_channel *channel[PWM_NCHAN]; ++ void (*handler[PWM_NCHAN])(struct pwm_channel *); ++}; + -+#include <linux/platform_device.h> -+#include <linux/list.h> -+#include <linux/clk.h> -+#include <linux/err.h> -+#include <linux/io.h> -+#include <linux/list.h> -+#include <linux/spinlock.h> -+#include <linux/atmel-ssc.h> + -+/* Serialize access to ssc_list and user count */ -+static DEFINE_SPINLOCK(user_lock); -+static LIST_HEAD(ssc_list); ++/* global PWM controller registers */ ++#define PWM_MR 0x00 ++#define PWM_ENA 0x04 ++#define PWM_DIS 0x08 ++#define PWM_SR 0x0c ++#define PWM_IER 0x10 ++#define PWM_IDR 0x14 ++#define PWM_IMR 0x18 ++#define PWM_ISR 0x1c + -+struct ssc_device *ssc_request(unsigned int ssc_num) ++static inline void pwm_writel(const struct pwm *p, unsigned offset, u32 val) +{ -+ int ssc_valid = 0; -+ struct ssc_device *ssc; ++ __raw_writel(val, p->base + offset); ++} + -+ spin_lock(&user_lock); -+ list_for_each_entry(ssc, &ssc_list, list) { -+ if (ssc->pdev->id == ssc_num) { -+ ssc_valid = 1; -+ break; -+ } -+ } ++static inline u32 pwm_readl(const struct pwm *p, unsigned offset) ++{ ++ return __raw_readl(p->base + offset); ++} + -+ if (!ssc_valid) { -+ spin_unlock(&user_lock); -+ dev_dbg(&ssc->pdev->dev, "could not find requested device\n"); -+ return ERR_PTR(-ENODEV); -+ } ++static inline void __iomem *pwmc_regs(const struct pwm *p, int index) ++{ ++ return p->base + 0x200 + index * 0x20; ++} ++ ++static struct pwm *pwm; ++ ++static void pwm_dumpregs(struct pwm_channel *ch, char *tag) ++{ ++ struct device *dev = &pwm->pdev->dev; ++ ++ dev_dbg(dev, "%s: mr %08x, sr %08x, imr %08x\n", ++ tag, ++ pwm_readl(pwm, PWM_MR), ++ pwm_readl(pwm, PWM_SR), ++ pwm_readl(pwm, PWM_IMR)); ++ dev_dbg(dev, ++ "pwm ch%d - mr %08x, dty %u, prd %u, cnt %u\n", ++ ch->index, ++ pwm_channel_readl(ch, PWM_CMR), ++ pwm_channel_readl(ch, PWM_CDTY), ++ pwm_channel_readl(ch, PWM_CPRD), ++ pwm_channel_readl(ch, PWM_CCNT)); ++} ++ ++ ++/** ++ * pwm_channel_alloc - allocate an unused PWM channel ++ * @index: identifies the channel ++ * @ch: structure to be initialized ++ * ++ * Drivers allocate PWM channels according to the board's wiring, and ++ * matching board-specific setup code. Returns zero or negative errno. ++ */ ++int pwm_channel_alloc(int index, struct pwm_channel *ch) ++{ ++ unsigned long flags; ++ int status = 0; ++ ++ /* insist on PWM init, with this signal pinned out */ ++ if (!pwm || !(pwm->mask & 1 << index)) ++ return -ENODEV; ++ ++ if (index < 0 || index >= PWM_NCHAN || !ch) ++ return -EINVAL; ++ memset(ch, 0, sizeof *ch); + -+ if (ssc->user) { -+ spin_unlock(&user_lock); -+ dev_dbg(&ssc->pdev->dev, "module busy\n"); -+ return ERR_PTR(-EBUSY); ++ spin_lock_irqsave(&pwm->lock, flags); ++ if (pwm->channel[index]) ++ status = -EBUSY; ++ else { ++ clk_enable(pwm->clk); ++ ++ ch->regs = pwmc_regs(pwm, index); ++ ch->index = index; ++ ++ /* REVISIT: ap7000 seems to go 2x as fast as we expect!! */ ++ ch->mck = clk_get_rate(pwm->clk); ++ ++ pwm->channel[index] = ch; ++ pwm->handler[index] = NULL; ++ ++ /* channel and irq are always disabled when we return */ ++ pwm_writel(pwm, PWM_DIS, 1 << index); ++ pwm_writel(pwm, PWM_IDR, 1 << index); + } -+ ssc->user++; -+ spin_unlock(&user_lock); ++ spin_unlock_irqrestore(&pwm->lock, flags); ++ return status; ++} ++EXPORT_SYMBOL(pwm_channel_alloc); + -+ clk_enable(ssc->clk); ++static int pwmcheck(struct pwm_channel *ch) ++{ ++ int index; ++ ++ if (!pwm) ++ return -ENODEV; ++ if (!ch) ++ return -EINVAL; ++ index = ch->index; ++ if (index < 0 || index >= PWM_NCHAN || pwm->channel[index] != ch) ++ return -EINVAL; + -+ return ssc; ++ return index; +} -+EXPORT_SYMBOL(ssc_request); + -+void ssc_free(struct ssc_device *ssc) ++/** ++ * pwm_channel_free - release a previously allocated channel ++ * @ch: the channel being released ++ * ++ * The channel is completely shut down (counter and IRQ disabled), ++ * and made available for re-use. Returns zero, or negative errno. ++ */ ++int pwm_channel_free(struct pwm_channel *ch) +{ -+ spin_lock(&user_lock); -+ if (ssc->user) { -+ ssc->user--; -+ clk_disable(ssc->clk); -+ } else { -+ dev_dbg(&ssc->pdev->dev, "device already free\n"); ++ unsigned long flags; ++ int t; ++ ++ spin_lock_irqsave(&pwm->lock, flags); ++ t = pwmcheck(ch); ++ if (t >= 0) { ++ pwm->channel[t] = NULL; ++ pwm->handler[t] = NULL; ++ ++ /* channel and irq are always disabled when we return */ ++ pwm_writel(pwm, PWM_DIS, 1 << t); ++ pwm_writel(pwm, PWM_IDR, 1 << t); ++ ++ clk_disable(pwm->clk); ++ t = 0; + } -+ spin_unlock(&user_lock); ++ spin_unlock_irqrestore(&pwm->lock, flags); ++ return t; +} -+EXPORT_SYMBOL(ssc_free); ++EXPORT_SYMBOL(pwm_channel_free); + -+static int __init ssc_probe(struct platform_device *pdev) ++int __pwm_channel_onoff(struct pwm_channel *ch, int enabled) +{ -+ int retval = 0; -+ struct resource *regs; -+ struct ssc_device *ssc; ++ unsigned long flags; ++ int t; + -+ ssc = kzalloc(sizeof(struct ssc_device), GFP_KERNEL); -+ if (!ssc) { -+ dev_dbg(&pdev->dev, "out of memory\n"); -+ retval = -ENOMEM; -+ goto out; ++ /* OMITTED FUNCTIONALITY: starting several channels in synch */ ++ ++ spin_lock_irqsave(&pwm->lock, flags); ++ t = pwmcheck(ch); ++ if (t >= 0) { ++ pwm_writel(pwm, enabled ? PWM_ENA : PWM_DIS, 1 << t); ++ t = 0; ++ pwm_dumpregs(ch, enabled ? "enable" : "disable"); + } ++ spin_unlock_irqrestore(&pwm->lock, flags); + -+ regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); -+ if (!regs) { -+ dev_dbg(&pdev->dev, "no mmio resource defined\n"); -+ retval = -ENXIO; -+ goto out_free; ++ return t; ++} ++EXPORT_SYMBOL(__pwm_channel_onoff); ++ ++/** ++ * pwm_clk_alloc - allocate and configure CLKA or CLKB ++ * @prescale: from 0..10, the power of two used to divide MCK ++ * @div: from 1..255, the linear divisor to use ++ * ++ * Returns PWM_CPR_CLKA, PWM_CPR_CLKB, or negative errno. The allocated ++ * clock will run with a period of (2^prescale * div) / MCK, or twice as ++ * long if center aligned PWM output is used. The clock must later be ++ * deconfigured using pwm_clk_free(). ++ */ ++int pwm_clk_alloc(unsigned prescale, unsigned div) ++{ ++ unsigned long flags; ++ u32 mr; ++ u32 val = (prescale << 8) | div; ++ int ret = -EBUSY; ++ ++ if (prescale >= 10 || div == 0 || div > 255) ++ return -EINVAL; ++ ++ spin_lock_irqsave(&pwm->lock, flags); ++ mr = pwm_readl(pwm, PWM_MR); ++ if ((mr & 0xffff) == 0) { ++ mr |= val; ++ ret = PWM_CPR_CLKA; ++ } ++ if ((mr & (0xffff << 16)) == 0) { ++ mr |= val << 16; ++ ret = PWM_CPR_CLKB; ++ } ++ if (ret > 0) ++ pwm_writel(pwm, PWM_MR, mr); ++ spin_unlock_irqrestore(&pwm->lock, flags); ++ return ret; ++} ++EXPORT_SYMBOL(pwm_clk_alloc); ++ ++/** ++ * pwm_clk_free - deconfigure and release CLKA or CLKB ++ * ++ * Reverses the effect of pwm_clk_alloc(). ++ */ ++void pwm_clk_free(unsigned clk) ++{ ++ unsigned long flags; ++ u32 mr; ++ ++ spin_lock_irqsave(&pwm->lock, flags); ++ mr = pwm_readl(pwm, PWM_MR); ++ if (clk == PWM_CPR_CLKA) ++ pwm_writel(pwm, PWM_MR, mr & ~(0xffff << 0)); ++ if (clk == PWM_CPR_CLKB) ++ pwm_writel(pwm, PWM_MR, mr & ~(0xffff << 16)); ++ spin_unlock_irqrestore(&pwm->lock, flags); ++} ++EXPORT_SYMBOL(pwm_clk_free); ++ ++/** ++ * pwm_channel_handler - manage channel's IRQ handler ++ * @ch: the channel ++ * @handler: the handler to use, possibly NULL ++ * ++ * If the handler is non-null, the handler will be called after every ++ * period of this PWM channel. If the handler is null, this channel ++ * won't generate an IRQ. ++ */ ++int pwm_channel_handler(struct pwm_channel *ch, ++ void (*handler)(struct pwm_channel *ch)) ++{ ++ unsigned long flags; ++ int t; ++ ++ spin_lock_irqsave(&pwm->lock, flags); ++ t = pwmcheck(ch); ++ if (t >= 0) { ++ pwm->handler[t] = handler; ++ pwm_writel(pwm, handler ? PWM_IER : PWM_IDR, 1 << t); ++ t = 0; + } ++ spin_unlock_irqrestore(&pwm->lock, flags); + -+ ssc->clk = clk_get(&pdev->dev, "pclk"); -+ if (IS_ERR(ssc->clk)) { -+ dev_dbg(&pdev->dev, "no pclk clock defined\n"); -+ retval = -ENXIO; -+ goto out_free; ++ return t; ++} ++EXPORT_SYMBOL(pwm_channel_handler); ++ ++static irqreturn_t pwm_irq(int id, void *_pwm) ++{ ++ struct pwm *p = _pwm; ++ irqreturn_t handled = IRQ_NONE; ++ u32 irqstat; ++ int index; ++ ++ spin_lock(&p->lock); ++ ++ /* ack irqs, then handle them */ ++ irqstat = pwm_readl(pwm, PWM_ISR); ++ ++ while (irqstat) { ++ struct pwm_channel *ch; ++ void (*handler)(struct pwm_channel *ch); ++ ++ index = ffs(irqstat) - 1; ++ irqstat &= ~(1 << index); ++ ch = pwm->channel[index]; ++ handler = pwm->handler[index]; ++ if (handler && ch) { ++ spin_unlock(&p->lock); ++ handler(ch); ++ spin_lock(&p->lock); ++ handled = IRQ_HANDLED; ++ } + } + -+ ssc->pdev = pdev; -+ ssc->regs = ioremap(regs->start, regs->end - regs->start + 1); -+ if (!ssc->regs) { -+ dev_dbg(&pdev->dev, "ioremap failed\n"); -+ retval = -EINVAL; -+ goto out_clk; ++ spin_unlock(&p->lock); ++ return handled; ++} ++ ++static int __init pwm_probe(struct platform_device *pdev) ++{ ++ struct resource *r = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ int irq = platform_get_irq(pdev, 0); ++ u32 *mp = pdev->dev.platform_data; ++ struct pwm *p; ++ int status = -EIO; ++ ++ if (pwm) ++ return -EBUSY; ++ if (!r || irq < 0 || !mp || !*mp) ++ return -ENODEV; ++ if (*mp & ~((1<<PWM_NCHAN)-1)) { ++ dev_warn(&pdev->dev, "mask 0x%x ... more than %d channels\n", ++ *mp, PWM_NCHAN); ++ return -EINVAL; + } + -+ /* disable all interrupts */ -+ clk_enable(ssc->clk); -+ ssc_writel(ssc->regs, IDR, ~0UL); -+ ssc_readl(ssc->regs, SR); -+ clk_disable(ssc->clk); ++ p = kzalloc(sizeof(*p), GFP_KERNEL); ++ if (!p) ++ return -ENOMEM; + -+ ssc->irq = platform_get_irq(pdev, 0); -+ if (!ssc->irq) { -+ dev_dbg(&pdev->dev, "could not get irq\n"); -+ retval = -ENXIO; -+ goto out_unmap; ++ spin_lock_init(&p->lock); ++ p->pdev = pdev; ++ p->mask = *mp; ++ p->irq = irq; ++ p->base = ioremap(r->start, r->end - r->start + 1); ++ if (!p->base) ++ goto fail; ++ p->clk = clk_get(&pdev->dev, "mck"); ++ if (IS_ERR(p->clk)) { ++ status = PTR_ERR(p->clk); ++ p->clk = NULL; ++ goto fail; + } + -+ spin_lock(&user_lock); -+ list_add_tail(&ssc->list, &ssc_list); -+ spin_unlock(&user_lock); ++ status = request_irq(irq, pwm_irq, 0, pdev->name, p); ++ if (status < 0) ++ goto fail; + -+ platform_set_drvdata(pdev, ssc); ++ pwm = p; ++ platform_set_drvdata(pdev, p); + -+ dev_info(&pdev->dev, "Atmel SSC device at 0x%p (irq %d)\n", -+ ssc->regs, ssc->irq); ++ return 0; + -+ goto out; ++fail: ++ if (p->clk) ++ clk_put(p->clk); ++ if (p->base) ++ iounmap(p->base); + -+out_unmap: -+ iounmap(ssc->regs); -+out_clk: -+ clk_put(ssc->clk); -+out_free: -+ kfree(ssc); -+out: -+ return retval; ++ kfree(p); ++ return status; +} + -+static int __devexit ssc_remove(struct platform_device *pdev) ++static int __exit pwm_remove(struct platform_device *pdev) +{ -+ struct ssc_device *ssc = platform_get_drvdata(pdev); ++ struct pwm *p = platform_get_drvdata(pdev); + -+ spin_lock(&user_lock); -+ iounmap(ssc->regs); -+ clk_put(ssc->clk); -+ list_del(&ssc->list); -+ kfree(ssc); -+ spin_unlock(&user_lock); ++ if (p != pwm) ++ return -EINVAL; ++ ++ clk_enable(pwm->clk); ++ pwm_writel(pwm, PWM_DIS, (1 << PWM_NCHAN) - 1); ++ pwm_writel(pwm, PWM_IDR, (1 << PWM_NCHAN) - 1); ++ clk_disable(pwm->clk); ++ ++ pwm = NULL; ++ ++ free_irq(p->irq, p); ++ clk_put(p->clk); ++ iounmap(p->base); ++ kfree(p); + + return 0; +} + -+static struct platform_driver ssc_driver = { -+ .remove = __devexit_p(ssc_remove), -+ .driver = { -+ .name = "ssc", ++static struct platform_driver atmel_pwm_driver = { ++ .driver = { ++ .name = "atmel_pwm", ++ .owner = THIS_MODULE, + }, ++ .remove = __exit_p(pwm_remove), ++ ++ /* NOTE: PWM can keep running in AVR32 "idle" and "frozen" states; ++ * and all AT91sam9263 states, albeit at reduced clock rate if ++ * MCK becomes the slow clock (i.e. what Linux labels STR). ++ */ +}; + -+static int __init ssc_init(void) ++static int __init pwm_init(void) +{ -+ return platform_driver_probe(&ssc_driver, ssc_probe); ++ return platform_driver_probe(&atmel_pwm_driver, pwm_probe); +} -+module_init(ssc_init); ++module_init(pwm_init); + -+static void __exit ssc_exit(void) ++static void __exit pwm_exit(void) +{ -+ platform_driver_unregister(&ssc_driver); ++ platform_driver_unregister(&atmel_pwm_driver); +} -+module_exit(ssc_exit); ++module_exit(pwm_exit); + -+MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>"); -+MODULE_DESCRIPTION("SSC driver for Atmel AVR32 and AT91"); ++MODULE_DESCRIPTION("Driver for AT32/AT91 PWM module"); +MODULE_LICENSE("GPL"); diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig -index e23082f..1de1716 100644 +index 5fef678..4970b53 100644 --- a/drivers/mmc/host/Kconfig +++ b/drivers/mmc/host/Kconfig -@@ -74,6 +74,16 @@ config MMC_AT91 +@@ -91,6 +91,16 @@ config MMC_AT91 If unsure, say N. @@ -4762,22 +12445,23 @@ index e23082f..1de1716 100644 tristate "Motorola i.MX Multimedia Card Interface support" depends on ARCH_IMX diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile -index 6685f64..4b8e6e2 100644 +index 3877c87..e80ea72 100644 --- a/drivers/mmc/host/Makefile +++ b/drivers/mmc/host/Makefile -@@ -14,5 +14,6 @@ obj-$(CONFIG_MMC_WBSD) += wbsd.o +@@ -15,6 +15,7 @@ obj-$(CONFIG_MMC_WBSD) += wbsd.o obj-$(CONFIG_MMC_AU1X) += au1xmmc.o obj-$(CONFIG_MMC_OMAP) += omap.o obj-$(CONFIG_MMC_AT91) += at91_mci.o +obj-$(CONFIG_MMC_ATMELMCI) += atmel-mci.o obj-$(CONFIG_MMC_TIFM_SD) += tifm_sd.o + obj-$(CONFIG_MMC_SPI) += mmc_spi.o diff --git a/drivers/mmc/host/atmel-mci.c b/drivers/mmc/host/atmel-mci.c new file mode 100644 -index 0000000..45323c9 +index 0000000..0b5ec58 --- /dev/null +++ b/drivers/mmc/host/atmel-mci.c -@@ -0,0 +1,1161 @@ +@@ -0,0 +1,1176 @@ +/* + * Atmel MultiMedia Card Interface driver + * @@ -4817,6 +12501,7 @@ index 0000000..45323c9 + EVENT_DATA_ERROR, + EVENT_STOP_SENT, + EVENT_STOP_COMPLETE, ++ EVENT_DMA_COMPLETE, + EVENT_DMA_ERROR, + EVENT_CARD_DETECT, +}; @@ -4883,6 +12568,8 @@ index 0000000..45323c9 + test_bit(EVENT_STOP_SENT, &host->completed_events) +#define mci_stop_is_complete(host) \ + test_bit(EVENT_STOP_COMPLETE, &host->completed_events) ++#define mci_dma_is_complete(host) \ ++ test_bit(EVENT_DMA_COMPLETE, &host->completed_events) +#define mci_dma_error_is_complete(host) \ + test_bit(EVENT_DMA_ERROR, &host->completed_events) +#define mci_card_detect_is_complete(host) \ @@ -4931,6 +12618,8 @@ index 0000000..45323c9 + set_bit(EVENT_STOP_SENT, &host->completed_events) +#define mci_set_stop_complete(host) \ + set_bit(EVENT_STOP_COMPLETE, &host->completed_events) ++#define mci_set_dma_complete(host) \ ++ set_bit(EVENT_DMA_COMPLETE, &host->completed_events) +#define mci_set_dma_error_complete(host) \ + set_bit(EVENT_DMA_ERROR, &host->completed_events) +#define mci_set_card_detect_complete(host) \ @@ -5230,7 +12919,7 @@ index 0000000..45323c9 +{ + u32 cmdr; + -+ cmd->error = MMC_ERR_NONE; ++ cmd->error = 0; + + cmdr = MCI_BF(CMDNB, cmd->opcode); + @@ -5482,14 +13171,14 @@ index 0000000..45323c9 + struct mmc_command *cmd, u32 status) +{ + if (status & MCI_BIT(RTOE)) -+ cmd->error = MMC_ERR_TIMEOUT; ++ cmd->error = -ETIMEDOUT; + else if ((cmd->flags & MMC_RSP_CRC) + && (status & MCI_BIT(RCRCE))) -+ cmd->error = MMC_ERR_BADCRC; ++ cmd->error = -EILSEQ; + else if (status & (MCI_BIT(RINDE) | MCI_BIT(RDIRE) | MCI_BIT(RENDE))) -+ cmd->error = MMC_ERR_FAILED; ++ cmd->error = -EIO; + -+ if (cmd->error != MMC_ERR_NONE) { ++ if (cmd->error) { + dev_dbg(&host->mmc->class_dev, + "command error: op=0x%x status=0x%08x\n", + cmd->opcode, status); @@ -5535,7 +13224,7 @@ index 0000000..45323c9 + mci_clear_data_pending(host); + + /* DMA controller got bus error => invalid address */ -+ data->error = MMC_ERR_INVALID; ++ data->error = -EIO; + + dev_dbg(&mmc->class_dev, "dma error after %u bytes xfered\n", + host->data->bytes_xfered); @@ -5558,13 +13247,13 @@ index 0000000..45323c9 + + if (status & MCI_BIT(DCRCE)) { + dev_dbg(&mmc->class_dev, "data CRC error\n"); -+ data->error = MMC_ERR_BADCRC; ++ data->error = -EILSEQ; + } else if (status & MCI_BIT(DTOE)) { + dev_dbg(&mmc->class_dev, "data timeout error\n"); -+ data->error = MMC_ERR_TIMEOUT; ++ data->error = -ETIMEDOUT; + } else { + dev_dbg(&mmc->class_dev, "data FIFO error\n"); -+ data->error = MMC_ERR_FIFO; ++ data->error = -EIO; + } + dev_dbg(&mmc->class_dev, "bytes xfered: %u\n", + data->bytes_xfered); @@ -5592,16 +13281,16 @@ index 0000000..45323c9 + /* Clean up queue if present */ + if (mrq) { + if (!mci_cmd_is_complete(host)) -+ mrq->cmd->error = MMC_ERR_TIMEOUT; ++ mrq->cmd->error = -ETIMEDOUT; + if (mrq->data && !mci_data_is_complete(host) + && !mci_data_error_is_complete(host)) { + dma_stop_request(host->dma.req.req.dmac, + host->dma.req.req.channel); -+ host->data->error = MMC_ERR_TIMEOUT; ++ host->data->error = -ETIMEDOUT; + atmci_data_complete(host, data); + } + if (mrq->stop && !mci_stop_is_complete(host)) -+ mrq->stop->error = MMC_ERR_TIMEOUT; ++ mrq->stop->error = -ETIMEDOUT; + + host->cmd = NULL; + atmci_request_end(mmc, mrq); @@ -5631,6 +13320,9 @@ index 0000000..45323c9 + host->stop_status = status; + mci_set_stop_pending(host); + } else { ++ if (host->mrq->stop && mci_dma_is_complete(host) ++ && !mci_set_stop_sent_is_completed(host)) ++ send_stop_cmd(host->mmc, host->data, 0); + host->cmd_status = status; + mci_set_cmd_pending(host); + } @@ -5649,7 +13341,14 @@ index 0000000..45323c9 + host = container_of(dma, struct atmel_mci, dma); + data = host->data; + -+ if (data->stop && !mci_set_stop_sent_is_completed(host)) ++ /* ++ * This callback may be called before we see the CMDRDY ++ * interrupt under heavy irq load (possibly caused by other ++ * drivers) or when interrupts are disabled for a long time. ++ */ ++ mci_set_dma_complete(host); ++ if (data->stop && mci_cmd_is_complete(host) ++ && !mci_set_stop_sent_is_completed(host)) + send_stop_cmd(host->mmc, data, 0); + + /* @@ -6138,7 +13837,7 @@ index 0000000..60d15c4 + +#endif /* __DRIVERS_MMC_ATMEL_MCI_H__ */ diff --git a/drivers/mtd/chips/cfi_cmdset_0001.c b/drivers/mtd/chips/cfi_cmdset_0001.c -index 2f19fa7..94304ca 100644 +index 1707f98..d2ec6eb 100644 --- a/drivers/mtd/chips/cfi_cmdset_0001.c +++ b/drivers/mtd/chips/cfi_cmdset_0001.c @@ -50,6 +50,7 @@ @@ -6149,7 +13848,7 @@ index 2f19fa7..94304ca 100644 static int cfi_intelext_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *); static int cfi_intelext_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *); -@@ -156,6 +157,47 @@ static void cfi_tell_features(struct cfi_pri_intelext *extp) +@@ -157,6 +158,47 @@ static void cfi_tell_features(struct cfi_pri_intelext *extp) } #endif @@ -6197,7 +13896,7 @@ index 2f19fa7..94304ca 100644 #ifdef CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE /* Some Intel Strata Flash prior to FPO revision C has bugs in this area */ static void fixup_intel_strataflash(struct mtd_info *mtd, void* param) -@@ -233,6 +275,7 @@ static void fixup_use_powerup_lock(struct mtd_info *mtd, void *param) +@@ -234,6 +276,7 @@ static void fixup_use_powerup_lock(struct mtd_info *mtd, void *param) } static struct cfi_fixup cfi_fixup_table[] = { @@ -6206,7 +13905,7 @@ index 2f19fa7..94304ca 100644 { CFI_MFR_ANY, CFI_ID_ANY, fixup_intel_strataflash, NULL }, #endif diff --git a/drivers/mtd/chips/cfi_cmdset_0002.c b/drivers/mtd/chips/cfi_cmdset_0002.c -index 1f64458..205977b 100644 +index 389acc6..571226e 100644 --- a/drivers/mtd/chips/cfi_cmdset_0002.c +++ b/drivers/mtd/chips/cfi_cmdset_0002.c @@ -185,6 +185,10 @@ static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param) @@ -6236,2489 +13935,2156 @@ index 1f64458..205977b 100644 { 0, 0, NULL, NULL } }; static struct cfi_fixup jedec_fixup_table[] = { -diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c -index b046974..bc90604 100644 ---- a/drivers/spi/atmel_spi.c -+++ b/drivers/spi/atmel_spi.c -@@ -491,8 +491,8 @@ static int atmel_spi_setup(struct spi_device *spi) - csr |= SPI_BIT(NCPHA); +diff --git a/drivers/pcmcia/Kconfig b/drivers/pcmcia/Kconfig +index 519b4ff..847f983 100644 +--- a/drivers/pcmcia/Kconfig ++++ b/drivers/pcmcia/Kconfig +@@ -276,6 +276,13 @@ config ELECTRA_CF + Say Y here to support the CompactFlash controller on the + PA Semi Electra eval board. - /* TODO: DLYBS and DLYBCT */ -- csr |= SPI_BF(DLYBS, 10); -- csr |= SPI_BF(DLYBCT, 10); -+ csr |= SPI_BF(DLYBS, 0); -+ csr |= SPI_BF(DLYBCT, 0); - - /* chipselect must have been muxed as GPIO (e.g. in board setup) */ - npcs_pin = (unsigned int)spi->controller_data; -diff --git a/drivers/usb/gadget/Kconfig b/drivers/usb/gadget/Kconfig -index 767aed5..f81d08d 100644 ---- a/drivers/usb/gadget/Kconfig -+++ b/drivers/usb/gadget/Kconfig -@@ -67,6 +67,17 @@ config USB_GADGET_DEBUG_FILES - driver on a new board. Enable these files by choosing "Y" - here. If in doubt, or to conserve kernel memory, say "N". - -+config USB_GADGET_DEBUG_FS -+ boolean "Debugging information files in debugfs" -+ depends on USB_GADGET && DEBUG_FS ++config AT32_CF ++ tristate "AT32AP CompactFlash Controller" ++ depends on PCMCIA && AVR32 && PLATFORM_AT32AP + help -+ Some of the drivers in the "gadget" framework can expose -+ debugging information in files under /sys/kernel/debug/. -+ The information in these files may help when you're -+ troubleshooting or bringing up a driver on a new board. -+ Enable these files by choosing "Y" here. If in doubt, or -+ to conserve kernel memory, say "N". -+ - config USB_GADGET_SELECTED - boolean - -@@ -103,6 +114,20 @@ config USB_AMD5536UDC - default USB_GADGET - select USB_GADGET_SELECTED - -+config USB_GADGET_ATMEL_USBA -+ boolean "Atmel USBA" -+ select USB_GADGET_DUALSPEED -+ depends on AVR32 -+ help -+ USBA is the integrated high-speed USB Device controller on -+ the AT32AP700x processors from Atmel. -+ -+config USB_ATMEL_USBA -+ tristate -+ depends on USB_GADGET_ATMEL_USBA -+ default USB_GADGET -+ select USB_GADGET_SELECTED -+ - config USB_GADGET_FSL_USB2 - boolean "Freescale Highspeed USB DR Peripheral Controller" - depends on MPC834x || PPC_MPC831x -@@ -228,7 +253,6 @@ config USB_LH7A40X - default USB_GADGET - select USB_GADGET_SELECTED - -- - config USB_GADGET_OMAP - boolean "OMAP USB Device Controller" - depends on ARCH_OMAP -diff --git a/drivers/usb/gadget/Makefile b/drivers/usb/gadget/Makefile -index 1bc0f03..904e57b 100644 ---- a/drivers/usb/gadget/Makefile -+++ b/drivers/usb/gadget/Makefile -@@ -14,6 +14,7 @@ obj-$(CONFIG_USB_OMAP) += omap_udc.o - obj-$(CONFIG_USB_LH7A40X) += lh7a40x_udc.o - obj-$(CONFIG_USB_S3C2410) += s3c2410_udc.o - obj-$(CONFIG_USB_AT91) += at91_udc.o -+obj-$(CONFIG_USB_ATMEL_USBA) += atmel_usba_udc.o - obj-$(CONFIG_USB_FSL_USB2) += fsl_usb2_udc.o - obj-$(CONFIG_USB_M66592) += m66592-udc.o - -diff --git a/drivers/usb/gadget/atmel_usba_udc.c b/drivers/usb/gadget/atmel_usba_udc.c ++ Say Y here to support the CompactFlash controller on AT32 chips. ++ Or choose M to compile the driver as a module named "at32_cf". ++ + config PCCARD_NONSTATIC + tristate + +diff --git a/drivers/pcmcia/Makefile b/drivers/pcmcia/Makefile +index 6f6478b..3526fd8 100644 +--- a/drivers/pcmcia/Makefile ++++ b/drivers/pcmcia/Makefile +@@ -38,6 +38,7 @@ obj-$(CONFIG_PCMCIA_VRC4173) += vrc4173_cardu.o + obj-$(CONFIG_OMAP_CF) += omap_cf.o + obj-$(CONFIG_AT91_CF) += at91_cf.o + obj-$(CONFIG_ELECTRA_CF) += electra_cf.o ++obj-$(CONFIG_AT32_CF) += at32_cf.o + + sa11xx_core-y += soc_common.o sa11xx_base.o + pxa2xx_core-y += soc_common.o pxa2xx_base.o +diff --git a/drivers/pcmcia/at32_cf.c b/drivers/pcmcia/at32_cf.c new file mode 100644 -index 0000000..e35362d +index 0000000..010bdfd --- /dev/null -+++ b/drivers/usb/gadget/atmel_usba_udc.c -@@ -0,0 +1,2038 @@ ++++ b/drivers/pcmcia/at32_cf.c +@@ -0,0 +1,533 @@ +/* -+ * Driver for the Atmel USBA high speed USB device controller ++ * Driver for AVR32 Static Memory Controller: CompactFlash support + * -+ * Copyright (C) 2005-2007 Atmel Corporation ++ * Copyright (C) 2006 Atmel Norway + * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. ++ * This program is free software; you can redistribute it and/or ++ * modify it under the terms of the GNU General Public License as ++ * published by the Free Software Foundation; either version 2 of the ++ * License, or (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, but ++ * WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ * General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA ++ * 02111-1307, USA. ++ * ++ * The full GNU General Public License is included in this ++ * distribution in the file called COPYING. + */ -+#include <linux/clk.h> +#include <linux/module.h> ++#include <linux/kernel.h> ++#include <linux/platform_device.h> +#include <linux/init.h> -+#include <linux/interrupt.h> -+#include <linux/io.h> +#include <linux/device.h> -+#include <linux/dma-mapping.h> -+#include <linux/list.h> -+#include <linux/platform_device.h> -+#include <linux/usb/ch9.h> -+#include <linux/usb_gadget.h> +#include <linux/delay.h> ++#include <linux/interrupt.h> ++#include <linux/err.h> ++#include <linux/clk.h> ++#include <linux/dma-mapping.h> ++ ++#include <pcmcia/ss.h> + +#include <asm/gpio.h> ++#include <asm/io.h> +#include <asm/arch/board.h> + -+#include "atmel_usba_udc.h" -+ -+ -+static struct usba_udc the_udc; ++#include <asm/arch/smc.h> + -+#ifdef CONFIG_USB_GADGET_DEBUG_FS -+#include <linux/debugfs.h> -+#include <linux/uaccess.h> -+ -+static int queue_dbg_open(struct inode *inode, struct file *file) -+{ -+ struct usba_ep *ep = inode->i_private; -+ struct usba_request *req, *req_copy; -+ struct list_head *queue_data; -+ -+ queue_data = kmalloc(sizeof(*queue_data), GFP_KERNEL); -+ if (!queue_data) -+ return -ENOMEM; -+ INIT_LIST_HEAD(queue_data); -+ -+ spin_lock_irq(&ep->udc->lock); -+ list_for_each_entry(req, &ep->queue, queue) { -+ req_copy = kmalloc(sizeof(*req_copy), GFP_ATOMIC); -+ if (!req_copy) -+ goto fail; -+ memcpy(req_copy, req, sizeof(*req_copy)); -+ list_add_tail(&req_copy->queue, queue_data); -+ } -+ spin_unlock_irq(&ep->udc->lock); -+ -+ file->private_data = queue_data; -+ return 0; -+ -+fail: -+ spin_unlock_irq(&ep->udc->lock); -+ list_for_each_entry_safe(req, req_copy, queue_data, queue) { -+ list_del(&req->queue); -+ kfree(req); -+ } -+ kfree(queue_data); -+ return -ENOMEM; -+} ++struct at32_cf_socket { ++ struct pcmcia_socket socket; ++ int detect_pin; ++ int reset_pin; ++ int vcc_pin; ++ int ready_pin; ++ struct resource res_attr; ++ struct resource res_mem; ++ struct resource res_io; ++ struct smc_config smc; ++ unsigned int irq; ++ unsigned int cf_cs; ++ socket_state_t state; ++ unsigned present:1; ++}; ++#define to_at32_cf(sock) container_of(sock, struct at32_cf_socket, socket) + +/* -+ * bbbbbbbb llllllll IZS sssss nnnn FDL\n\0 ++ * We have the following memory layout relative to the base address: + * -+ * b: buffer address -+ * l: buffer length -+ * I/i: interrupt/no interrupt -+ * Z/z: zero/no zero -+ * S/s: short ok/short not ok -+ * s: status -+ * n: nr_packets -+ * F/f: submitted/not submitted to FIFO -+ * D/d: using/not using DMA -+ * L/l: last transaction/not last transaction ++ * Alt IDE Mode: 00e0 0000 -> 00ff ffff ++ * True IDE Mode: 00c0 0000 -> 00df ffff ++ * I/O memory: 0080 0000 -> 00bf ffff ++ * Common memory: 0040 0000 -> 007f ffff ++ * Attribute memory: 0000 0000 -> 003f ffff + */ -+static ssize_t queue_dbg_read(struct file *file, char __user *buf, -+ size_t nbytes, loff_t *ppos) -+{ -+ struct list_head *queue = file->private_data; -+ struct usba_request *req, *tmp_req; -+ size_t len, remaining, actual = 0; -+ char tmpbuf[38]; -+ -+ if (!access_ok(VERIFY_WRITE, buf, nbytes)) -+ return -EFAULT; -+ -+ mutex_lock(&file->f_dentry->d_inode->i_mutex); -+ list_for_each_entry_safe(req, tmp_req, queue, queue) { -+ len = snprintf(tmpbuf, sizeof(tmpbuf), -+ "%8p %08x %c%c%c %5d %c%c%c\n", -+ req->req.buf, req->req.length, -+ req->req.no_interrupt ? 'i' : 'I', -+ req->req.zero ? 'Z' : 'z', -+ req->req.short_not_ok ? 's' : 'S', -+ req->req.status, -+ req->submitted ? 'F' : 'f', -+ req->using_dma ? 'D' : 'd', -+ req->last_transaction ? 'L' : 'l'); -+ len = min(len, sizeof(tmpbuf)); -+ if (len > nbytes) -+ break; ++#define CF_ATTR_OFFSET 0x00000000 ++#define CF_MEM_OFFSET 0x00400000 ++#define CF_IO_OFFSET 0x00800000 ++#define CF_RES_SIZE 4096 + -+ list_del(&req->queue); -+ kfree(req); -+ -+ remaining = __copy_to_user(buf, tmpbuf, len); -+ actual += len - remaining; -+ if (remaining) -+ break; -+ -+ nbytes -= len; -+ buf += len; -+ } -+ mutex_unlock(&file->f_dentry->d_inode->i_mutex); ++#ifdef DEBUG + -+ return actual; -+} ++static int pc_debug; ++module_param(pc_debug, int, 0644); + -+static int queue_dbg_release(struct inode *inode, struct file *file) ++static void at32_cf_debug(struct at32_cf_socket *cf, const char *func, ++ int level, const char *fmt, ...) +{ -+ struct list_head *queue_data = file->private_data; -+ struct usba_request *req, *tmp_req; ++ va_list args; + -+ list_for_each_entry_safe(req, tmp_req, queue_data, queue) { -+ list_del(&req->queue); -+ kfree(req); ++ if (pc_debug > level) { ++ printk(KERN_DEBUG "at32_cf/%u: %s: ", cf->cf_cs, func); ++ va_start(args, fmt); ++ vprintk(fmt, args); ++ va_end(args); + } -+ kfree(queue_data); -+ return 0; +} + -+static int regs_dbg_open(struct inode *inode, struct file *file) -+{ -+ struct usba_udc *udc; -+ unsigned int i; -+ u32 *data; -+ int ret = -ENOMEM; -+ -+ mutex_lock(&inode->i_mutex); -+ udc = inode->i_private; -+ data = kmalloc(inode->i_size, GFP_KERNEL); -+ if (!data) -+ goto out; -+ -+ spin_lock_irq(&udc->lock); -+ for (i = 0; i < inode->i_size / 4; i++) -+ data[i] = __raw_readl(udc->regs + i * 4); -+ spin_unlock_irq(&udc->lock); -+ -+ file->private_data = data; -+ ret = 0; -+ -+out: -+ mutex_unlock(&inode->i_mutex); ++#define debug(cf, lvl, fmt, arg...) \ ++ at32_cf_debug(cf, __func__, lvl, fmt, ##arg) + -+ return ret; -+} ++#else ++#define debug(cf, lvl, fmt, arg...) do { } while (0) ++#endif + -+static ssize_t regs_dbg_read(struct file *file, char __user *buf, -+ size_t nbytes, loff_t *ppos) ++static inline int at32_cf_present(struct at32_cf_socket *cf) +{ -+ struct inode *inode = file->f_dentry->d_inode; -+ int ret; ++ int present = 1; + -+ mutex_lock(&inode->i_mutex); -+ ret = simple_read_from_buffer(buf, nbytes, ppos, -+ file->private_data, -+ file->f_dentry->d_inode->i_size); -+ mutex_unlock(&inode->i_mutex); ++ /* If we don't have a detect pin, assume the card is present */ ++ if (cf->detect_pin >= 0) ++ present = !gpio_get_value(cf->detect_pin); + -+ return ret; ++ return present; +} + -+static int regs_dbg_release(struct inode *inode, struct file *file) ++static irqreturn_t at32_cf_irq(int irq, void *dev_id) +{ -+ kfree(file->private_data); -+ return 0; -+} -+ -+const struct file_operations queue_dbg_fops = { -+ .owner = THIS_MODULE, -+ .open = queue_dbg_open, -+ .llseek = no_llseek, -+ .read = queue_dbg_read, -+ .release = queue_dbg_release, -+}; ++ struct at32_cf_socket *cf = dev_id; ++ unsigned int present; + -+const struct file_operations regs_dbg_fops = { -+ .owner = THIS_MODULE, -+ .open = regs_dbg_open, -+ .llseek = generic_file_llseek, -+ .read = regs_dbg_read, -+ .release = regs_dbg_release, -+}; -+ -+static void usba_ep_init_debugfs(struct usba_udc *udc, -+ struct usba_ep *ep) -+{ -+ struct dentry *ep_root; -+ -+ ep_root = debugfs_create_dir(ep->ep.name, udc->debugfs_root); -+ if (!ep_root) -+ goto err_root; -+ ep->debugfs_dir = ep_root; -+ -+ ep->debugfs_queue = debugfs_create_file("queue", 0400, ep_root, -+ ep, &queue_dbg_fops); -+ if (!ep->debugfs_queue) -+ goto err_queue; -+ -+ if (ep->can_dma) { -+ ep->debugfs_dma_status -+ = debugfs_create_u32("dma_status", 0400, ep_root, -+ &ep->last_dma_status); -+ if (!ep->debugfs_dma_status) -+ goto err_dma_status; -+ } -+ if (ep_is_control(ep)) { -+ ep->debugfs_state -+ = debugfs_create_u32("state", 0400, ep_root, -+ &ep->state); -+ if (!ep->debugfs_state) -+ goto err_state; ++ present = at32_cf_present(cf); ++ if (present != cf->present) { ++ cf->present = present; ++ debug(cf, 3, "card %s\n", present ? "present" : "gone"); ++ pcmcia_parse_events(&cf->socket, SS_DETECT); + } + -+ return; -+ -+err_state: -+ if (ep->can_dma) -+ debugfs_remove(ep->debugfs_dma_status); -+err_dma_status: -+ debugfs_remove(ep->debugfs_queue); -+err_queue: -+ debugfs_remove(ep_root); -+err_root: -+ dev_err(&ep->udc->pdev->dev, -+ "failed to create debugfs directory for %s\n", ep->ep.name); -+} -+ -+static void usba_ep_cleanup_debugfs(struct usba_ep *ep) -+{ -+ debugfs_remove(ep->debugfs_queue); -+ debugfs_remove(ep->debugfs_dma_status); -+ debugfs_remove(ep->debugfs_state); -+ debugfs_remove(ep->debugfs_dir); -+ ep->debugfs_dma_status = NULL; -+ ep->debugfs_dir = NULL; ++ return IRQ_HANDLED; +} + -+static void usba_init_debugfs(struct usba_udc *udc) ++static int at32_cf_get_status(struct pcmcia_socket *sock, u_int *value) +{ -+ struct dentry *root, *regs; -+ struct resource *regs_resource; -+ -+ root = debugfs_create_dir(udc->gadget.name, NULL); -+ if (IS_ERR(root) || !root) -+ goto err_root; -+ udc->debugfs_root = root; -+ -+ regs = debugfs_create_file("regs", 0400, root, udc, ®s_dbg_fops); -+ if (!regs) -+ goto err_regs; ++ struct at32_cf_socket *cf; ++ u_int status = 0; + -+ regs_resource = platform_get_resource(udc->pdev, IORESOURCE_MEM, -+ CTRL_IOMEM_ID); -+ regs->d_inode->i_size = regs_resource->end - regs_resource->start + 1; -+ udc->debugfs_regs = regs; ++ cf = container_of(sock, struct at32_cf_socket, socket); + -+ usba_ep_init_debugfs(udc, to_usba_ep(udc->gadget.ep0)); -+ -+ return; ++ if (at32_cf_present(cf)) { ++ /* NOTE: gpio on AP7xxx is 3.3V */ ++ status = SS_DETECT | SS_3VCARD; ++ if (cf->ready_pin < 0 || gpio_get_value(cf->ready_pin)) ++ status |= SS_READY; ++ if (cf->vcc_pin < 0 || gpio_get_value(cf->vcc_pin)) ++ status |= SS_POWERON; ++ } + -+err_regs: -+ debugfs_remove(root); -+err_root: -+ udc->debugfs_root = NULL; -+ dev_err(&udc->pdev->dev, "debugfs is not available\n"); ++ *value = status; ++ return 0; +} + -+static void usba_cleanup_debugfs(struct usba_udc *udc) -+{ -+ usba_ep_cleanup_debugfs(to_usba_ep(udc->gadget.ep0)); -+ debugfs_remove(udc->debugfs_regs); -+ debugfs_remove(udc->debugfs_root); -+ udc->debugfs_regs = NULL; -+ udc->debugfs_root = NULL; -+} -+#else -+static inline void usba_ep_init_debugfs(struct usba_udc *udc, -+ struct usba_ep *ep) ++static int at32_cf_set_socket(struct pcmcia_socket *sock, socket_state_t *state) +{ ++ struct at32_cf_socket *cf = container_of(sock, struct at32_cf_socket, socket); + -+} ++ debug(cf, 2, "mask: %s%s%s%s%s%sflags: %s%s%s%s%s%sVcc %d Vpp %d irq %d\n", ++ (state->csc_mask==0)?"<NONE> ":"", ++ (state->csc_mask&SS_DETECT)?"DETECT ":"", ++ (state->csc_mask&SS_READY)?"READY ":"", ++ (state->csc_mask&SS_BATDEAD)?"BATDEAD ":"", ++ (state->csc_mask&SS_BATWARN)?"BATWARN ":"", ++ (state->csc_mask&SS_STSCHG)?"STSCHG ":"", ++ (state->flags==0)?"<NONE> ":"", ++ (state->flags&SS_PWR_AUTO)?"PWR_AUTO ":"", ++ (state->flags&SS_IOCARD)?"IOCARD ":"", ++ (state->flags&SS_RESET)?"RESET ":"", ++ (state->flags&SS_SPKR_ENA)?"SPKR_ENA ":"", ++ (state->flags&SS_OUTPUT_ENA)?"OUTPUT_ENA ":"", ++ state->Vcc, state->Vpp, state->io_irq); + -+static inline void usba_ep_cleanup_debugfs(struct usba_ep *ep) -+{ ++ /* ++ * TODO: Allow boards to override this in case they have level ++ * converters. ++ */ ++ switch (state->Vcc) { ++ case 0: ++ if (cf->vcc_pin >= 0) ++ gpio_set_value(cf->vcc_pin, 0); ++ break; ++ case 33: ++ if (cf->vcc_pin >= 0) ++ gpio_set_value(cf->vcc_pin, 1); ++ break; ++ default: ++ return -EINVAL; ++ } + -+} ++ if (cf->reset_pin >= 0) ++ gpio_set_value(cf->reset_pin, state->flags & SS_RESET); + -+static inline void usba_init_debugfs(struct usba_udc *udc) -+{ ++ cf->state = *state; + ++ return 0; +} + -+static inline void usba_cleanup_debugfs(struct usba_udc *udc) ++static int at32_cf_socket_init(struct pcmcia_socket *sock) +{ ++ debug(to_at32_cf(sock), 2, "called\n"); + ++ return 0; +} -+#endif + -+static int vbus_is_present(struct usba_udc *udc) ++static int at32_cf_suspend(struct pcmcia_socket *sock) +{ -+ if (udc->vbus_pin != -1) -+ return gpio_get_value(udc->vbus_pin); ++ debug(to_at32_cf(sock), 2, "called\n"); + -+ /* No Vbus detection: Assume always present */ -+ return 1; -+} ++ at32_cf_set_socket(sock, &dead_socket); + -+static void copy_to_fifo(void __iomem *fifo, const void *buf, int len) -+{ -+ unsigned long tmp; -+ -+ DBG(DBG_FIFO, "copy to FIFO (len %d):\n", len); -+ for (; len > 0; len -= 4, buf += 4, fifo += 4) { -+ tmp = *(unsigned long *)buf; -+ if (len >= 4) { -+ DBG(DBG_FIFO, " -> %08lx\n", tmp); -+ __raw_writel(tmp, fifo); -+ } else { -+ do { -+ DBG(DBG_FIFO, " -> %02lx\n", tmp >> 24); -+ __raw_writeb(tmp >> 24, fifo); -+ fifo++; -+ tmp <<= 8; -+ } while (--len); -+ break; -+ } -+ } ++ return 0; +} + -+static void copy_from_fifo(void *buf, void __iomem *fifo, int len) ++static int at32_cf_set_io_map(struct pcmcia_socket *sock, ++ struct pccard_io_map *map) +{ -+ union { -+ unsigned long *w; -+ unsigned char *b; -+ } p; -+ unsigned long tmp; ++ struct at32_cf_socket *cf = container_of(sock, struct at32_cf_socket, socket); ++ int retval; + -+ DBG(DBG_FIFO, "copy from FIFO (len %d):\n", len); -+ for (p.w = buf; len > 0; len -= 4, p.w++, fifo += 4) { -+ if (len >= 4) { -+ tmp = __raw_readl(fifo); -+ *p.w = tmp; -+ DBG(DBG_FIFO, " -> %08lx\n", tmp); -+ } else { -+ do { -+ tmp = __raw_readb(fifo); -+ *p.b = tmp; -+ DBG(DBG_FIFO, " -> %02lx\n", tmp); -+ fifo++, p.b++; -+ } while (--len); -+ } -+ } -+} ++ debug(cf, 2, "map %u speed %u start 0x%08x stop 0x%08x\n", ++ map->map, map->speed, map->start, map->stop); ++ debug(cf, 2, "flags: %s%s%s%s%s%s%s%s\n", ++ (map->flags == 0) ? "<NONE>":"", ++ (map->flags & MAP_ACTIVE) ? "ACTIVE " : "", ++ (map->flags & MAP_16BIT) ? "16BIT " : "", ++ (map->flags & MAP_AUTOSZ) ? "AUTOSZ " : "", ++ (map->flags & MAP_0WS) ? "0WS " : "", ++ (map->flags & MAP_WRPROT) ? "WRPROT " : "", ++ (map->flags & MAP_USE_WAIT) ? "USE_WAIT " : "", ++ (map->flags & MAP_PREFETCH) ? "PREFETCH " : ""); ++ ++ map->flags &= MAP_ACTIVE | MAP_16BIT | MAP_USE_WAIT; ++ ++ if (map->flags & MAP_16BIT) ++ cf->smc.bus_width = 2; ++ else ++ cf->smc.bus_width = 1; + -+static void next_fifo_transaction(struct usba_ep *ep, struct usba_request *req) -+{ -+ unsigned int transaction_len; ++ if (map->flags & MAP_USE_WAIT) ++ cf->smc.nwait_mode = 3; ++ else ++ cf->smc.nwait_mode = 0; + -+ transaction_len = req->req.length - req->req.actual; -+ req->last_transaction = 1; -+ if (transaction_len > ep->ep.maxpacket) { -+ transaction_len = ep->ep.maxpacket; -+ req->last_transaction = 0; -+ } else if (transaction_len == ep->ep.maxpacket && req->req.zero) -+ req->last_transaction = 0; ++ retval = smc_set_configuration(cf->cf_cs, &cf->smc); ++ if (retval) { ++ printk(KERN_ERR "at32_cf: could not set up SMC for I/O\n"); ++ return retval; ++ } + -+ DBG(DBG_QUEUE, "%s: submit_transaction, req %p (length %d)%s\n", -+ ep->ep.name, req, transaction_len, -+ req->last_transaction ? ", done" : ""); ++ map->start = cf->socket.io_offset; ++ map->stop = map->start + CF_RES_SIZE - 1; + -+ copy_to_fifo(ep->fifo, req->req.buf + req->req.actual, transaction_len); -+ usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY); -+ req->req.actual += transaction_len; ++ return 0; +} + -+static void submit_request(struct usba_ep *ep, struct usba_request *req) ++static int ++at32_cf_set_mem_map(struct pcmcia_socket *sock, struct pccard_mem_map *map) +{ -+ DBG(DBG_QUEUE, "%s: submit_request: req %p (length %d)\n", -+ ep->ep.name, req, req->req.length); ++ struct at32_cf_socket *cf; ++ struct resource *res; ++ int retval; + -+ req->req.actual = 0; -+ req->submitted = 1; ++ cf = container_of(sock, struct at32_cf_socket, socket); ++ ++ debug(cf, 2, "map %u speed %u card_start %08x\n", ++ map->map, map->speed, map->card_start); ++ debug(cf, 2, "flags: %s%s%s%s%s%s%s%s\n", ++ (map->flags==0)?"<NONE>":"", ++ (map->flags&MAP_ACTIVE)?"ACTIVE ":"", ++ (map->flags&MAP_16BIT)?"16BIT ":"", ++ (map->flags&MAP_AUTOSZ)?"AUTOSZ ":"", ++ (map->flags&MAP_0WS)?"0WS ":"", ++ (map->flags&MAP_WRPROT)?"WRPROT ":"", ++ (map->flags&MAP_ATTRIB)?"ATTRIB ":"", ++ (map->flags&MAP_USE_WAIT)?"USE_WAIT ":""); ++ ++ if (map->card_start) ++ return -EINVAL; + -+ if (req->using_dma) { -+ if (req->req.length == 0) { -+ usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY); -+ return; -+ } ++ map->flags &= MAP_ACTIVE | MAP_ATTRIB | MAP_16BIT | MAP_USE_WAIT; + -+ if (req->req.zero) -+ usba_ep_writel(ep, CTL_ENB, USBA_SHORT_PACKET); -+ else -+ usba_ep_writel(ep, CTL_DIS, USBA_SHORT_PACKET); ++ if (map->flags & MAP_ATTRIB) { ++ res = &cf->res_attr; + -+ usba_dma_writel(ep, ADDRESS, req->req.dma); -+ usba_dma_writel(ep, CONTROL, req->ctrl); ++ /* Linksys WCF12 seems to use WAIT when reading CIS */ ++ map->flags |= MAP_USE_WAIT; + } else { -+ next_fifo_transaction(ep, req); -+ if (req->last_transaction) { -+ usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY); -+ usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE); -+ } else { -+ usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE); -+ usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY); -+ } ++ res = &cf->res_mem; + } -+} + -+static void submit_next_request(struct usba_ep *ep) -+{ -+ struct usba_request *req; ++ if (map->flags & MAP_USE_WAIT) ++ cf->smc.nwait_mode = 3; ++ else ++ cf->smc.nwait_mode = 0; + -+ if (list_empty(&ep->queue)) { -+ usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY | USBA_RX_BK_RDY); -+ return; ++ retval = smc_set_configuration(cf->cf_cs, &cf->smc); ++ if (retval) { ++ printk(KERN_ERR "at32_cf: could not set up SMC for mem\n"); ++ return retval; + } + -+ req = list_entry(ep->queue.next, struct usba_request, queue); -+ if (!req->submitted) -+ submit_request(ep, req); -+} ++ map->static_start = res->start; + -+static void send_status(struct usba_udc *udc, struct usba_ep *ep) -+{ -+ ep->state = STATUS_STAGE_IN; -+ usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY); -+ usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE); ++ return 0; +} + -+static void receive_data(struct usba_ep *ep) -+{ -+ struct usba_udc *udc = ep->udc; -+ struct usba_request *req; -+ unsigned long status; -+ unsigned int bytecount, nr_busy; -+ int is_complete = 0; -+ -+ status = usba_ep_readl(ep, STA); -+ nr_busy = USBA_BFEXT(BUSY_BANKS, status); -+ -+ DBG(DBG_QUEUE, "receive data: nr_busy=%u\n", nr_busy); -+ -+ while (nr_busy > 0) { -+ if (list_empty(&ep->queue)) { -+ usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY); -+ break; -+ } -+ req = list_entry(ep->queue.next, -+ struct usba_request, queue); -+ -+ bytecount = USBA_BFEXT(BYTE_COUNT, status); -+ -+ if (status & (1 << 31)) -+ is_complete = 1; -+ if (req->req.actual + bytecount >= req->req.length) { -+ is_complete = 1; -+ bytecount = req->req.length - req->req.actual; -+ } -+ -+ copy_from_fifo(req->req.buf + req->req.actual, -+ ep->fifo, bytecount); -+ req->req.actual += bytecount; -+ -+ usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY); -+ -+ if (is_complete) { -+ DBG(DBG_QUEUE, "%s: request done\n", ep->ep.name); -+ req->req.status = 0; -+ list_del_init(&req->queue); -+ usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY); -+ spin_unlock(&udc->lock); -+ req->req.complete(&ep->ep, &req->req); -+ spin_lock(&udc->lock); -+ } -+ -+ status = usba_ep_readl(ep, STA); -+ nr_busy = USBA_BFEXT(BUSY_BANKS, status); -+ -+ if (is_complete && ep_is_control(ep)) { -+ send_status(udc, ep); -+ break; -+ } -+ } -+} ++static struct pccard_operations at32_cf_ops = { ++ .init = at32_cf_socket_init, ++ .suspend = at32_cf_suspend, ++ .get_status = at32_cf_get_status, ++ .set_socket = at32_cf_set_socket, ++ .set_io_map = at32_cf_set_io_map, ++ .set_mem_map = at32_cf_set_mem_map, ++}; + -+static void -+request_complete(struct usba_ep *ep, struct usba_request *req, int status) ++static int __init request_pin(struct platform_device *pdev, ++ unsigned int pin, const char *name) +{ -+ struct usba_udc *udc = ep->udc; -+ -+ WARN_ON(!list_empty(&req->queue)); -+ -+ if (req->req.status == -EINPROGRESS) -+ req->req.status = status; -+ -+ if (req->mapped) { -+ dma_unmap_single( -+ &udc->pdev->dev, req->req.dma, req->req.length, -+ ep->is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE); -+ req->req.dma = DMA_ADDR_INVALID; -+ req->mapped = 0; ++ if (gpio_request(pin, name)) { ++ dev_warn(&pdev->dev, "failed to request %s pin\n", name); ++ return -1; + } + -+ DBG(DBG_GADGET | DBG_REQ, -+ "%s: req %p complete: status %d, actual %u\n", -+ ep->ep.name, req, req->req.status, req->req.actual); -+ -+ spin_unlock(&udc->lock); -+ req->req.complete(&ep->ep, &req->req); -+ spin_lock(&udc->lock); ++ return pin; +} + -+static void -+request_complete_list(struct usba_ep *ep, struct list_head *list, int status) -+{ -+ struct usba_request *req, *tmp_req; ++static struct smc_timing at32_cf_timing __initdata = { ++ .ncs_read_setup = 30, ++ .nrd_setup = 100, ++ .ncs_write_setup = 30, ++ .nwe_setup = 100, + -+ list_for_each_entry_safe(req, tmp_req, list, queue) { -+ list_del_init(&req->queue); -+ request_complete(ep, req, status); -+ } -+} ++ .ncs_read_pulse = 360, ++ .nrd_pulse = 290, ++ .ncs_write_pulse = 360, ++ .nwe_pulse = 290, + -+static int -+usba_ep_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc) -+{ -+ struct usba_ep *ep = to_usba_ep(_ep); -+ struct usba_udc *udc = ep->udc; -+ unsigned long flags, ept_cfg, maxpacket; -+ unsigned int nr_trans; -+ -+ DBG(DBG_GADGET, "%s: ep_enable: desc=%p\n", ep->ep.name, desc); -+ -+ maxpacket = le16_to_cpu(desc->wMaxPacketSize) & 0x7ff; ++ .read_cycle = 420, ++ .write_cycle = 420, ++}; + -+ if (((desc->bEndpointAddress & USB_ENDPOINT_NUMBER_MASK) != ep->index) -+ || ep->index == 0 -+ || desc->bDescriptorType != USB_DT_ENDPOINT -+ || maxpacket == 0 -+ || maxpacket > ep->fifo_size) { -+ DBG(DBG_ERR, "ep_enable: Invalid argument"); -+ return -EINVAL; -+ } ++static int __init at32_cf_probe(struct platform_device *pdev) ++{ ++ struct at32_cf_socket *cf; ++ struct cf_platform_data *board = pdev->dev.platform_data; ++ struct resource *res_skt; ++ int irq; ++ int ret; + -+ ep->is_isoc = 0; -+ ep->is_in = 0; ++ dev_dbg(&pdev->dev, "probe"); + -+ if (maxpacket <= 8) -+ ept_cfg = USBA_BF(EPT_SIZE, USBA_EPT_SIZE_8); -+ else -+ /* LSB is bit 1, not 0 */ -+ ept_cfg = USBA_BF(EPT_SIZE, fls(maxpacket - 1) - 3); ++ if (!board) ++ return -ENXIO; + -+ DBG(DBG_HW, "%s: EPT_SIZE = %lu (maxpacket = %lu)\n", -+ ep->ep.name, ept_cfg, maxpacket); ++ res_skt = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ if (!res_skt) ++ return -ENXIO; + -+ if ((desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK) == USB_DIR_IN) { -+ ep->is_in = 1; -+ ept_cfg |= USBA_EPT_DIR_IN; -+ } ++ irq = platform_get_irq(pdev, 0); ++ if (irq < 0) ++ return irq; + -+ switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) { -+ case USB_ENDPOINT_XFER_CONTROL: -+ ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL); -+ ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE); -+ break; -+ case USB_ENDPOINT_XFER_ISOC: -+ if (!ep->can_isoc) { -+ DBG(DBG_ERR, "ep_enable: %s is not isoc capable\n", -+ ep->ep.name); -+ return -EINVAL; -+ } ++ cf = kzalloc(sizeof(struct at32_cf_socket), GFP_KERNEL); ++ if (!cf) ++ return -ENOMEM; + -+ /* -+ * Bits 11:12 specify number of _additional_ -+ * transactions per microframe. -+ */ -+ nr_trans = ((le16_to_cpu(desc->wMaxPacketSize) >> 11) & 3) + 1; -+ if (nr_trans > 3) -+ return -EINVAL; ++ cf->detect_pin = -1; ++ cf->reset_pin = -1; ++ cf->vcc_pin = -1; ++ cf->ready_pin = -1; ++ cf->cf_cs = board->cs; ++ ++ if (board->detect_pin != GPIO_PIN_NONE) ++ cf->detect_pin = request_pin(pdev, board->detect_pin, ++ "cf_detect"); ++ if (board->reset_pin != GPIO_PIN_NONE) ++ cf->reset_pin = request_pin(pdev, board->reset_pin, ++ "cf_reset"); ++ if (board->vcc_pin != GPIO_PIN_NONE) ++ cf->vcc_pin = request_pin(pdev, board->vcc_pin, ++ "cf_vcc"); ++ if (board->ready_pin != GPIO_PIN_NONE) ++ /* READY is also used for irq through EIM */ ++ cf->ready_pin = board->ready_pin; ++ ++ debug(cf, 2, "pins: detect=%d reset=%d vcc=%d\n", ++ cf->detect_pin, cf->reset_pin, cf->vcc_pin); ++ ++ cf->socket.pci_irq = irq; ++ cf->socket.ops = &at32_cf_ops; ++ cf->socket.resource_ops = &pccard_static_ops; ++ cf->socket.dev.parent = &pdev->dev; ++ cf->socket.owner = THIS_MODULE; ++ cf->socket.features = ++ SS_CAP_MEM_ALIGN | SS_CAP_STATIC_MAP | SS_CAP_PCCARD; ++ cf->socket.map_size = CF_RES_SIZE; ++ ++ cf->res_attr.start = res_skt->start + CF_ATTR_OFFSET; ++ cf->res_attr.end = cf->res_attr.start + CF_RES_SIZE - 1; ++ cf->res_attr.name = "attribute"; ++ cf->res_attr.flags = IORESOURCE_MEM; ++ ret = request_resource(res_skt, &cf->res_attr); ++ if (ret) ++ goto err_request_res_attr; + -+ ep->is_isoc = 1; -+ ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_ISO); ++ cf->res_mem.start = res_skt->start + CF_MEM_OFFSET; ++ cf->res_mem.end = cf->res_mem.start + CF_RES_SIZE - 1; ++ cf->res_mem.name = "memory"; ++ cf->res_mem.flags = IORESOURCE_MEM; ++ ret = request_resource(res_skt, &cf->res_mem); ++ if (ret) ++ goto err_request_res_mem; + -+ /* -+ * Do triple-buffering on high-bandwidth iso endpoints. -+ */ -+ if (nr_trans > 1 && ep->nr_banks == 3) -+ ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_TRIPLE); -+ else -+ ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE); -+ ept_cfg |= USBA_BF(NB_TRANS, nr_trans); -+ break; -+ case USB_ENDPOINT_XFER_BULK: -+ ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK); -+ ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE); -+ break; -+ case USB_ENDPOINT_XFER_INT: -+ ept_cfg |= USBA_BF(EPT_TYPE, USBA_EPT_TYPE_INT); -+ ept_cfg |= USBA_BF(BK_NUMBER, USBA_BK_NUMBER_DOUBLE); -+ break; -+ } ++ cf->res_io.start = res_skt->start + CF_IO_OFFSET; ++ cf->res_io.end = cf->res_io.start + CF_RES_SIZE - 1; ++ cf->res_io.name = "io"; ++ cf->res_io.flags = IORESOURCE_MEM; ++ ret = request_resource(res_skt, &cf->res_io); ++ if (ret) ++ goto err_request_res_io; + -+ spin_lock_irqsave(&ep->udc->lock, flags); ++ cf->socket.io_offset = cf->res_io.start; + -+ if (ep->desc) { -+ spin_unlock_irqrestore(&ep->udc->lock, flags); -+ DBG(DBG_ERR, "ep%d already enabled\n", ep->index); -+ return -EBUSY; ++ if (cf->detect_pin >= 0) { ++ ret = request_irq(gpio_to_irq(cf->detect_pin), at32_cf_irq, ++ IRQF_SHARED, "cf_detect", cf); ++ if (ret) { ++ debug(cf, 1, ++ "failed to request cf_detect interrupt\n"); ++ goto err_detect_irq; ++ } + } + -+ ep->desc = desc; -+ ep->ep.maxpacket = maxpacket; ++ cf->present = at32_cf_present(cf); + -+ usba_ep_writel(ep, CFG, ept_cfg); -+ usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE); ++ /* Setup SMC timings */ ++ smc_set_timing(&cf->smc, &at32_cf_timing); + -+ if (ep->can_dma) { -+ u32 ctrl; ++ cf->smc.bus_width = 2; ++ cf->smc.nrd_controlled = 1; ++ cf->smc.nwe_controlled = 1; ++ cf->smc.nwait_mode = 0; ++ cf->smc.byte_write = 0; ++ cf->smc.tdf_cycles = 8; ++ cf->smc.tdf_mode = 0; + -+ usba_writel(udc, INT_ENB, -+ (usba_readl(udc, INT_ENB) -+ | USBA_BF(EPT_INT, 1 << ep->index) -+ | USBA_BF(DMA_INT, 1 << ep->index))); -+ ctrl = USBA_AUTO_VALID | USBA_INTDIS_DMA; -+ usba_ep_writel(ep, CTL_ENB, ctrl); -+ } else { -+ usba_writel(udc, INT_ENB, -+ (usba_readl(udc, INT_ENB) -+ | USBA_BF(EPT_INT, 1 << ep->index))); ++ ret = smc_set_configuration(cf->cf_cs, &cf->smc); ++ if (ret) { ++ debug(cf, 1, "failed to configure SMC\n", ret); ++ goto err_smc; + } + -+ spin_unlock_irqrestore(&udc->lock, flags); -+ -+ DBG(DBG_HW, "EPT_CFG%d after init: %#08lx\n", ep->index, -+ (unsigned long)usba_ep_readl(ep, CFG)); -+ DBG(DBG_HW, "INT_ENB after init: %#08lx\n", -+ (unsigned long)usba_readl(udc, INT_ENB)); -+ -+ return 0; -+} -+ -+static int usba_ep_disable(struct usb_ep *_ep) -+{ -+ struct usba_ep *ep = to_usba_ep(_ep); -+ struct usba_udc *udc = ep->udc; -+ LIST_HEAD(req_list); -+ unsigned long flags; -+ -+ DBG(DBG_GADGET, "ep_disable: %s\n", ep->ep.name); -+ -+ spin_lock_irqsave(&udc->lock, flags); -+ -+ if (!ep->desc) { -+ spin_unlock_irqrestore(&udc->lock, flags); -+ DBG(DBG_ERR, "ep_disable: %s not enabled\n", ep->ep.name); -+ return -EINVAL; ++ ret = pcmcia_register_socket(&cf->socket); ++ if (ret) { ++ debug(cf, 1, "failed to register socket: %d\n", ret); ++ goto err_register_socket; + } -+ ep->desc = NULL; + -+ list_splice_init(&ep->queue, &req_list); -+ if (ep->can_dma) { -+ usba_dma_writel(ep, CONTROL, 0); -+ usba_dma_writel(ep, ADDRESS, 0); -+ usba_dma_readl(ep, STATUS); -+ } -+ usba_ep_writel(ep, CTL_DIS, USBA_EPT_ENABLE); -+ usba_writel(udc, INT_ENB, -+ usba_readl(udc, INT_ENB) -+ & ~USBA_BF(EPT_INT, 1 << ep->index)); ++ if (cf->reset_pin >= 0) ++ gpio_direction_output(cf->reset_pin, 0); + -+ request_complete_list(ep, &req_list, -ESHUTDOWN); ++ platform_set_drvdata(pdev, cf); + -+ spin_unlock_irqrestore(&udc->lock, flags); ++ dev_info(&pdev->dev, "Atmel SMC CF interface at 0x%08lx\n", ++ (unsigned long)res_skt->start); + + return 0; -+} -+ -+static struct usb_request * -+usba_ep_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags) -+{ -+ struct usba_request *req; -+ -+ DBG(DBG_GADGET, "ep_alloc_request: %p, 0x%x\n", _ep, gfp_flags); + -+ req = kzalloc(sizeof(*req), gfp_flags); -+ if (!req) -+ return NULL; -+ -+ INIT_LIST_HEAD(&req->queue); -+ req->req.dma = DMA_ADDR_INVALID; ++err_register_socket: ++err_smc: ++ if (cf->detect_pin >= 0) ++ free_irq(gpio_to_irq(cf->detect_pin), cf); ++err_detect_irq: ++ release_resource(&cf->res_io); ++err_request_res_io: ++ release_resource(&cf->res_mem); ++err_request_res_mem: ++ release_resource(&cf->res_attr); ++err_request_res_attr: ++ if (cf->vcc_pin >= 0) ++ gpio_free(cf->vcc_pin); ++ if (cf->reset_pin >= 0) ++ gpio_free(cf->reset_pin); ++ if (cf->detect_pin >= 0) ++ gpio_free(cf->detect_pin); ++ kfree(cf); + -+ return &req->req; -+} -+ -+static void -+usba_ep_free_request(struct usb_ep *_ep, struct usb_request *_req) -+{ -+ struct usba_request *req = to_usba_req(_req); -+ -+ DBG(DBG_GADGET, "ep_free_request: %p, %p\n", _ep, _req); -+ -+ kfree(req); ++ return ret; +} + -+static int queue_dma(struct usba_udc *udc, struct usba_ep *ep, -+ struct usba_request *req, gfp_t gfp_flags) ++static int __exit at32_cf_remove(struct platform_device *pdev) +{ -+ unsigned long flags; -+ int ret; -+ -+ DBG(DBG_DMA, "%s: req l/%u d/%08x %c%c%c\n", -+ ep->ep.name, req->req.length, req->req.dma, -+ req->req.zero ? 'Z' : 'z', -+ req->req.short_not_ok ? 'S' : 's', -+ req->req.no_interrupt ? 'I' : 'i'); -+ -+ if (req->req.length > 0x10000) { -+ /* Lengths from 0 to 65536 (inclusive) are supported */ -+ DBG(DBG_ERR, "invalid request length %u\n", req->req.length); -+ return -EINVAL; -+ } -+ -+ req->using_dma = 1; ++ struct at32_cf_socket *cf = platform_get_drvdata(pdev); + -+ if (req->req.dma == DMA_ADDR_INVALID) { -+ req->req.dma = dma_map_single( -+ &udc->pdev->dev, req->req.buf, req->req.length, -+ ep->is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE); -+ req->mapped = 1; -+ } else { -+ dma_sync_single_for_device( -+ &udc->pdev->dev, req->req.dma, req->req.length, -+ ep->is_in ? DMA_TO_DEVICE : DMA_FROM_DEVICE); -+ req->mapped = 0; ++ pcmcia_unregister_socket(&cf->socket); ++ if (cf->detect_pin >= 0) { ++ free_irq(gpio_to_irq(cf->detect_pin), cf); ++ gpio_free(cf->detect_pin); + } ++ if (cf->vcc_pin >= 0) ++ gpio_free(cf->vcc_pin); ++ if (cf->reset_pin >= 0) ++ gpio_free(cf->reset_pin); ++ ++ release_resource(&cf->res_io); ++ release_resource(&cf->res_mem); ++ release_resource(&cf->res_attr); ++ kfree(cf); ++ platform_set_drvdata(pdev, NULL); + -+ req->ctrl = USBA_BF(DMA_BUF_LEN, req->req.length) -+ | USBA_DMA_CH_EN | USBA_DMA_END_BUF_IE -+ | USBA_DMA_END_TR_EN | USBA_DMA_END_TR_IE; -+ -+ if (ep->is_in) -+ req->ctrl |= USBA_DMA_END_BUF_EN; -+ -+ /* -+ * Add this request to the queue and submit for DMA if -+ * possible. Check if we're still alive first -- we may have -+ * received a reset since last time we checked. -+ */ -+ ret = -ESHUTDOWN; -+ spin_lock_irqsave(&udc->lock, flags); -+ if (ep->desc) { -+ if (list_empty(&ep->queue)) -+ submit_request(ep, req); -+ -+ list_add_tail(&req->queue, &ep->queue); -+ ret = 0; -+ } -+ spin_unlock_irqrestore(&udc->lock, flags); -+ -+ return ret; ++ return 0; +} + -+static int -+usba_ep_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags) ++static struct platform_driver at32_cf_driver = { ++ .remove = __exit_p(at32_cf_remove), ++ .driver = { ++ .name = "at32_cf", ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++static int __init at32_cf_init(void) +{ -+ struct usba_request *req = to_usba_req(_req); -+ struct usba_ep *ep = to_usba_ep(_ep); -+ struct usba_udc *udc = ep->udc; -+ unsigned long flags; + int ret; + -+ DBG(DBG_GADGET | DBG_QUEUE | DBG_REQ, "%s: queue req %p, len %u\n", -+ ep->ep.name, req, _req->length); -+ -+ if (!udc->driver || udc->gadget.speed == USB_SPEED_UNKNOWN || !ep->desc) -+ return -ESHUTDOWN; -+ -+ req->submitted = 0; -+ req->using_dma = 0; -+ req->last_transaction = 0; -+ -+ _req->status = -EINPROGRESS; -+ _req->actual = 0; -+ -+ if (ep->can_dma) -+ return queue_dma(udc, ep, req, gfp_flags); -+ -+ /* May have received a reset since last time we checked */ -+ ret = -ESHUTDOWN; -+ spin_lock_irqsave(&udc->lock, flags); -+ if (ep->desc) { -+ list_add_tail(&req->queue, &ep->queue); -+ -+ if (ep->is_in || (ep_is_control(ep) -+ && (ep->state == DATA_STAGE_IN -+ || ep->state == STATUS_STAGE_IN))) -+ usba_ep_writel(ep, CTL_ENB, USBA_TX_PK_RDY); -+ else -+ usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY); -+ ret = 0; -+ } -+ spin_unlock_irqrestore(&udc->lock, flags); -+ ++ ret = platform_driver_probe(&at32_cf_driver, at32_cf_probe); ++ if (ret) ++ printk(KERN_ERR "at32_cf: probe failed: %d\n", ret); + return ret; +} + -+static void -+usba_update_req(struct usba_ep *ep, struct usba_request *req, u32 status) ++static void __exit at32_cf_exit(void) +{ -+ req->req.actual = req->req.length - USBA_BFEXT(DMA_BUF_LEN, status); ++ platform_driver_unregister(&at32_cf_driver); +} + -+static int stop_dma(struct usba_ep *ep, u32 *pstatus) -+{ -+ unsigned int timeout; -+ u32 status; ++module_init(at32_cf_init); ++module_exit(at32_cf_exit); + -+ /* -+ * Stop the DMA controller. When writing both CH_EN -+ * and LINK to 0, the other bits are not affected. -+ */ -+ usba_dma_writel(ep, CONTROL, 0); -+ -+ /* Wait for the FIFO to empty */ -+ for (timeout = 40; timeout; --timeout) { -+ status = usba_dma_readl(ep, STATUS); -+ if (!(status & USBA_DMA_CH_EN)) -+ break; -+ udelay(1); -+ } -+ -+ if (pstatus) -+ *pstatus = status; -+ -+ if (timeout == 0) { -+ dev_err(&ep->udc->pdev->dev, -+ "%s: timed out waiting for DMA FIFO to empty\n", -+ ep->ep.name); -+ return -ETIMEDOUT; -+ } -+ -+ return 0; -+} -+ -+static int usba_ep_dequeue(struct usb_ep *_ep, struct usb_request *_req) -+{ -+ struct usba_ep *ep = to_usba_ep(_ep); -+ struct usba_udc *udc = ep->udc; -+ struct usba_request *req = to_usba_req(_req); -+ unsigned long flags; -+ u32 status; -+ -+ DBG(DBG_GADGET | DBG_QUEUE, "ep_dequeue: %s, req %p\n", -+ ep->ep.name, req); -+ -+ spin_lock_irqsave(&udc->lock, flags); ++MODULE_LICENSE("GPL"); ++MODULE_DESCRIPTION("Driver for SMC PCMCIA interface"); ++MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>"); +diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig +index d7e1996..67bfbb0 100644 +--- a/drivers/serial/Kconfig ++++ b/drivers/serial/Kconfig +@@ -380,6 +380,21 @@ config SERIAL_ATMEL_CONSOLE + console is the device which receives all kernel messages and + warnings and which allows logins in single user mode). + ++config SERIAL_ATMEL_PDC ++ bool "Support DMA transfers on AT91 / AT32 serial port" ++ depends on SERIAL_ATMEL ++ default y ++ help ++ Say Y here if you wish to use the PDC to do DMA transfers to ++ and from the Atmel AT91 / AT32 serial port. In order to ++ actually use DMA transfers, make sure that the use_dma_tx ++ and use_dma_rx members in the atmel_uart_data struct is set ++ appropriately for each port. ++ ++ Note that break and error handling currently doesn't work ++ properly when DMA is enabled. Make sure that ports where ++ this matters don't use DMA. ++ + config SERIAL_ATMEL_TTYAT + bool "Install as device ttyATn instead of ttySn" + depends on SERIAL_ATMEL=y +diff --git a/drivers/serial/atmel_serial.c b/drivers/serial/atmel_serial.c +index 111da57..477950f 100644 +--- a/drivers/serial/atmel_serial.c ++++ b/drivers/serial/atmel_serial.c +@@ -7,6 +7,8 @@ + * Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd. + * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o. + * ++ * DMA support added by Chip Coldwell. ++ * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or +@@ -33,6 +35,7 @@ + #include <linux/sysrq.h> + #include <linux/tty_flip.h> + #include <linux/platform_device.h> ++#include <linux/dma-mapping.h> + #include <linux/atmel_pdc.h> + + #include <asm/io.h> +@@ -47,6 +50,10 @@ + + #include "atmel_serial.h" + ++#define PDC_BUFFER_SIZE 512 ++/* Revisit: We should calculate this based on the actual port settings */ ++#define PDC_RX_TIMEOUT (3 * 10) /* 3 bytes */ + -+ if (req->using_dma) { -+ /* -+ * If this request is currently being transferred, -+ * stop the DMA controller and reset the FIFO. -+ */ -+ if (ep->queue.next == &req->queue) { -+ status = usba_dma_readl(ep, STATUS); -+ if (status & USBA_DMA_CH_EN) -+ stop_dma(ep, &status); + #if defined(CONFIG_SERIAL_ATMEL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) + #define SUPPORT_SYSRQ + #endif +@@ -74,6 +81,7 @@ + + #define ATMEL_ISR_PASS_LIMIT 256 + ++/* UART registers. CR is write-only, hence no GET macro */ + #define UART_PUT_CR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_CR) + #define UART_GET_MR(port) __raw_readl((port)->membase + ATMEL_US_MR) + #define UART_PUT_MR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_MR) +@@ -87,8 +95,6 @@ + #define UART_PUT_BRGR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_BRGR) + #define UART_PUT_RTOR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_RTOR) + +-// #define UART_GET_CR(port) __raw_readl((port)->membase + ATMEL_US_CR) // is write-only +- + /* PDC registers */ + #define UART_PUT_PTCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR) + #define UART_GET_PTSR(port) __raw_readl((port)->membase + ATMEL_PDC_PTSR) +@@ -101,12 +107,24 @@ + + #define UART_PUT_TPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TPR) + #define UART_PUT_TCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TCR) +-//#define UART_PUT_TNPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TNPR) +-//#define UART_PUT_TNCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TNCR) + + static int (*atmel_open_hook)(struct uart_port *); + static void (*atmel_close_hook)(struct uart_port *); + ++struct atmel_dma_buffer { ++ unsigned char *buf; ++ dma_addr_t dma_addr; ++ unsigned int dma_size; ++ unsigned int ofs; ++}; + -+#ifdef CONFIG_USB_GADGET_DEBUG_FS -+ ep->last_dma_status = status; -+#endif ++struct atmel_uart_char { ++ u16 status; ++ u16 ch; ++}; + -+ usba_writel(udc, EPT_RST, 1 << ep->index); ++#define ATMEL_SERIAL_RINGSIZE 1024 + -+ usba_update_req(ep, req, status); -+ } -+ } + /* + * We wrap our port structure around the generic uart_port. + */ +@@ -115,6 +133,19 @@ struct atmel_uart_port { + struct clk *clk; /* uart clock */ + unsigned short suspended; /* is port suspended? */ + int break_active; /* break being received */ + -+ /* -+ * Errors should stop the queue from advancing until the -+ * completion function returns. -+ */ -+ list_del_init(&req->queue); ++ short use_dma_rx; /* enable PDC receiver */ ++ short pdc_rx_idx; /* current PDC RX buffer */ ++ struct atmel_dma_buffer pdc_rx[2]; /* PDC receier */ + -+ request_complete(ep, req, -ECONNRESET); ++ short use_dma_tx; /* enable PDC transmitter */ ++ struct atmel_dma_buffer pdc_tx; /* PDC transmitter */ + -+ /* Process the next request if any */ -+ submit_next_request(ep); -+ spin_unlock_irqrestore(&udc->lock, flags); ++ struct tasklet_struct tasklet; ++ unsigned int irq_status; ++ unsigned int irq_status_prev; + -+ return 0; ++ struct circ_buf rx_ring; + }; + + static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART]; +@@ -123,6 +154,38 @@ static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART]; + static struct console atmel_console; + #endif + ++static inline struct atmel_uart_port * ++to_atmel_uart_port(struct uart_port *uart) ++{ ++ return container_of(uart, struct atmel_uart_port, uart); +} + -+static int usba_ep_set_halt(struct usb_ep *_ep, int value) ++#ifdef CONFIG_SERIAL_ATMEL_PDC ++static bool atmel_use_dma_rx(struct uart_port *port) +{ -+ struct usba_ep *ep = to_usba_ep(_ep); -+ struct usba_udc *udc = ep->udc; -+ unsigned long flags; -+ int ret = 0; -+ -+ DBG(DBG_GADGET, "endpoint %s: %s HALT\n", ep->ep.name, -+ value ? "set" : "clear"); ++ struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); + -+ if (!ep->desc) { -+ DBG(DBG_ERR, "Attempted to halt uninitialized ep %s\n", -+ ep->ep.name); -+ return -ENODEV; -+ } -+ if (ep->is_isoc) { -+ DBG(DBG_ERR, "Attempted to halt isochronous ep %s\n", -+ ep->ep.name); -+ return -ENOTTY; -+ } -+ -+ spin_lock_irqsave(&udc->lock, flags); -+ -+ /* -+ * We can't halt IN endpoints while there are still data to be -+ * transferred -+ */ -+ if (!list_empty(&ep->queue) -+ || ((value && ep->is_in && (usba_ep_readl(ep, STA) -+ & USBA_BF(BUSY_BANKS, -1L))))) { -+ ret = -EAGAIN; -+ } else { -+ if (value) -+ usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL); -+ else -+ usba_ep_writel(ep, CLR_STA, -+ USBA_FORCE_STALL | USBA_TOGGLE_CLR); -+ usba_ep_readl(ep, STA); -+ } -+ -+ spin_unlock_irqrestore(&udc->lock, flags); -+ -+ return ret; ++ return atmel_port->use_dma_rx; +} + -+static int usba_ep_fifo_status(struct usb_ep *_ep) ++static bool atmel_use_dma_tx(struct uart_port *port) +{ -+ struct usba_ep *ep = to_usba_ep(_ep); ++ struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); + -+ return USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA)); ++ return atmel_port->use_dma_tx; +} -+ -+static void usba_ep_fifo_flush(struct usb_ep *_ep) ++#else ++static bool atmel_use_dma_rx(struct uart_port *port) +{ -+ struct usba_ep *ep = to_usba_ep(_ep); -+ struct usba_udc *udc = ep->udc; -+ -+ usba_writel(udc, EPT_RST, 1 << ep->index); ++ return false; +} + -+static const struct usb_ep_ops usba_ep_ops = { -+ .enable = usba_ep_enable, -+ .disable = usba_ep_disable, -+ .alloc_request = usba_ep_alloc_request, -+ .free_request = usba_ep_free_request, -+ .queue = usba_ep_queue, -+ .dequeue = usba_ep_dequeue, -+ .set_halt = usba_ep_set_halt, -+ .fifo_status = usba_ep_fifo_status, -+ .fifo_flush = usba_ep_fifo_flush, -+}; -+ -+static int usba_udc_get_frame(struct usb_gadget *gadget) ++static bool atmel_use_dma_tx(struct uart_port *port) +{ -+ struct usba_udc *udc = to_usba_udc(gadget); -+ -+ return USBA_BFEXT(FRAME_NUMBER, usba_readl(udc, FNUM)); ++ return false; +} ++#endif + -+static const struct usb_gadget_ops usba_udc_ops = { -+ .get_frame = usba_udc_get_frame, -+}; -+ -+#define EP(nam, idx, maxpkt, maxbk, dma, isoc) \ -+{ \ -+ .ep = { \ -+ .ops = &usba_ep_ops, \ -+ .name = nam, \ -+ .maxpacket = maxpkt, \ -+ }, \ -+ .udc = &the_udc, \ -+ .queue = LIST_HEAD_INIT(usba_ep[idx].queue), \ -+ .fifo_size = maxpkt, \ -+ .nr_banks = maxbk, \ -+ .index = idx, \ -+ .can_dma = dma, \ -+ .can_isoc = isoc, \ -+} -+ -+static struct usba_ep usba_ep[] = { -+ EP("ep0", 0, 64, 1, 0, 0), -+ EP("ep1in-bulk", 1, 512, 2, 1, 1), -+ EP("ep2out-bulk", 2, 512, 2, 1, 1), -+ EP("ep3in-int", 3, 64, 3, 1, 0), -+ EP("ep4out-int", 4, 64, 3, 1, 0), -+ EP("ep5in-iso", 5, 1024, 3, 1, 1), -+ EP("ep6out-iso", 6, 1024, 3, 1, 1), -+}; -+#undef EP -+ -+static struct usb_endpoint_descriptor usba_ep0_desc = { -+ .bLength = USB_DT_ENDPOINT_SIZE, -+ .bDescriptorType = USB_DT_ENDPOINT, -+ .bEndpointAddress = 0, -+ .bmAttributes = USB_ENDPOINT_XFER_CONTROL, -+ .wMaxPacketSize = __constant_cpu_to_le16(64), -+ /* FIXME: I have no idea what to put here */ -+ .bInterval = 1, -+}; -+ -+static void nop_release(struct device *dev) -+{ -+ -+} -+ -+static struct usba_udc the_udc = { -+ .gadget = { -+ .ops = &usba_udc_ops, -+ .ep0 = &usba_ep[0].ep, -+ .ep_list = LIST_HEAD_INIT(the_udc.gadget.ep_list), -+ .is_dualspeed = 1, -+ .name = "atmel_usba_udc", -+ .dev = { -+ .bus_id = "gadget", -+ .release = nop_release, -+ }, -+ }, -+ -+ .lock = SPIN_LOCK_UNLOCKED, -+}; + /* + * Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty. + */ +@@ -142,8 +205,8 @@ static void atmel_set_mctrl(struct uart_port *port, u_int mctrl) + #ifdef CONFIG_ARCH_AT91RM9200 + if (cpu_is_at91rm9200()) { + /* +- * AT91RM9200 Errata #39: RTS0 is not internally connected to PA21. +- * We need to drive the pin manually. ++ * AT91RM9200 Errata #39: RTS0 is not internally connected ++ * to PA21. We need to drive the pin manually. + */ + if (port->mapbase == AT91RM9200_BASE_US0) { + if (mctrl & TIOCM_RTS) +@@ -204,7 +267,12 @@ static u_int atmel_get_mctrl(struct uart_port *port) + */ + static void atmel_stop_tx(struct uart_port *port) + { +- UART_PUT_IDR(port, ATMEL_US_TXRDY); ++ if (atmel_use_dma_tx(port)) { ++ /* disable PDC transmit */ ++ UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS); ++ UART_PUT_IDR(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE); ++ } else ++ UART_PUT_IDR(port, ATMEL_US_TXRDY); + } + + /* +@@ -212,7 +280,17 @@ static void atmel_stop_tx(struct uart_port *port) + */ + static void atmel_start_tx(struct uart_port *port) + { +- UART_PUT_IER(port, ATMEL_US_TXRDY); ++ if (atmel_use_dma_tx(port)) { ++ if (UART_GET_PTSR(port) & ATMEL_PDC_TXTEN) ++ /* The transmitter is already running. Yes, we ++ really need this.*/ ++ return; + -+/* -+ * Called with interrupts disabled and udc->lock held. ++ UART_PUT_IER(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE); ++ /* re-enable PDC transmit */ ++ UART_PUT_PTCR(port, ATMEL_PDC_TXTEN); ++ } else ++ UART_PUT_IER(port, ATMEL_US_TXRDY); + } + + /* +@@ -220,7 +298,12 @@ static void atmel_start_tx(struct uart_port *port) + */ + static void atmel_stop_rx(struct uart_port *port) + { +- UART_PUT_IDR(port, ATMEL_US_RXRDY); ++ if (atmel_use_dma_rx(port)) { ++ /* disable PDC receive */ ++ UART_PUT_PTCR(port, ATMEL_PDC_RXTDIS); ++ UART_PUT_IDR(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT); ++ } else ++ UART_PUT_IDR(port, ATMEL_US_RXRDY); + } + + /* +@@ -228,7 +311,8 @@ static void atmel_stop_rx(struct uart_port *port) + */ + static void atmel_enable_ms(struct uart_port *port) + { +- UART_PUT_IER(port, ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC | ATMEL_US_CTSIC); ++ UART_PUT_IER(port, ATMEL_US_RIIC | ATMEL_US_DSRIC ++ | ATMEL_US_DCDIC | ATMEL_US_CTSIC); + } + + /* +@@ -243,22 +327,63 @@ static void atmel_break_ctl(struct uart_port *port, int break_state) + } + + /* ++ * Stores the incoming character in the ring buffer + */ -+static void reset_all_endpoints(struct usba_udc *udc) -+{ -+ struct usba_ep *ep; -+ struct usba_request *req, *tmp_req; -+ -+ usba_writel(udc, EPT_RST, ~0UL); -+ -+ ep = to_usba_ep(udc->gadget.ep0); -+ list_for_each_entry_safe(req, tmp_req, &ep->queue, queue) { -+ list_del_init(&req->queue); -+ request_complete(ep, req, -ECONNRESET); -+ } -+ -+ list_for_each_entry(ep, &udc->gadget.ep_list, ep.ep_list) { -+ if (ep->desc) -+ usba_ep_disable(&ep->ep); -+ } -+} -+ -+static struct usba_ep *get_ep_by_addr(struct usba_udc *udc, u16 wIndex) ++static void ++atmel_buffer_rx_char(struct uart_port *port, unsigned int status, ++ unsigned int ch) +{ -+ struct usba_ep *ep; ++ struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); ++ struct circ_buf *ring = &atmel_port->rx_ring; ++ struct atmel_uart_char *c; + -+ if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0) -+ return to_usba_ep(udc->gadget.ep0); ++ if (!CIRC_SPACE(ring->head, ring->tail, ATMEL_SERIAL_RINGSIZE)) ++ /* Buffer overflow, ignore char */ ++ return; + -+ list_for_each_entry (ep, &udc->gadget.ep_list, ep.ep_list) { -+ u8 bEndpointAddress; ++ c = &((struct atmel_uart_char *)ring->buf)[ring->head]; ++ c->status = status; ++ c->ch = ch; + -+ if (!ep->desc) -+ continue; -+ bEndpointAddress = ep->desc->bEndpointAddress; -+ if ((wIndex ^ bEndpointAddress) & USB_DIR_IN) -+ continue; -+ if ((bEndpointAddress & USB_ENDPOINT_NUMBER_MASK) -+ == (wIndex & USB_ENDPOINT_NUMBER_MASK)) -+ return ep; -+ } ++ /* Make sure the character is stored before we update head. */ ++ smp_wmb(); + -+ return NULL; ++ ring->head = (ring->head + 1) & (ATMEL_SERIAL_RINGSIZE - 1); +} + -+/* Called with interrupts disabled and udc->lock held */ -+static inline void set_protocol_stall(struct usba_udc *udc, struct usba_ep *ep) ++/* ++ * Deal with parity, framing and overrun errors. ++ */ ++static void atmel_pdc_rxerr(struct uart_port *port, unsigned int status) +{ -+ usba_ep_writel(ep, SET_STA, USBA_FORCE_STALL); -+ ep->state = WAIT_FOR_SETUP; -+} ++ /* clear error */ ++ UART_PUT_CR(port, ATMEL_US_RSTSTA); + -+static inline int is_stalled(struct usba_udc *udc, struct usba_ep *ep) -+{ -+ if (usba_ep_readl(ep, STA) & USBA_FORCE_STALL) -+ return 1; -+ return 0; ++ if (status & ATMEL_US_RXBRK) { ++ /* ignore side-effect */ ++ status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME); ++ port->icount.brk++; ++ } ++ if (status & ATMEL_US_PARE) ++ port->icount.parity++; ++ if (status & ATMEL_US_FRAME) ++ port->icount.frame++; ++ if (status & ATMEL_US_OVRE) ++ port->icount.overrun++; +} + -+static inline void set_address(struct usba_udc *udc, unsigned int addr) -+{ -+ u32 regval; -+ -+ DBG(DBG_BUS, "setting address %u...\n", addr); -+ regval = usba_readl(udc, CTRL); -+ regval = USBA_BFINS(DEV_ADDR, addr, regval); -+ usba_writel(udc, CTRL, regval); ++/* + * Characters received (called from interrupt handler) + */ + static void atmel_rx_chars(struct uart_port *port) + { +- struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port; +- struct tty_struct *tty = port->info->tty; +- unsigned int status, ch, flg; ++ struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); ++ unsigned int status, ch; + + status = UART_GET_CSR(port); + while (status & ATMEL_US_RXRDY) { + ch = UART_GET_CHAR(port); + +- port->icount.rx++; +- +- flg = TTY_NORMAL; +- + /* + * note that the error handling code is + * out of the main execution path +@@ -266,15 +391,14 @@ static void atmel_rx_chars(struct uart_port *port) + if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME + | ATMEL_US_OVRE | ATMEL_US_RXBRK) + || atmel_port->break_active)) { +- UART_PUT_CR(port, ATMEL_US_RSTSTA); /* clear error */ ++ ++ /* clear error */ ++ UART_PUT_CR(port, ATMEL_US_RSTSTA); ++ + if (status & ATMEL_US_RXBRK + && !atmel_port->break_active) { +- status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME); /* ignore side-effect */ +- port->icount.brk++; + atmel_port->break_active = 1; + UART_PUT_IER(port, ATMEL_US_RXBRK); +- if (uart_handle_break(port)) +- goto ignore_char; + } else { + /* + * This is either the end-of-break +@@ -287,52 +411,30 @@ static void atmel_rx_chars(struct uart_port *port) + status &= ~ATMEL_US_RXBRK; + atmel_port->break_active = 0; + } +- if (status & ATMEL_US_PARE) +- port->icount.parity++; +- if (status & ATMEL_US_FRAME) +- port->icount.frame++; +- if (status & ATMEL_US_OVRE) +- port->icount.overrun++; +- +- status &= port->read_status_mask; +- +- if (status & ATMEL_US_RXBRK) +- flg = TTY_BREAK; +- else if (status & ATMEL_US_PARE) +- flg = TTY_PARITY; +- else if (status & ATMEL_US_FRAME) +- flg = TTY_FRAME; + } + +- if (uart_handle_sysrq_char(port, ch)) +- goto ignore_char; +- +- uart_insert_char(port, status, ATMEL_US_OVRE, ch, flg); +- +- ignore_char: ++ atmel_buffer_rx_char(port, status, ch); + status = UART_GET_CSR(port); + } + +- tty_flip_buffer_push(tty); ++ tasklet_schedule(&atmel_port->tasklet); + } + + /* +- * Transmit characters (called from interrupt handler) ++ * Transmit characters (called from tasklet with TXRDY interrupt ++ * disabled) + */ + static void atmel_tx_chars(struct uart_port *port) + { + struct circ_buf *xmit = &port->info->xmit; + +- if (port->x_char) { ++ if (port->x_char && UART_GET_CSR(port) & ATMEL_US_TXRDY) { + UART_PUT_CHAR(port, port->x_char); + port->icount.tx++; + port->x_char = 0; +- return; + } +- if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { +- atmel_stop_tx(port); ++ if (uart_circ_empty(xmit) || uart_tx_stopped(port)) + return; +- } + + while (UART_GET_CSR(port) & ATMEL_US_TXRDY) { + UART_PUT_CHAR(port, xmit->buf[xmit->tail]); +@@ -345,8 +447,88 @@ static void atmel_tx_chars(struct uart_port *port) + if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) + uart_write_wakeup(port); + +- if (uart_circ_empty(xmit)) +- atmel_stop_tx(port); ++ if (!uart_circ_empty(xmit)) ++ UART_PUT_IER(port, ATMEL_US_TXRDY); +} + -+static int do_test_mode(struct usba_udc *udc) ++/* ++ * receive interrupt handler. ++ */ ++static void ++atmel_handle_receive(struct uart_port *port, unsigned int pending) +{ -+ static const char test_packet_buffer[] = { -+ /* JKJKJKJK * 9 */ -+ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -+ /* JJKKJJKK * 8 */ -+ 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, 0xAA, -+ /* JJKKJJKK * 8 */ -+ 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, 0xEE, -+ /* JJJJJJJKKKKKKK * 8 */ -+ 0xFE, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, -+ 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, -+ /* JJJJJJJK * 8 */ -+ 0x7F, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, -+ /* {JKKKKKKK * 10}, JK */ -+ 0xFC, 0x7E, 0xBF, 0xDF, 0xEF, 0xF7, 0xFB, 0xFD, 0x7E -+ }; -+ struct usba_ep *ep; -+ struct device *dev = &udc->pdev->dev; -+ int test_mode; -+ -+ test_mode = udc->test_mode; -+ -+ /* Start from a clean slate */ -+ reset_all_endpoints(udc); ++ struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); + -+ switch (test_mode) { -+ case 0x0100: -+ /* Test_J */ -+ usba_writel(udc, TST, USBA_TST_J_MODE); -+ dev_info(dev, "Entering Test_J mode...\n"); -+ break; -+ case 0x0200: -+ /* Test_K */ -+ usba_writel(udc, TST, USBA_TST_K_MODE); -+ dev_info(dev, "Entering Test_K mode...\n"); -+ break; -+ case 0x0300: ++ if (atmel_use_dma_rx(port)) { + /* -+ * Test_SE0_NAK: Force high-speed mode and set up ep0 -+ * for Bulk IN transfers ++ * PDC receive. Just schedule the tasklet and let it ++ * figure out the details. ++ * ++ * TODO: We're not handling error flags correctly at ++ * the moment. + */ -+ ep = &usba_ep[0]; -+ usba_writel(udc, TST, -+ USBA_BF(SPEED_CFG, USBA_SPEED_CFG_FORCE_HIGH)); -+ usba_ep_writel(ep, CFG, -+ USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64) -+ | USBA_EPT_DIR_IN -+ | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK) -+ | USBA_BF(BK_NUMBER, 1)); -+ if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) { -+ set_protocol_stall(udc, ep); -+ dev_err(dev, "Test_SE0_NAK: ep0 not mapped\n"); -+ } else { -+ usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE); -+ dev_info(dev, "Entering Test_SE0_NAK mode...\n"); -+ } -+ break; -+ case 0x0400: -+ /* Test_Packet */ -+ ep = &usba_ep[0]; -+ usba_ep_writel(ep, CFG, -+ USBA_BF(EPT_SIZE, USBA_EPT_SIZE_64) -+ | USBA_EPT_DIR_IN -+ | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_BULK) -+ | USBA_BF(BK_NUMBER, 1)); -+ if (!(usba_ep_readl(ep, CFG) & USBA_EPT_MAPPED)) { -+ set_protocol_stall(udc, ep); -+ dev_err(dev, "Test_Packet: ep0 not mapped\n"); -+ } else { -+ usba_ep_writel(ep, CTL_ENB, USBA_EPT_ENABLE); -+ usba_writel(udc, TST, USBA_TST_PKT_MODE); -+ copy_to_fifo(ep->fifo, test_packet_buffer, -+ sizeof(test_packet_buffer)); -+ usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY); -+ dev_info(dev, "Entering Test_Packet mode...\n"); ++ if (pending & (ATMEL_US_ENDRX | ATMEL_US_TIMEOUT)) { ++ UART_PUT_IDR(port, (ATMEL_US_ENDRX ++ | ATMEL_US_TIMEOUT)); ++ tasklet_schedule(&atmel_port->tasklet); + } -+ break; -+ default: -+ dev_err(dev, "Invalid test mode: 0x%04x\n", test_mode); -+ return -EINVAL; -+ } + -+ return 0; -+} ++ if (pending & (ATMEL_US_RXBRK | ATMEL_US_OVRE | ++ ATMEL_US_FRAME | ATMEL_US_PARE)) ++ atmel_pdc_rxerr(port, pending); ++ } + -+/* Avoid overly long expressions */ -+static inline bool feature_is_dev_remote_wakeup(struct usb_ctrlrequest *crq) -+{ -+ if (crq->wValue == __constant_cpu_to_le16(USB_DEVICE_REMOTE_WAKEUP)) -+ return true; -+ return false; ++ /* Interrupt receive */ ++ if (pending & ATMEL_US_RXRDY) ++ atmel_rx_chars(port); ++ else if (pending & ATMEL_US_RXBRK) { ++ /* ++ * End of break detected. If it came along with a ++ * character, atmel_rx_chars will handle it. ++ */ ++ UART_PUT_CR(port, ATMEL_US_RSTSTA); ++ UART_PUT_IDR(port, ATMEL_US_RXBRK); ++ atmel_port->break_active = 0; ++ } +} + -+static inline bool feature_is_dev_test_mode(struct usb_ctrlrequest *crq) ++/* ++ * transmit interrupt handler. (Transmit is IRQF_NODELAY safe) ++ */ ++static void ++atmel_handle_transmit(struct uart_port *port, unsigned int pending) +{ -+ if (crq->wValue == __constant_cpu_to_le16(USB_DEVICE_TEST_MODE)) -+ return true; -+ return false; -+} ++ struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); + -+static inline bool feature_is_ep_halt(struct usb_ctrlrequest *crq) -+{ -+ if (crq->wValue == __constant_cpu_to_le16(USB_ENDPOINT_HALT)) -+ return true; -+ return false; ++ if (atmel_use_dma_tx(port)) { ++ /* PDC transmit */ ++ if (pending & (ATMEL_US_ENDTX | ATMEL_US_TXBUFE)) { ++ UART_PUT_IDR(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE); ++ tasklet_schedule(&atmel_port->tasklet); ++ } ++ } else { ++ /* Interrupt transmit */ ++ if (pending & ATMEL_US_TXRDY) { ++ UART_PUT_IDR(port, ATMEL_US_TXRDY); ++ tasklet_schedule(&atmel_port->tasklet); ++ } ++ } +} + -+static int handle_ep0_setup(struct usba_udc *udc, struct usba_ep *ep, -+ struct usb_ctrlrequest *crq) ++/* ++ * status flags interrupt handler. ++ */ ++static void ++atmel_handle_status(struct uart_port *port, unsigned int pending, ++ unsigned int status) +{ -+ int retval = 0;; -+ -+ switch (crq->bRequest) { -+ case USB_REQ_GET_STATUS: { -+ u16 status; -+ -+ if (crq->bRequestType == (USB_DIR_IN | USB_RECIP_DEVICE)) { -+ /* Self-powered, no remote wakeup */ -+ status = __constant_cpu_to_le16(1 << 0); -+ } else if (crq->bRequestType -+ == (USB_DIR_IN | USB_RECIP_INTERFACE)) { -+ status = __constant_cpu_to_le16(0); -+ } else if (crq->bRequestType -+ == (USB_DIR_IN | USB_RECIP_ENDPOINT)) { -+ struct usba_ep *target; ++ struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); + -+ target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex)); -+ if (!target) -+ goto stall; -+ -+ status = 0; -+ if (is_stalled(udc, target)) -+ status |= __constant_cpu_to_le16(1); -+ } else -+ goto delegate; -+ -+ /* Write directly to the FIFO. No queueing is done. */ -+ if (crq->wLength != __constant_cpu_to_le16(sizeof(status))) -+ goto stall; -+ ep->state = DATA_STAGE_IN; -+ __raw_writew(status, ep->fifo); -+ usba_ep_writel(ep, SET_STA, USBA_TX_PK_RDY); -+ break; ++ if (pending & (ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC ++ | ATMEL_US_CTSIC)) { ++ atmel_port->irq_status = status; ++ tasklet_schedule(&atmel_port->tasklet); + } + } + + /* +@@ -355,47 +537,255 @@ static void atmel_tx_chars(struct uart_port *port) + static irqreturn_t atmel_interrupt(int irq, void *dev_id) + { + struct uart_port *port = dev_id; +- struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port; + unsigned int status, pending, pass_counter = 0; + +- status = UART_GET_CSR(port); +- pending = status & UART_GET_IMR(port); +- while (pending) { +- /* Interrupt receive */ +- if (pending & ATMEL_US_RXRDY) +- atmel_rx_chars(port); +- else if (pending & ATMEL_US_RXBRK) { ++ do { ++ status = UART_GET_CSR(port); ++ pending = status & UART_GET_IMR(port); ++ if (!pending) ++ break; + -+ case USB_REQ_CLEAR_FEATURE: { -+ if (crq->bRequestType == USB_RECIP_DEVICE) { -+ if (feature_is_dev_remote_wakeup(crq)) { -+ /* TODO: Handle REMOTE_WAKEUP */ -+ } else { -+ /* Can't CLEAR_FEATURE TEST_MODE */ -+ goto stall; -+ } -+ } else if (crq->bRequestType == USB_RECIP_ENDPOINT) { -+ struct usba_ep *target; -+ -+ if (crq->wLength != __constant_cpu_to_le16(0) -+ || !feature_is_ep_halt(crq)) -+ goto stall; -+ target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex)); -+ if (!target) -+ goto stall; -+ -+ usba_ep_writel(target, CLR_STA, USBA_FORCE_STALL); -+ if (target->index != 0) -+ usba_ep_writel(target, CLR_STA, -+ USBA_TOGGLE_CLR); -+ } else { -+ goto delegate; -+ } ++ atmel_handle_receive(port, pending); ++ atmel_handle_status(port, pending, status); ++ atmel_handle_transmit(port, pending); ++ } while (pass_counter++ < ATMEL_ISR_PASS_LIMIT); + -+ send_status(udc, ep); -+ break; -+ } ++ return IRQ_HANDLED; ++} + -+ case USB_REQ_SET_FEATURE: { -+ if (crq->bRequestType == USB_RECIP_DEVICE) { -+ if (feature_is_dev_test_mode(crq)) { -+ send_status(udc, ep); -+ ep->state = STATUS_STAGE_TEST; -+ udc->test_mode = le16_to_cpu(crq->wIndex); -+ return 0; -+ } else if (feature_is_dev_remote_wakeup(crq)) { -+ /* TODO: Handle REMOTE_WAKEUP */ -+ } else { -+ goto stall; -+ } -+ } else if (crq->bRequestType == USB_RECIP_ENDPOINT) { -+ struct usba_ep *target; ++/* ++ * Called from tasklet with ENDTX and TXBUFE interrupts disabled. ++ */ ++static void atmel_tx_dma(struct uart_port *port) ++{ ++ struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); ++ struct circ_buf *xmit = &port->info->xmit; ++ struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx; ++ int count; + -+ if (crq->wLength != __constant_cpu_to_le16(0) -+ || !feature_is_ep_halt(crq)) -+ goto stall; ++ xmit->tail += pdc->ofs; ++ xmit->tail &= UART_XMIT_SIZE - 1; + -+ target = get_ep_by_addr(udc, le16_to_cpu(crq->wIndex)); -+ if (!target) -+ goto stall; ++ port->icount.tx += pdc->ofs; ++ pdc->ofs = 0; + -+ usba_ep_writel(target, SET_STA, USBA_FORCE_STALL); -+ } else -+ goto delegate; ++ if (!uart_circ_empty(xmit)) { ++ /* more to transmit - setup next transfer */ + -+ send_status(udc, ep); -+ break; -+ } ++ /* disable PDC transmit */ ++ UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS); ++ dma_sync_single_for_device(port->dev, ++ pdc->dma_addr, ++ pdc->dma_size, ++ DMA_TO_DEVICE); + -+ case USB_REQ_SET_ADDRESS: -+ if (crq->bRequestType != (USB_DIR_OUT | USB_RECIP_DEVICE)) -+ goto delegate; ++ count = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE); ++ pdc->ofs = count; + -+ set_address(udc, le16_to_cpu(crq->wValue)); -+ send_status(udc, ep); -+ ep->state = STATUS_STAGE_ADDR; -+ break; ++ UART_PUT_TPR(port, pdc->dma_addr + xmit->tail); ++ UART_PUT_TCR(port, count); ++ /* re-enable PDC transmit and interrupts */ ++ UART_PUT_PTCR(port, ATMEL_PDC_TXTEN); ++ UART_PUT_IER(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE); ++ } else { ++ /* nothing left to transmit - disable the transmitter */ + -+ default: -+delegate: -+ spin_unlock(&udc->lock); -+ retval = udc->driver->setup(&udc->gadget, crq); -+ spin_lock(&udc->lock); ++ /* disable PDC transmit */ ++ UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS); + } + -+ return retval; -+ -+stall: -+ printk(KERN_ERR -+ "udc: %s: Invalid setup request: %02x.%02x v%04x i%04x l%d, " -+ "halting endpoint...\n", -+ ep->ep.name, crq->bRequestType, crq->bRequest, -+ le16_to_cpu(crq->wValue), le16_to_cpu(crq->wIndex), -+ le16_to_cpu(crq->wLength)); -+ set_protocol_stall(udc, ep); -+ return -1; ++ if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) ++ uart_write_wakeup(port); +} + -+static void usba_control_irq(struct usba_udc *udc, struct usba_ep *ep) ++static void atmel_rx_from_ring(struct uart_port *port) +{ -+ struct usba_request *req; -+ u32 epstatus; -+ u32 epctrl; -+ -+restart: -+ epstatus = usba_ep_readl(ep, STA); -+ epctrl = usba_ep_readl(ep, CTL); -+ -+ DBG(DBG_INT, "%s [%d]: s/%08x c/%08x\n", -+ ep->ep.name, ep->state, epstatus, epctrl); -+ -+ req = NULL; -+ if (!list_empty(&ep->queue)) -+ req = list_entry(ep->queue.next, -+ struct usba_request, queue); -+ -+ if ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) { -+ if (req->submitted) -+ next_fifo_transaction(ep, req); -+ else -+ submit_request(ep, req); -+ -+ if (req->last_transaction) { -+ usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY); -+ usba_ep_writel(ep, CTL_ENB, USBA_TX_COMPLETE); -+ } -+ goto restart; -+ } -+ if ((epstatus & epctrl) & USBA_TX_COMPLETE) { -+ usba_ep_writel(ep, CLR_STA, USBA_TX_COMPLETE); -+ -+ switch (ep->state) { -+ case DATA_STAGE_IN: -+ usba_ep_writel(ep, CTL_ENB, USBA_RX_BK_RDY); -+ usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE); -+ ep->state = STATUS_STAGE_OUT; -+ break; -+ case STATUS_STAGE_ADDR: -+ /* Activate our new address */ -+ usba_writel(udc, CTRL, (usba_readl(udc, CTRL) -+ | USBA_FADDR_EN)); -+ usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE); -+ ep->state = WAIT_FOR_SETUP; -+ break; -+ case STATUS_STAGE_IN: -+ if (req) { -+ list_del_init(&req->queue); -+ request_complete(ep, req, 0); -+ submit_next_request(ep); -+ } -+ usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE); -+ ep->state = WAIT_FOR_SETUP; -+ break; -+ case STATUS_STAGE_TEST: -+ usba_ep_writel(ep, CTL_DIS, USBA_TX_COMPLETE); -+ ep->state = WAIT_FOR_SETUP; -+ if (do_test_mode(udc)) -+ set_protocol_stall(udc, ep); -+ break; -+ default: -+ printk(KERN_ERR -+ "udc: %s: TXCOMP: Invalid endpoint state %d, " -+ "halting endpoint...\n", -+ ep->ep.name, ep->state); -+ set_protocol_stall(udc, ep); -+ break; -+ } -+ -+ goto restart; -+ } -+ if ((epstatus & epctrl) & USBA_RX_BK_RDY) { -+ switch (ep->state) { -+ case STATUS_STAGE_OUT: -+ usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY); -+ usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY); ++ struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); ++ struct circ_buf *ring = &atmel_port->rx_ring; ++ unsigned int flg; ++ unsigned int status; + -+ if (req) { -+ list_del_init(&req->queue); -+ request_complete(ep, req, 0); -+ } -+ ep->state = WAIT_FOR_SETUP; -+ break; ++ while (ring->head != ring->tail) { ++ struct atmel_uart_char c; + -+ case DATA_STAGE_OUT: -+ receive_data(ep); -+ break; ++ /* Make sure c is loaded after head. */ ++ smp_rmb(); + -+ default: -+ usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY); -+ usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY); -+ printk(KERN_ERR -+ "udc: %s: RXRDY: Invalid endpoint state %d, " -+ "halting endpoint...\n", -+ ep->ep.name, ep->state); -+ set_protocol_stall(udc, ep); -+ break; -+ } ++ c = ((struct atmel_uart_char *)ring->buf)[ring->tail]; + -+ goto restart; -+ } -+ if (epstatus & USBA_RX_SETUP) { -+ union { -+ struct usb_ctrlrequest crq; -+ unsigned long data[2]; -+ } crq; -+ unsigned int pkt_len; -+ int ret; ++ ring->tail = (ring->tail + 1) & (ATMEL_SERIAL_RINGSIZE - 1); + -+ if (ep->state != WAIT_FOR_SETUP) { -+ /* -+ * Didn't expect a SETUP packet at this -+ * point. Clean up any pending requests (which -+ * may be successful). -+ */ -+ int status = -EPROTO; ++ port->icount.rx++; ++ status = c.status; ++ flg = TTY_NORMAL; + -+ /* -+ * RXRDY and TXCOMP are dropped when SETUP -+ * packets arrive. Just pretend we received -+ * the status packet. -+ */ -+ if (ep->state == STATUS_STAGE_OUT -+ || ep->state == STATUS_STAGE_IN) { -+ usba_ep_writel(ep, CTL_DIS, USBA_RX_BK_RDY); -+ status = 0; -+ } -+ -+ if (req) { -+ list_del_init(&req->queue); -+ request_complete(ep, req, status); ++ /* ++ * note that the error handling code is ++ * out of the main execution path ++ */ ++ if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME ++ | ATMEL_US_OVRE | ATMEL_US_RXBRK))) { ++ if (status & ATMEL_US_RXBRK) { ++ /* ignore side-effect */ ++ status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME); ++ ++ port->icount.brk++; ++ if (uart_handle_break(port)) ++ continue; + } ++ if (status & ATMEL_US_PARE) ++ port->icount.parity++; ++ if (status & ATMEL_US_FRAME) ++ port->icount.frame++; ++ if (status & ATMEL_US_OVRE) ++ port->icount.overrun++; ++ ++ status &= port->read_status_mask; ++ ++ if (status & ATMEL_US_RXBRK) ++ flg = TTY_BREAK; ++ else if (status & ATMEL_US_PARE) ++ flg = TTY_PARITY; ++ else if (status & ATMEL_US_FRAME) ++ flg = TTY_FRAME; + } + -+ pkt_len = USBA_BFEXT(BYTE_COUNT, usba_ep_readl(ep, STA)); -+ DBG(DBG_HW, "Packet length: %u\n", pkt_len); -+ if (pkt_len != sizeof(crq)) { -+ printk(KERN_WARNING "udc: Invalid packet length %u " -+ "(expected %lu)\n", pkt_len, sizeof(crq)); -+ set_protocol_stall(udc, ep); -+ return; -+ } -+ -+ DBG(DBG_FIFO, "Copying ctrl request from 0x%p:\n", ep->fifo); -+ copy_from_fifo(crq.data, ep->fifo, sizeof(crq)); -+ -+ /* Free up one bank in the FIFO so that we can -+ * generate or receive a reply right away. */ -+ usba_ep_writel(ep, CLR_STA, USBA_RX_SETUP); + -+ /* printk(KERN_DEBUG "setup: %d: %02x.%02x\n", -+ ep->state, crq.crq.bRequestType, -+ crq.crq.bRequest); */ -+ -+ if (crq.crq.bRequestType & USB_DIR_IN) { -+ /* -+ * The USB 2.0 spec states that "if wLength is -+ * zero, there is no data transfer phase." -+ * However, testusb #14 seems to actually -+ * expect a data phase even if wLength = 0... -+ */ -+ ep->state = DATA_STAGE_IN; -+ } else { -+ if (crq.crq.wLength != __constant_cpu_to_le16(0)) -+ ep->state = DATA_STAGE_OUT; -+ else -+ ep->state = STATUS_STAGE_IN; -+ } -+ -+ ret = -1; -+ if (ep->index == 0) -+ ret = handle_ep0_setup(udc, ep, &crq.crq); -+ else { -+ spin_unlock(&udc->lock); -+ ret = udc->driver->setup(&udc->gadget, &crq.crq); -+ spin_lock(&udc->lock); -+ } -+ -+ DBG(DBG_BUS, "req %02x.%02x, length %d, state %d, ret %d\n", -+ crq.crq.bRequestType, crq.crq.bRequest, -+ le16_to_cpu(crq.crq.wLength), ep->state, ret); ++ if (uart_handle_sysrq_char(port, c.ch)) ++ continue; + -+ if (ret < 0) { -+ /* Let the host know that we failed */ -+ set_protocol_stall(udc, ep); -+ } ++ uart_insert_char(port, status, ATMEL_US_OVRE, c.ch, flg); + } -+} -+ -+static void usba_ep_irq(struct usba_udc *udc, struct usba_ep *ep) -+{ -+ struct usba_request *req; -+ u32 epstatus; -+ u32 epctrl; -+ -+ epstatus = usba_ep_readl(ep, STA); -+ epctrl = usba_ep_readl(ep, CTL); -+ -+ DBG(DBG_INT, "%s: interrupt, status: 0x%08x\n", ep->ep.name, epstatus); -+ -+ while ((epctrl & USBA_TX_PK_RDY) && !(epstatus & USBA_TX_PK_RDY)) { -+ DBG(DBG_BUS, "%s: TX PK ready\n", ep->ep.name); -+ -+ if (list_empty(&ep->queue)) { -+ dev_warn(&udc->pdev->dev, "ep_irq: queue empty\n"); -+ usba_ep_writel(ep, CTL_DIS, USBA_TX_PK_RDY); -+ return; -+ } -+ -+ req = list_entry(ep->queue.next, struct usba_request, queue); -+ -+ if (req->using_dma) { -+ /* Send a zero-length packet */ -+ usba_ep_writel(ep, SET_STA, -+ USBA_TX_PK_RDY); -+ usba_ep_writel(ep, CTL_DIS, -+ USBA_TX_PK_RDY); -+ list_del_init(&req->queue); -+ submit_next_request(ep); -+ request_complete(ep, req, 0); -+ } else { -+ if (req->submitted) -+ next_fifo_transaction(ep, req); -+ else -+ submit_request(ep, req); -+ -+ if (req->last_transaction) { -+ list_del_init(&req->queue); -+ submit_next_request(ep); -+ request_complete(ep, req, 0); -+ } -+ } + -+ epstatus = usba_ep_readl(ep, STA); -+ epctrl = usba_ep_readl(ep, CTL); -+ } -+ if ((epstatus & epctrl) & USBA_RX_BK_RDY) { -+ DBG(DBG_BUS, "%s: RX data ready\n", ep->ep.name); -+ receive_data(ep); -+ usba_ep_writel(ep, CLR_STA, USBA_RX_BK_RDY); -+ } ++ /* ++ * Drop the lock here since it might end up calling ++ * uart_start(), which takes the lock. ++ */ ++ spin_unlock(&port->lock); ++ tty_flip_buffer_push(port->info->tty); ++ spin_lock(&port->lock); +} + -+static void usba_dma_irq(struct usba_udc *udc, struct usba_ep *ep) ++static void atmel_rx_from_dma(struct uart_port *port) +{ -+ struct usba_request *req; -+ u32 status, control, pending; -+ -+ status = usba_dma_readl(ep, STATUS); -+ control = usba_dma_readl(ep, CONTROL); -+#ifdef CONFIG_USB_GADGET_DEBUG_FS -+ ep->last_dma_status = status; -+#endif -+ pending = status & control; -+ DBG(DBG_INT | DBG_DMA, "dma irq, s/%#08x, c/%#08x\n", status, control); -+ -+ if (status & USBA_DMA_CH_EN) { -+ dev_err(&udc->pdev->dev, -+ "DMA_CH_EN is set after transfer is finished!\n"); -+ dev_err(&udc->pdev->dev, -+ "status=%#08x, pending=%#08x, control=%#08x\n", -+ status, pending, control); ++ struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); ++ struct tty_struct *tty = port->info->tty; ++ struct atmel_dma_buffer *pdc; ++ int rx_idx = atmel_port->pdc_rx_idx; ++ unsigned int head; ++ unsigned int tail; ++ unsigned int count; + ++ do { ++ /* Reset the UART timeout early so that we don't miss one */ ++ UART_PUT_CR(port, ATMEL_US_STTTO); ++ ++ pdc = &atmel_port->pdc_rx[rx_idx]; ++ head = UART_GET_RPR(port) - pdc->dma_addr; ++ tail = pdc->ofs; ++ ++ /* If the PDC has switched buffers, RPR won't contain ++ * any address within the current buffer. Since head ++ * is unsigned, we just need a one-way comparison to ++ * find out. ++ * ++ * In this case, we just need to consume the entire ++ * buffer and resubmit it for DMA. This will clear the ++ * ENDRX bit as well, so that we can safely re-enable ++ * all interrupts below. ++ */ ++ head = min(head, pdc->dma_size); ++ ++ if (likely(head != tail)) { ++ dma_sync_single_for_cpu(port->dev, pdc->dma_addr, ++ pdc->dma_size, DMA_FROM_DEVICE); ++ + /* +- * End of break detected. If it came along +- * with a character, atmel_rx_chars will +- * handle it. ++ * head will only wrap around when we recycle ++ * the DMA buffer, and when that happens, we ++ * explicitly set tail to 0. So head will ++ * always be greater than tail. + */ +- UART_PUT_CR(port, ATMEL_US_RSTSTA); +- UART_PUT_IDR(port, ATMEL_US_RXBRK); +- atmel_port->break_active = 0; ++ count = head - tail; ++ ++ tty_insert_flip_string(tty, pdc->buf + pdc->ofs, count); ++ ++ dma_sync_single_for_device(port->dev, pdc->dma_addr, ++ pdc->dma_size, DMA_FROM_DEVICE); ++ ++ port->icount.rx += count; ++ pdc->ofs = head; + } + +- // TODO: All reads to CSR will clear these interrupts! +- if (pending & ATMEL_US_RIIC) port->icount.rng++; +- if (pending & ATMEL_US_DSRIC) port->icount.dsr++; +- if (pending & ATMEL_US_DCDIC) + /* -+ * try to pretend nothing happened. We might have to -+ * do something here... ++ * If the current buffer is full, we need to check if ++ * the next one contains any additional data. + */ -+ } ++ if (head >= pdc->dma_size) { ++ pdc->ofs = 0; ++ UART_PUT_RNPR(port, pdc->dma_addr); ++ UART_PUT_RNCR(port, pdc->dma_size); + -+ if (list_empty(&ep->queue)) -+ /* Might happen if a reset comes along at the right moment */ -+ return; ++ rx_idx = !rx_idx; ++ atmel_port->pdc_rx_idx = rx_idx; ++ } ++ } while (head >= pdc->dma_size); + -+ if (pending & (USBA_DMA_END_TR_ST | USBA_DMA_END_BUF_ST)) { -+ req = list_entry(ep->queue.next, struct usba_request, queue); -+ usba_update_req(ep, req, status); ++ /* ++ * Drop the lock here since it might end up calling ++ * uart_start(), which takes the lock. ++ */ ++ spin_unlock(&port->lock); ++ tty_flip_buffer_push(tty); ++ spin_lock(&port->lock); + -+ list_del_init(&req->queue); -+ submit_next_request(ep); -+ request_complete(ep, req, 0); -+ } ++ UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT); +} + -+static irqreturn_t usba_udc_irq(int irq, void *devid) ++/* ++ * tasklet handling tty stuff outside the interrupt handler. ++ */ ++static void atmel_tasklet_func(unsigned long data) +{ -+ struct usba_udc *udc = devid; -+ u32 status; -+ u32 dma_status; -+ u32 ep_status; -+ -+ spin_lock(&udc->lock); -+ -+ status = usba_readl(udc, INT_STA); -+ DBG(DBG_INT, "irq, status=%#08x\n", status); -+ -+ if (status & USBA_DET_SUSPEND) { -+ usba_writel(udc, INT_CLR, USBA_DET_SUSPEND); -+ DBG(DBG_BUS, "Suspend detected\n"); -+ if (udc->gadget.speed != USB_SPEED_UNKNOWN -+ && udc->driver && udc->driver->suspend) { -+ spin_unlock(&udc->lock); -+ udc->driver->suspend(&udc->gadget); -+ spin_lock(&udc->lock); -+ } -+ } ++ struct uart_port *port = (struct uart_port *)data; ++ struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); ++ unsigned int status; ++ unsigned int status_change; + -+ if (status & USBA_WAKE_UP) { -+ usba_writel(udc, INT_CLR, USBA_WAKE_UP); -+ DBG(DBG_BUS, "Wake Up CPU detected\n"); -+ } ++ /* The interrupt handler does not take the lock */ ++ spin_lock(&port->lock); + -+ if (status & USBA_END_OF_RESUME) { -+ usba_writel(udc, INT_CLR, USBA_END_OF_RESUME); -+ DBG(DBG_BUS, "Resume detected\n"); -+ if (udc->gadget.speed != USB_SPEED_UNKNOWN -+ && udc->driver && udc->driver->resume) { -+ spin_unlock(&udc->lock); -+ udc->driver->resume(&udc->gadget); -+ spin_lock(&udc->lock); -+ } -+ } -+ -+ dma_status = USBA_BFEXT(DMA_INT, status); -+ if (dma_status) { -+ int i; ++ if (atmel_use_dma_tx(port)) ++ atmel_tx_dma(port); ++ else ++ atmel_tx_chars(port); ++ ++ status = atmel_port->irq_status; ++ status_change = status ^ atmel_port->irq_status_prev; ++ ++ if (status_change & (ATMEL_US_RI | ATMEL_US_DSR ++ | ATMEL_US_DCD | ATMEL_US_CTS)) { ++ /* TODO: All reads to CSR will clear these interrupts! */ ++ if (status_change & ATMEL_US_RI) ++ port->icount.rng++; ++ if (status_change & ATMEL_US_DSR) ++ port->icount.dsr++; ++ if (status_change & ATMEL_US_DCD) + uart_handle_dcd_change(port, !(status & ATMEL_US_DCD)); +- if (pending & ATMEL_US_CTSIC) ++ if (status_change & ATMEL_US_CTS) + uart_handle_cts_change(port, !(status & ATMEL_US_CTS)); +- if (pending & (ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC | ATMEL_US_CTSIC)) +- wake_up_interruptible(&port->info->delta_msr_wait); + +- /* Interrupt transmit */ +- if (pending & ATMEL_US_TXRDY) +- atmel_tx_chars(port); ++ wake_up_interruptible(&port->info->delta_msr_wait); + +- if (pass_counter++ > ATMEL_ISR_PASS_LIMIT) +- break; +- +- status = UART_GET_CSR(port); +- pending = status & UART_GET_IMR(port); ++ atmel_port->irq_status_prev = status; + } +- return IRQ_HANDLED; + -+ for (i = 1; i < USBA_NR_ENDPOINTS; i++) -+ if (dma_status & (1 << i)) -+ usba_dma_irq(udc, &usba_ep[i]); -+ } ++ if (atmel_use_dma_rx(port)) ++ atmel_rx_from_dma(port); ++ else ++ atmel_rx_from_ring(port); + -+ ep_status = USBA_BFEXT(EPT_INT, status); -+ if (ep_status) { ++ spin_unlock(&port->lock); + } + + /* +@@ -403,6 +793,8 @@ static irqreturn_t atmel_interrupt(int irq, void *dev_id) + */ + static int atmel_startup(struct uart_port *port) + { ++ struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); ++ struct tty_struct *tty = port->info->tty; + int retval; + + /* +@@ -415,13 +807,64 @@ static int atmel_startup(struct uart_port *port) + /* + * Allocate the IRQ + */ +- retval = request_irq(port->irq, atmel_interrupt, IRQF_SHARED, "atmel_serial", port); ++ retval = request_irq(port->irq, atmel_interrupt, IRQF_SHARED, ++ tty ? tty->name : "atmel_serial", port); + if (retval) { + printk("atmel_serial: atmel_startup - Can't get irq\n"); + return retval; + } + + /* ++ * Initialize DMA (if necessary) ++ */ ++ if (atmel_use_dma_rx(port)) { + int i; + -+ for (i = 0; i < USBA_NR_ENDPOINTS; i++) -+ if (ep_status & (1 << i)) { -+ if (ep_is_control(&usba_ep[i])) -+ usba_control_irq(udc, &usba_ep[i]); -+ else -+ usba_ep_irq(udc, &usba_ep[i]); ++ for (i = 0; i < 2; i++) { ++ struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i]; ++ ++ pdc->buf = kmalloc(PDC_BUFFER_SIZE, GFP_KERNEL); ++ if (pdc->buf == NULL) { ++ if (i != 0) { ++ dma_unmap_single(port->dev, ++ atmel_port->pdc_rx[0].dma_addr, ++ PDC_BUFFER_SIZE, ++ DMA_FROM_DEVICE); ++ kfree(atmel_port->pdc_rx[0].buf); ++ } ++ free_irq(port->irq, port); ++ return -ENOMEM; + } -+ } -+ -+ if (status & USBA_END_OF_RESET) { -+ struct usba_ep *ep0; -+ -+ usba_writel(udc, INT_CLR, USBA_END_OF_RESET); -+ reset_all_endpoints(udc); -+ -+ if (status & USBA_HIGH_SPEED) { -+ DBG(DBG_BUS, "High-speed bus reset detected\n"); -+ udc->gadget.speed = USB_SPEED_HIGH; -+ } else { -+ DBG(DBG_BUS, "Full-speed bus reset detected\n"); -+ udc->gadget.speed = USB_SPEED_FULL; ++ pdc->dma_addr = dma_map_single(port->dev, ++ pdc->buf, ++ PDC_BUFFER_SIZE, ++ DMA_FROM_DEVICE); ++ pdc->dma_size = PDC_BUFFER_SIZE; ++ pdc->ofs = 0; + } + -+ ep0 = &usba_ep[0]; -+ ep0->desc = &usba_ep0_desc; -+ ep0->state = WAIT_FOR_SETUP; -+ usba_ep_writel(ep0, CFG, -+ (USBA_BF(EPT_SIZE, EP0_EPT_SIZE) -+ | USBA_BF(EPT_TYPE, USBA_EPT_TYPE_CONTROL) -+ | USBA_BF(BK_NUMBER, USBA_BK_NUMBER_ONE))); -+ usba_ep_writel(ep0, CTL_ENB, -+ USBA_EPT_ENABLE | USBA_RX_SETUP); -+ usba_writel(udc, INT_ENB, -+ (usba_readl(udc, INT_ENB) -+ | USBA_BF(EPT_INT, 1) -+ | USBA_DET_SUSPEND -+ | USBA_END_OF_RESUME)); -+ -+ if (!(usba_ep_readl(ep0, CFG) & USBA_EPT_MAPPED)) -+ dev_warn(&udc->pdev->dev, -+ "WARNING: EP0 configuration is invalid!\n"); -+ } -+ -+ spin_unlock(&udc->lock); -+ -+ return IRQ_HANDLED; -+} -+ -+static irqreturn_t usba_vbus_irq(int irq, void *devid) -+{ -+ struct usba_udc *udc = devid; -+ int vbus; -+ -+ /* debounce */ -+ udelay(10); -+ -+ spin_lock(&udc->lock); -+ -+ /* May happen if Vbus pin toggles during probe() */ -+ if (!udc->driver) -+ goto out; -+ -+ vbus = gpio_get_value(udc->vbus_pin); -+ if (vbus != udc->vbus_prev) { -+ if (vbus) { -+ usba_writel(udc, CTRL, USBA_EN_USBA); -+ usba_writel(udc, INT_ENB, USBA_END_OF_RESET); -+ } else { -+ udc->gadget.speed = USB_SPEED_UNKNOWN; -+ reset_all_endpoints(udc); -+ usba_writel(udc, CTRL, 0); -+ spin_unlock(&udc->lock); -+ udc->driver->disconnect(&udc->gadget); -+ spin_lock(&udc->lock); -+ } -+ udc->vbus_prev = vbus; -+ } -+ -+out: -+ spin_unlock(&udc->lock); -+ -+ return IRQ_HANDLED; -+} -+ -+int usb_gadget_register_driver(struct usb_gadget_driver *driver) -+{ -+ struct usba_udc *udc = &the_udc; -+ unsigned long flags; -+ int ret; ++ atmel_port->pdc_rx_idx = 0; + -+ if (!udc->pdev) -+ return -ENODEV; ++ UART_PUT_RPR(port, atmel_port->pdc_rx[0].dma_addr); ++ UART_PUT_RCR(port, PDC_BUFFER_SIZE); + -+ spin_lock_irqsave(&udc->lock, flags); -+ if (udc->driver) { -+ spin_unlock_irqrestore(&udc->lock, flags); -+ return -EBUSY; ++ UART_PUT_RNPR(port, atmel_port->pdc_rx[1].dma_addr); ++ UART_PUT_RNCR(port, PDC_BUFFER_SIZE); + } -+ -+ udc->driver = driver; -+ udc->gadget.dev.driver = &driver->driver; -+ spin_unlock_irqrestore(&udc->lock, flags); -+ -+ clk_enable(udc->pclk); -+ clk_enable(udc->hclk); -+ -+ ret = driver->bind(&udc->gadget); -+ if (ret) { -+ DBG(DBG_ERR, "Could not bind to driver %s: error %d\n", -+ driver->driver.name, ret); -+ goto err_driver_bind; ++ if (atmel_use_dma_tx(port)) { ++ struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx; ++ struct circ_buf *xmit = &port->info->xmit; ++ ++ pdc->buf = xmit->buf; ++ pdc->dma_addr = dma_map_single(port->dev, ++ pdc->buf, ++ UART_XMIT_SIZE, ++ DMA_TO_DEVICE); ++ pdc->dma_size = UART_XMIT_SIZE; ++ pdc->ofs = 0; + } + -+ DBG(DBG_GADGET, "registered driver `%s'\n", driver->driver.name); -+ -+ udc->vbus_prev = 0; -+ if (udc->vbus_pin != -1) -+ enable_irq(gpio_to_irq(udc->vbus_pin)); -+ -+ /* If Vbus is present, enable the controller and wait for reset */ -+ spin_lock_irqsave(&udc->lock, flags); -+ if (vbus_is_present(udc) && udc->vbus_prev == 0) { -+ usba_writel(udc, CTRL, USBA_EN_USBA); -+ usba_writel(udc, INT_ENB, USBA_END_OF_RESET); ++ /* + * If there is a specific "open" function (to register + * control line interrupts) + */ +@@ -437,9 +880,21 @@ static int atmel_startup(struct uart_port *port) + * Finally, enable the serial port + */ + UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX); +- UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN); /* enable xmit & rcvr */ ++ /* enable xmit & rcvr */ ++ UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN); + +- UART_PUT_IER(port, ATMEL_US_RXRDY); /* enable receive only */ ++ if (atmel_use_dma_rx(port)) { ++ /* set UART timeout */ ++ UART_PUT_RTOR(port, PDC_RX_TIMEOUT); ++ UART_PUT_CR(port, ATMEL_US_STTTO); ++ ++ UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT); ++ /* enable PDC controller */ ++ UART_PUT_PTCR(port, ATMEL_PDC_RXTEN); ++ } else { ++ /* enable receive only */ ++ UART_PUT_IER(port, ATMEL_US_RXRDY); + } -+ spin_unlock_irqrestore(&udc->lock, flags); -+ -+ return 0; -+ -+err_driver_bind: -+ udc->driver = NULL; -+ udc->gadget.dev.driver = NULL; -+ return ret; -+} -+EXPORT_SYMBOL(usb_gadget_register_driver); -+ -+int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) -+{ -+ struct usba_udc *udc = &the_udc; -+ unsigned long flags; -+ -+ if (!udc->pdev) -+ return -ENODEV; -+ if (driver != udc->driver) -+ return -EINVAL; -+ -+ if (udc->vbus_pin != -1) -+ disable_irq(gpio_to_irq(udc->vbus_pin)); -+ -+ spin_lock_irqsave(&udc->lock, flags); -+ udc->gadget.speed = USB_SPEED_UNKNOWN; -+ reset_all_endpoints(udc); -+ spin_unlock_irqrestore(&udc->lock, flags); -+ -+ /* This will also disable the DP pullup */ -+ usba_writel(udc, CTRL, 0); -+ -+ driver->unbind(&udc->gadget); -+ udc->gadget.dev.driver = NULL; -+ udc->driver = NULL; -+ -+ clk_disable(udc->hclk); -+ clk_disable(udc->pclk); -+ -+ DBG(DBG_GADGET, "unregistered driver `%s'\n", driver->driver.name); -+ -+ return 0; -+} -+EXPORT_SYMBOL(usb_gadget_unregister_driver); -+ -+static int __init usba_udc_probe(struct platform_device *pdev) -+{ -+ struct usba_platform_data *pdata = pdev->dev.platform_data; -+ struct resource *regs, *fifo; -+ struct clk *pclk, *hclk; -+ struct usba_udc *udc = &the_udc; -+ int irq, ret, i; + + return 0; + } +@@ -449,6 +904,38 @@ static int atmel_startup(struct uart_port *port) + */ + static void atmel_shutdown(struct uart_port *port) + { ++ struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); ++ /* ++ * Ensure everything is stopped. ++ */ ++ atmel_stop_rx(port); ++ atmel_stop_tx(port); + -+ regs = platform_get_resource(pdev, IORESOURCE_MEM, CTRL_IOMEM_ID); -+ fifo = platform_get_resource(pdev, IORESOURCE_MEM, FIFO_IOMEM_ID); -+ if (!regs || !fifo) -+ return -ENXIO; ++ /* ++ * Shut-down the DMA. ++ */ ++ if (atmel_use_dma_rx(port)) { ++ int i; + -+ irq = platform_get_irq(pdev, 0); -+ if (irq < 0) -+ return irq; ++ for (i = 0; i < 2; i++) { ++ struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i]; + -+ pclk = clk_get(&pdev->dev, "pclk"); -+ if (IS_ERR(pclk)) -+ return PTR_ERR(pclk); -+ hclk = clk_get(&pdev->dev, "hclk"); -+ if (IS_ERR(hclk)) { -+ ret = PTR_ERR(hclk); -+ goto err_get_hclk; ++ dma_unmap_single(port->dev, ++ pdc->dma_addr, ++ pdc->dma_size, ++ DMA_FROM_DEVICE); ++ kfree(pdc->buf); ++ } + } ++ if (atmel_use_dma_tx(port)) { ++ struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx; + -+ udc->pdev = pdev; -+ udc->pclk = pclk; -+ udc->hclk = hclk; -+ udc->vbus_pin = -1; -+ -+ ret = -ENOMEM; -+ udc->regs = ioremap(regs->start, regs->end - regs->start + 1); -+ if (!udc->regs) { -+ dev_err(&pdev->dev, "Unable to map I/O memory, aborting.\n"); -+ goto err_map_regs; ++ dma_unmap_single(port->dev, ++ pdc->dma_addr, ++ pdc->dma_size, ++ DMA_TO_DEVICE); + } -+ dev_info(&pdev->dev, "MMIO registers at 0x%08lx mapped at %p\n", -+ (unsigned long)regs->start, udc->regs); -+ udc->fifo = ioremap(fifo->start, fifo->end - fifo->start + 1); -+ if (!udc->fifo) { -+ dev_err(&pdev->dev, "Unable to map FIFO, aborting.\n"); -+ goto err_map_fifo; -+ } -+ dev_info(&pdev->dev, "FIFO at 0x%08lx mapped at %p\n", -+ (unsigned long)fifo->start, udc->fifo); -+ -+ device_initialize(&udc->gadget.dev); -+ udc->gadget.dev.parent = &pdev->dev; -+ udc->gadget.dev.dma_mask = pdev->dev.dma_mask; + -+ platform_set_drvdata(pdev, udc); -+ -+ /* Make sure we start from a clean slate */ -+ clk_enable(pclk); -+ usba_writel(udc, CTRL, 0); -+ clk_disable(pclk); -+ -+ INIT_LIST_HEAD(&usba_ep[0].ep.ep_list); -+ usba_ep[0].ep_regs = udc->regs + USBA_EPT_BASE(0); -+ usba_ep[0].dma_regs = udc->regs + USBA_DMA_BASE(0); -+ usba_ep[0].fifo = udc->fifo + USBA_FIFO_BASE(0); -+ for (i = 1; i < ARRAY_SIZE(usba_ep); i++) { -+ struct usba_ep *ep = &usba_ep[i]; + /* + * Disable all interrupts, port and break condition. + */ +@@ -471,45 +958,48 @@ static void atmel_shutdown(struct uart_port *port) + /* + * Power / Clock management. + */ +-static void atmel_serial_pm(struct uart_port *port, unsigned int state, unsigned int oldstate) ++static void atmel_serial_pm(struct uart_port *port, unsigned int state, ++ unsigned int oldstate) + { +- struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port; ++ struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); + + switch (state) { +- case 0: +- /* +- * Enable the peripheral clock for this serial port. +- * This is called on uart_open() or a resume event. +- */ +- clk_enable(atmel_port->clk); +- break; +- case 3: +- /* +- * Disable the peripheral clock for this serial port. +- * This is called on uart_close() or a suspend event. +- */ +- clk_disable(atmel_port->clk); +- break; +- default: +- printk(KERN_ERR "atmel_serial: unknown pm %d\n", state); ++ case 0: ++ /* ++ * Enable the peripheral clock for this serial port. ++ * This is called on uart_open() or a resume event. ++ */ ++ clk_enable(atmel_port->clk); ++ break; ++ case 3: ++ /* ++ * Disable the peripheral clock for this serial port. ++ * This is called on uart_close() or a suspend event. ++ */ ++ clk_disable(atmel_port->clk); ++ break; ++ default: ++ printk(KERN_ERR "atmel_serial: unknown pm %d\n", state); + } + } + + /* + * Change the port parameters + */ +-static void atmel_set_termios(struct uart_port *port, struct ktermios * termios, struct ktermios * old) ++static void atmel_set_termios(struct uart_port *port, struct ktermios *termios, ++ struct ktermios *old) + { + unsigned long flags; + unsigned int mode, imr, quot, baud; + + /* Get current mode register */ +- mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL | ATMEL_US_NBSTOP | ATMEL_US_PAR); ++ mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL ++ | ATMEL_US_NBSTOP | ATMEL_US_PAR); + +- baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16); ++ baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16); + quot = uart_get_divisor(port, baud); + +- if (quot > 65535) { /* BRGR is 16-bit, so switch to slower clock */ ++ if (quot > 65535) { /* BRGR is 16-bit, so switch to slower clock */ + quot /= 8; + mode |= ATMEL_US_USCLKS_MCK_DIV8; + } +@@ -536,18 +1026,17 @@ static void atmel_set_termios(struct uart_port *port, struct ktermios * termios, + + /* parity */ + if (termios->c_cflag & PARENB) { +- if (termios->c_cflag & CMSPAR) { /* Mark or Space parity */ ++ /* Mark or Space parity */ ++ if (termios->c_cflag & CMSPAR) { + if (termios->c_cflag & PARODD) + mode |= ATMEL_US_PAR_MARK; + else + mode |= ATMEL_US_PAR_SPACE; +- } +- else if (termios->c_cflag & PARODD) ++ } else if (termios->c_cflag & PARODD) + mode |= ATMEL_US_PAR_ODD; + else + mode |= ATMEL_US_PAR_EVEN; +- } +- else ++ } else + mode |= ATMEL_US_PAR_NONE; + + spin_lock_irqsave(&port->lock, flags); +@@ -558,6 +1047,10 @@ static void atmel_set_termios(struct uart_port *port, struct ktermios * termios, + if (termios->c_iflag & (BRKINT | PARMRK)) + port->read_status_mask |= ATMEL_US_RXBRK; + ++ if (atmel_use_dma_rx(port)) ++ /* need to enable error interrupts */ ++ UART_PUT_IER(port, port->read_status_mask); + -+ ep->ep_regs = udc->regs + USBA_EPT_BASE(i); -+ ep->dma_regs = udc->regs + USBA_DMA_BASE(i); -+ ep->fifo = udc->fifo + USBA_FIFO_BASE(i); + /* + * Characters to ignore + */ +@@ -573,16 +1066,16 @@ static void atmel_set_termios(struct uart_port *port, struct ktermios * termios, + if (termios->c_iflag & IGNPAR) + port->ignore_status_mask |= ATMEL_US_OVRE; + } +- +- // TODO: Ignore all characters if CREAD is set. ++ /* TODO: Ignore all characters if CREAD is set.*/ + + /* update the per-port timeout */ + uart_update_timeout(port, termios->c_cflag, baud); + +- /* disable interrupts and drain transmitter */ +- imr = UART_GET_IMR(port); /* get interrupt mask */ +- UART_PUT_IDR(port, -1); /* disable all interrupts */ +- while (!(UART_GET_CSR(port) & ATMEL_US_TXEMPTY)) { barrier(); } ++ /* save/disable interrupts and drain transmitter */ ++ imr = UART_GET_IMR(port); ++ UART_PUT_IDR(port, -1); ++ while (!(UART_GET_CSR(port) & ATMEL_US_TXEMPTY)) ++ cpu_relax(); + + /* disable receiver and transmitter */ + UART_PUT_CR(port, ATMEL_US_TXDIS | ATMEL_US_RXDIS); +@@ -708,7 +1201,8 @@ static struct uart_ops atmel_pops = { + /* + * Configure the port from the platform device resource info. + */ +-static void __devinit atmel_init_port(struct atmel_uart_port *atmel_port, struct platform_device *pdev) ++static void __devinit atmel_init_port(struct atmel_uart_port *atmel_port, ++ struct platform_device *pdev) + { + struct uart_port *port = &atmel_port->uart; + struct atmel_uart_data *data = pdev->dev.platform_data; +@@ -723,6 +1217,11 @@ static void __devinit atmel_init_port(struct atmel_uart_port *atmel_port, struct + port->mapbase = pdev->resource[0].start; + port->irq = pdev->resource[1].start; + ++ tasklet_init(&atmel_port->tasklet, atmel_tasklet_func, ++ (unsigned long)port); + -+ list_add_tail(&ep->ep.ep_list, &udc->gadget.ep_list); -+ } ++ memset(&atmel_port->rx_ring, 0, sizeof(atmel_port->rx_ring)); + -+ ret = request_irq(irq, usba_udc_irq, 0, "atmel_usba_udc", udc); -+ if (ret) { -+ dev_err(&pdev->dev, "Cannot request irq %d (error %d)\n", -+ irq, ret); -+ goto err_request_irq; -+ } -+ udc->irq = irq; + if (data->regs) + /* Already mapped by setup code */ + port->membase = data->regs; +@@ -731,11 +1230,17 @@ static void __devinit atmel_init_port(struct atmel_uart_port *atmel_port, struct + port->membase = NULL; + } + +- if (!atmel_port->clk) { /* for console, the clock could already be configured */ ++ /* for console, the clock could already be configured */ ++ if (!atmel_port->clk) { + atmel_port->clk = clk_get(&pdev->dev, "usart"); + clk_enable(atmel_port->clk); + port->uartclk = clk_get_rate(atmel_port->clk); + } + -+ ret = device_add(&udc->gadget.dev); -+ if (ret) { -+ dev_dbg(&pdev->dev, "Could not add gadget: %d\n", ret); -+ goto err_device_add; -+ } -+ -+ if (pdata && pdata->vbus_pin != GPIO_PIN_NONE) { -+ if (!gpio_request(pdata->vbus_pin, "atmel_usba_udc")) { -+ udc->vbus_pin = pdata->vbus_pin; -+ -+ ret = request_irq(gpio_to_irq(udc->vbus_pin), -+ usba_vbus_irq, 0, -+ "atmel_usba_udc", udc); -+ if (ret) { -+ gpio_free(udc->vbus_pin); -+ udc->vbus_pin = -1; -+ dev_warn(&udc->pdev->dev, -+ "failed to request vbus irq; " -+ "assuming always on\n"); -+ } else { -+ disable_irq(gpio_to_irq(udc->vbus_pin)); -+ } -+ } ++ atmel_port->use_dma_rx = data->use_dma_rx; ++ atmel_port->use_dma_tx = data->use_dma_tx; ++ if (atmel_use_dma_tx(port)) ++ port->fifosize = PDC_BUFFER_SIZE; + } + + /* +@@ -755,12 +1260,11 @@ void __init atmel_register_uart_fns(struct atmel_port_fns *fns) + atmel_pops.set_wake = fns->set_wake; + } + +- + #ifdef CONFIG_SERIAL_ATMEL_CONSOLE + static void atmel_console_putchar(struct uart_port *port, int ch) + { + while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY)) +- barrier(); ++ cpu_relax(); + UART_PUT_CHAR(port, ch); + } + +@@ -773,38 +1277,40 @@ static void atmel_console_write(struct console *co, const char *s, u_int count) + unsigned int status, imr; + + /* +- * First, save IMR and then disable interrupts ++ * First, save IMR and then disable interrupts + */ +- imr = UART_GET_IMR(port); /* get interrupt mask */ ++ imr = UART_GET_IMR(port); + UART_PUT_IDR(port, ATMEL_US_RXRDY | ATMEL_US_TXRDY); + + uart_console_write(port, s, count, atmel_console_putchar); + + /* +- * Finally, wait for transmitter to become empty +- * and restore IMR ++ * Finally, wait for transmitter to become empty ++ * and restore IMR + */ + do { + status = UART_GET_CSR(port); + } while (!(status & ATMEL_US_TXRDY)); +- UART_PUT_IER(port, imr); /* set interrupts back the way they were */ ++ /* set interrupts back the way they were */ ++ UART_PUT_IER(port, imr); + } + + /* +- * If the port was already initialised (eg, by a boot loader), try to determine +- * the current setup. ++ * If the port was already initialised (eg, by a boot loader), ++ * try to determine the current setup. + */ +-static void __init atmel_console_get_options(struct uart_port *port, int *baud, int *parity, int *bits) ++static void __init atmel_console_get_options(struct uart_port *port, int *baud, ++ int *parity, int *bits) + { + unsigned int mr, quot; + +-// TODO: CR is a write-only register +-// unsigned int cr; +-// +-// cr = UART_GET_CR(port) & (ATMEL_US_RXEN | ATMEL_US_TXEN); +-// if (cr == (ATMEL_US_RXEN | ATMEL_US_TXEN)) { +-// /* ok, the port was enabled */ +-// } ++ /* ++ * If the baud rate generator isn't running, the port wasn't ++ * initialized by the boot loader. ++ */ ++ quot = UART_GET_BRGR(port); ++ if (!quot) ++ return; + + mr = UART_GET_MR(port) & ATMEL_US_CHRL; + if (mr == ATMEL_US_CHRL_8) +@@ -824,7 +1330,6 @@ static void __init atmel_console_get_options(struct uart_port *port, int *baud, + * lower than one of those, as it would make us fall through + * to a much lower baud rate than we really want. + */ +- quot = UART_GET_BRGR(port); + *baud = port->uartclk / (16 * (quot - 1)); + } + +@@ -836,10 +1341,12 @@ static int __init atmel_console_setup(struct console *co, char *options) + int parity = 'n'; + int flow = 'n'; + +- if (port->membase == 0) /* Port not initialized yet - delay setup */ ++ if (port->membase == NULL) { ++ /* Port not initialized yet - delay setup */ + return -ENODEV; + } + +- UART_PUT_IDR(port, -1); /* disable interrupts */ ++ UART_PUT_IDR(port, -1); + UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX); + UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN); + +@@ -871,13 +1378,16 @@ static struct console atmel_console = { + static int __init atmel_console_init(void) + { + if (atmel_default_console_device) { +- add_preferred_console(ATMEL_DEVICENAME, atmel_default_console_device->id, NULL); +- atmel_init_port(&(atmel_ports[atmel_default_console_device->id]), atmel_default_console_device); ++ add_preferred_console(ATMEL_DEVICENAME, ++ atmel_default_console_device->id, NULL); ++ atmel_init_port(&atmel_ports[atmel_default_console_device->id], ++ atmel_default_console_device); + register_console(&atmel_console); + } + + return 0; + } + -+ usba_init_debugfs(udc); -+ for (i = 1; i < ARRAY_SIZE(usba_ep); i++) -+ usba_ep_init_debugfs(udc, &usba_ep[i]); -+ -+ return 0; -+ -+err_device_add: -+ free_irq(irq, udc); -+err_request_irq: -+ iounmap(udc->fifo); -+err_map_fifo: -+ iounmap(udc->regs); -+err_map_regs: -+ clk_put(hclk); -+err_get_hclk: -+ clk_put(pclk); -+ -+ platform_set_drvdata(pdev, NULL); -+ -+ return ret; -+} + console_initcall(atmel_console_init); + + /* +@@ -885,34 +1395,48 @@ console_initcall(atmel_console_init); + */ + static int __init atmel_late_console_init(void) + { +- if (atmel_default_console_device && !(atmel_console.flags & CON_ENABLED)) ++ if (atmel_default_console_device ++ && !(atmel_console.flags & CON_ENABLED)) + register_console(&atmel_console); + + return 0; + } + -+static int __exit usba_udc_remove(struct platform_device *pdev) + core_initcall(atmel_late_console_init); + ++static inline bool atmel_is_console_port(struct uart_port *port) +{ -+ struct usba_udc *udc; -+ int i; -+ -+ udc = platform_get_drvdata(pdev); -+ -+ for (i = 1; i < ARRAY_SIZE(usba_ep); i++) -+ usba_ep_cleanup_debugfs(&usba_ep[i]); -+ usba_cleanup_debugfs(udc); -+ -+ if (udc->vbus_pin != -1) -+ gpio_free(udc->vbus_pin); -+ -+ free_irq(udc->irq, udc); -+ iounmap(udc->fifo); -+ iounmap(udc->regs); -+ clk_put(udc->hclk); -+ clk_put(udc->pclk); -+ -+ device_unregister(&udc->gadget.dev); -+ -+ return 0; ++ return port->cons && port->cons->index == port->line; +} + -+static struct platform_driver udc_driver = { -+ .remove = __exit_p(usba_udc_remove), -+ .driver = { -+ .name = "atmel_usba_udc", -+ }, -+}; -+ -+static int __init udc_init(void) -+{ -+ return platform_driver_probe(&udc_driver, usba_udc_probe); -+} -+module_init(udc_init); + #else + #define ATMEL_CONSOLE_DEVICE NULL + -+static void __exit udc_exit(void) ++static inline bool atmel_is_console_port(struct uart_port *port) +{ -+ platform_driver_unregister(&udc_driver); ++ return false; +} -+module_exit(udc_exit); -+ -+MODULE_DESCRIPTION("Atmel USBA UDC driver"); -+MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>"); -+MODULE_LICENSE("GPL"); -diff --git a/drivers/usb/gadget/atmel_usba_udc.h b/drivers/usb/gadget/atmel_usba_udc.h -new file mode 100644 -index 0000000..f4f0f8b ---- /dev/null -+++ b/drivers/usb/gadget/atmel_usba_udc.h -@@ -0,0 +1,350 @@ -+/* -+ * Driver for the Atmel USBA high speed USB device controller -+ * -+ * Copyright (C) 2005-2007 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#ifndef __LINUX_USB_GADGET_USBA_UDC_H__ -+#define __LINUX_USB_GADGET_USBA_UDC_H__ -+ -+/* USB register offsets */ -+#define USBA_CTRL 0x0000 -+#define USBA_FNUM 0x0004 -+#define USBA_INT_ENB 0x0010 -+#define USBA_INT_STA 0x0014 -+#define USBA_INT_CLR 0x0018 -+#define USBA_EPT_RST 0x001c -+#define USBA_TST 0x00e0 -+ -+/* USB endpoint register offsets */ -+#define USBA_EPT_CFG 0x0000 -+#define USBA_EPT_CTL_ENB 0x0004 -+#define USBA_EPT_CTL_DIS 0x0008 -+#define USBA_EPT_CTL 0x000c -+#define USBA_EPT_SET_STA 0x0014 -+#define USBA_EPT_CLR_STA 0x0018 -+#define USBA_EPT_STA 0x001c -+ -+/* USB DMA register offsets */ -+#define USBA_DMA_NXT_DSC 0x0000 -+#define USBA_DMA_ADDRESS 0x0004 -+#define USBA_DMA_CONTROL 0x0008 -+#define USBA_DMA_STATUS 0x000c -+ -+/* Bitfields in CTRL */ -+#define USBA_DEV_ADDR_OFFSET 0 -+#define USBA_DEV_ADDR_SIZE 7 -+#define USBA_FADDR_EN (1 << 7) -+#define USBA_EN_USBA (1 << 8) -+#define USBA_DETACH (1 << 9) -+#define USBA_REMOTE_WAKE_UP (1 << 10) -+ -+/* Bitfields in FNUM */ -+#define USBA_MICRO_FRAME_NUM_OFFSET 0 -+#define USBA_MICRO_FRAME_NUM_SIZE 3 -+#define USBA_FRAME_NUMBER_OFFSET 3 -+#define USBA_FRAME_NUMBER_SIZE 11 -+#define USBA_FRAME_NUM_ERROR (1 << 31) -+ -+/* Bitfields in INT_ENB/INT_STA/INT_CLR */ -+#define USBA_HIGH_SPEED (1 << 0) -+#define USBA_DET_SUSPEND (1 << 1) -+#define USBA_MICRO_SOF (1 << 2) -+#define USBA_SOF (1 << 3) -+#define USBA_END_OF_RESET (1 << 4) -+#define USBA_WAKE_UP (1 << 5) -+#define USBA_END_OF_RESUME (1 << 6) -+#define USBA_UPSTREAM_RESUME (1 << 7) -+#define USBA_EPT_INT_OFFSET 8 -+#define USBA_EPT_INT_SIZE 16 -+#define USBA_DMA_INT_OFFSET 24 -+#define USBA_DMA_INT_SIZE 8 -+ -+/* Bitfields in EPT_RST */ -+#define USBA_RST_OFFSET 0 -+#define USBA_RST_SIZE 16 -+ -+/* Bitfields in USBA_TST */ -+#define USBA_SPEED_CFG_OFFSET 0 -+#define USBA_SPEED_CFG_SIZE 2 -+#define USBA_TST_J_MODE (1 << 2) -+#define USBA_TST_K_MODE (1 << 3) -+#define USBA_TST_PKT_MODE (1 << 4) -+#define USBA_OPMODE2 (1 << 5) -+ -+/* Bitfields in EPT_CFG */ -+#define USBA_EPT_SIZE_OFFSET 0 -+#define USBA_EPT_SIZE_SIZE 3 -+#define USBA_EPT_DIR_IN (1 << 3) -+#define USBA_EPT_TYPE_OFFSET 4 -+#define USBA_EPT_TYPE_SIZE 2 -+#define USBA_BK_NUMBER_OFFSET 6 -+#define USBA_BK_NUMBER_SIZE 2 -+#define USBA_NB_TRANS_OFFSET 8 -+#define USBA_NB_TRANS_SIZE 2 -+#define USBA_EPT_MAPPED (1 << 31) -+ -+/* Bitfields in EPT_CTL/EPT_CTL_ENB/EPT_CTL_DIS */ -+#define USBA_EPT_ENABLE (1 << 0) -+#define USBA_AUTO_VALID (1 << 1) -+#define USBA_INTDIS_DMA (1 << 3) -+#define USBA_NYET_DIS (1 << 4) -+#define USBA_DATAX_RX (1 << 6) -+#define USBA_MDATA_RX (1 << 7) -+/* Bits 8-15 and 31 enable interrupts for respective bits in EPT_STA */ -+#define USBA_BUSY_BANK_IE (1 << 18) -+ -+/* Bitfields in EPT_SET_STA/EPT_CLR_STA/EPT_STA */ -+#define USBA_FORCE_STALL (1 << 5) -+#define USBA_TOGGLE_CLR (1 << 6) -+#define USBA_TOGGLE_SEQ_OFFSET 6 -+#define USBA_TOGGLE_SEQ_SIZE 2 -+#define USBA_ERR_OVFLW (1 << 8) -+#define USBA_RX_BK_RDY (1 << 9) -+#define USBA_KILL_BANK (1 << 9) -+#define USBA_TX_COMPLETE (1 << 10) -+#define USBA_TX_PK_RDY (1 << 11) -+#define USBA_ISO_ERR_TRANS (1 << 11) -+#define USBA_RX_SETUP (1 << 12) -+#define USBA_ISO_ERR_FLOW (1 << 12) -+#define USBA_STALL_SENT (1 << 13) -+#define USBA_ISO_ERR_CRC (1 << 13) -+#define USBA_ISO_ERR_NBTRANS (1 << 13) -+#define USBA_NAK_IN (1 << 14) -+#define USBA_ISO_ERR_FLUSH (1 << 14) -+#define USBA_NAK_OUT (1 << 15) -+#define USBA_CURRENT_BANK_OFFSET 16 -+#define USBA_CURRENT_BANK_SIZE 2 -+#define USBA_BUSY_BANKS_OFFSET 18 -+#define USBA_BUSY_BANKS_SIZE 2 -+#define USBA_BYTE_COUNT_OFFSET 20 -+#define USBA_BYTE_COUNT_SIZE 11 -+#define USBA_SHORT_PACKET (1 << 31) -+ -+/* Bitfields in DMA_CONTROL */ -+#define USBA_DMA_CH_EN (1 << 0) -+#define USBA_DMA_LINK (1 << 1) -+#define USBA_DMA_END_TR_EN (1 << 2) -+#define USBA_DMA_END_BUF_EN (1 << 3) -+#define USBA_DMA_END_TR_IE (1 << 4) -+#define USBA_DMA_END_BUF_IE (1 << 5) -+#define USBA_DMA_DESC_LOAD_IE (1 << 6) -+#define USBA_DMA_BURST_LOCK (1 << 7) -+#define USBA_DMA_BUF_LEN_OFFSET 16 -+#define USBA_DMA_BUF_LEN_SIZE 16 -+ -+/* Bitfields in DMA_STATUS */ -+#define USBA_DMA_CH_ACTIVE (1 << 1) -+#define USBA_DMA_END_TR_ST (1 << 4) -+#define USBA_DMA_END_BUF_ST (1 << 5) -+#define USBA_DMA_DESC_LOAD_ST (1 << 6) -+ -+/* Constants for SPEED_CFG */ -+#define USBA_SPEED_CFG_NORMAL 0 -+#define USBA_SPEED_CFG_FORCE_HIGH 2 -+#define USBA_SPEED_CFG_FORCE_FULL 3 -+ -+/* Constants for EPT_SIZE */ -+#define USBA_EPT_SIZE_8 0 -+#define USBA_EPT_SIZE_16 1 -+#define USBA_EPT_SIZE_32 2 -+#define USBA_EPT_SIZE_64 3 -+#define USBA_EPT_SIZE_128 4 -+#define USBA_EPT_SIZE_256 5 -+#define USBA_EPT_SIZE_512 6 -+#define USBA_EPT_SIZE_1024 7 -+ -+/* Constants for EPT_TYPE */ -+#define USBA_EPT_TYPE_CONTROL 0 -+#define USBA_EPT_TYPE_ISO 1 -+#define USBA_EPT_TYPE_BULK 2 -+#define USBA_EPT_TYPE_INT 3 -+ -+/* Constants for BK_NUMBER */ -+#define USBA_BK_NUMBER_ZERO 0 -+#define USBA_BK_NUMBER_ONE 1 -+#define USBA_BK_NUMBER_DOUBLE 2 -+#define USBA_BK_NUMBER_TRIPLE 3 -+ -+/* Bit manipulation macros */ -+#define USBA_BF(name, value) \ -+ (((value) & ((1 << USBA_##name##_SIZE) - 1)) \ -+ << USBA_##name##_OFFSET) -+#define USBA_BFEXT(name, value) \ -+ (((value) >> USBA_##name##_OFFSET) \ -+ & ((1 << USBA_##name##_SIZE) - 1)) -+#define USBA_BFINS(name, value, old) \ -+ (((old) & ~(((1 << USBA_##name##_SIZE) - 1) \ -+ << USBA_##name##_OFFSET)) \ -+ | USBA_BF(name, value)) -+ -+/* Register access macros */ -+#define usba_readl(udc, reg) \ -+ __raw_readl((udc)->regs + USBA_##reg) -+#define usba_writel(udc, reg, value) \ -+ __raw_writel((value), (udc)->regs + USBA_##reg) -+#define usba_ep_readl(ep, reg) \ -+ __raw_readl((ep)->ep_regs + USBA_EPT_##reg) -+#define usba_ep_writel(ep, reg, value) \ -+ __raw_writel((value), (ep)->ep_regs + USBA_EPT_##reg) -+#define usba_dma_readl(ep, reg) \ -+ __raw_readl((ep)->dma_regs + USBA_DMA_##reg) -+#define usba_dma_writel(ep, reg, value) \ -+ __raw_writel((value), (ep)->dma_regs + USBA_DMA_##reg) -+ -+/* Calculate base address for a given endpoint or DMA controller */ -+#define USBA_EPT_BASE(x) (0x100 + (x) * 0x20) -+#define USBA_DMA_BASE(x) (0x300 + (x) * 0x10) -+#define USBA_FIFO_BASE(x) ((x) << 16) -+ -+/* Synth parameters */ -+#define USBA_NR_ENDPOINTS 7 -+ -+#define EP0_FIFO_SIZE 64 -+#define EP0_EPT_SIZE USBA_EPT_SIZE_64 -+#define EP0_NR_BANKS 1 -+ -+/* -+ * REVISIT: Try to eliminate this value. Can we rely on req->mapped to -+ * provide this information? -+ */ -+#define DMA_ADDR_INVALID (~(dma_addr_t)0) -+ -+#define FIFO_IOMEM_ID 0 -+#define CTRL_IOMEM_ID 1 -+ -+#ifdef DEBUG -+#define DBG_ERR 0x0001 /* report all error returns */ -+#define DBG_HW 0x0002 /* debug hardware initialization */ -+#define DBG_GADGET 0x0004 /* calls to/from gadget driver */ -+#define DBG_INT 0x0008 /* interrupts */ -+#define DBG_BUS 0x0010 /* report changes in bus state */ -+#define DBG_QUEUE 0x0020 /* debug request queue processing */ -+#define DBG_FIFO 0x0040 /* debug FIFO contents */ -+#define DBG_DMA 0x0080 /* debug DMA handling */ -+#define DBG_REQ 0x0100 /* print out queued request length */ -+#define DBG_ALL 0xffff -+#define DBG_NONE 0x0000 -+ -+#define DEBUG_LEVEL (DBG_ERR) -+#define DBG(level, fmt, ...) \ -+ do { \ -+ if ((level) & DEBUG_LEVEL) \ -+ printk(KERN_DEBUG "udc: " fmt, ## __VA_ARGS__); \ -+ } while (0) -+#else -+#define DBG(level, fmt...) -+#endif -+ -+enum usba_ctrl_state { -+ WAIT_FOR_SETUP, -+ DATA_STAGE_IN, -+ DATA_STAGE_OUT, -+ STATUS_STAGE_IN, -+ STATUS_STAGE_OUT, -+ STATUS_STAGE_ADDR, -+ STATUS_STAGE_TEST, -+}; -+/* -+ EP_STATE_IDLE, -+ EP_STATE_SETUP, -+ EP_STATE_IN_DATA, -+ EP_STATE_OUT_DATA, -+ EP_STATE_SET_ADDR_STATUS, -+ EP_STATE_RX_STATUS, -+ EP_STATE_TX_STATUS, -+ EP_STATE_HALT, -+*/ -+ -+struct usba_dma_desc { -+ dma_addr_t next; -+ dma_addr_t addr; -+ u32 ctrl; -+}; -+ -+struct usba_ep { -+ int state; -+ void __iomem *ep_regs; -+ void __iomem *dma_regs; -+ void __iomem *fifo; -+ struct usb_ep ep; -+ struct usba_udc *udc; -+ -+ struct list_head queue; -+ const struct usb_endpoint_descriptor *desc; -+ -+ u16 fifo_size; -+ u8 nr_banks; -+ u8 index; -+ unsigned int can_dma:1; -+ unsigned int can_isoc:1; -+ unsigned int is_isoc:1; -+ unsigned int is_in:1; -+ -+#ifdef CONFIG_USB_GADGET_DEBUG_FS -+ u32 last_dma_status; -+ struct dentry *debugfs_dir; -+ struct dentry *debugfs_queue; -+ struct dentry *debugfs_dma_status; -+ struct dentry *debugfs_state; -+#endif -+}; -+ -+struct usba_request { -+ struct usb_request req; -+ struct list_head queue; + #endif + + static struct uart_driver atmel_uart = { +- .owner = THIS_MODULE, +- .driver_name = "atmel_serial", +- .dev_name = ATMEL_DEVICENAME, +- .major = SERIAL_ATMEL_MAJOR, +- .minor = MINOR_START, +- .nr = ATMEL_MAX_UART, +- .cons = ATMEL_CONSOLE_DEVICE, ++ .owner = THIS_MODULE, ++ .driver_name = "atmel_serial", ++ .dev_name = ATMEL_DEVICENAME, ++ .major = SERIAL_ATMEL_MAJOR, ++ .minor = MINOR_START, ++ .nr = ATMEL_MAX_UART, ++ .cons = ATMEL_CONSOLE_DEVICE, + }; + + #ifdef CONFIG_PM +-static int atmel_serial_suspend(struct platform_device *pdev, pm_message_t state) ++static int atmel_serial_suspend(struct platform_device *pdev, ++ pm_message_t state) + { + struct uart_port *port = platform_get_drvdata(pdev); +- struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port; ++ struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); + +- if (device_may_wakeup(&pdev->dev) && !at91_suspend_entering_slow_clock()) ++ if (device_may_wakeup(&pdev->dev) ++ && !at91_suspend_entering_slow_clock()) + enable_irq_wake(port->irq); + else { + uart_suspend_port(&atmel_uart, port); +@@ -925,13 +1449,12 @@ static int atmel_serial_suspend(struct platform_device *pdev, pm_message_t state + static int atmel_serial_resume(struct platform_device *pdev) + { + struct uart_port *port = platform_get_drvdata(pdev); +- struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port; ++ struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); + + if (atmel_port->suspended) { + uart_resume_port(&atmel_uart, port); + atmel_port->suspended = 0; +- } +- else ++ } else + disable_irq_wake(port->irq); + + return 0; +@@ -944,15 +1467,40 @@ static int atmel_serial_resume(struct platform_device *pdev) + static int __devinit atmel_serial_probe(struct platform_device *pdev) + { + struct atmel_uart_port *port; ++ void *data; + int ret; + ++ BUILD_BUG_ON(!is_power_of_2(ATMEL_SERIAL_RINGSIZE)); + -+ u32 ctrl; + port = &atmel_ports[pdev->id]; + atmel_init_port(port, pdev); + ++ if (!atmel_use_dma_rx(&port->uart)) { ++ ret = -ENOMEM; ++ data = kmalloc(sizeof(struct atmel_uart_char) ++ * ATMEL_SERIAL_RINGSIZE, GFP_KERNEL); ++ if (!data) ++ goto err_alloc_ring; ++ port->rx_ring.buf = data; ++ } + -+ unsigned int submitted:1; -+ unsigned int last_transaction:1; -+ unsigned int using_dma:1; -+ unsigned int mapped:1; -+}; + ret = uart_add_one_port(&atmel_uart, &port->uart); +- if (!ret) { +- device_init_wakeup(&pdev->dev, 1); +- platform_set_drvdata(pdev, port); ++ if (ret) ++ goto err_add_port; + -+struct usba_udc { -+ /* Protect hw registers from concurrent modifications */ -+ spinlock_t lock; ++ device_init_wakeup(&pdev->dev, 1); ++ platform_set_drvdata(pdev, port); + -+ void __iomem *regs; -+ void __iomem *fifo; ++ return 0; + -+ struct usb_gadget gadget; -+ struct usb_gadget_driver *driver; -+ struct platform_device *pdev; -+ int irq; -+ int vbus_pin; -+ struct clk *pclk; -+ struct clk *hclk; ++err_add_port: ++ kfree(port->rx_ring.buf); ++ port->rx_ring.buf = NULL; ++err_alloc_ring: ++ if (!atmel_is_console_port(&port->uart)) { ++ clk_disable(port->clk); ++ clk_put(port->clk); ++ port->clk = NULL; + } + + return ret; +@@ -961,19 +1509,21 @@ static int __devinit atmel_serial_probe(struct platform_device *pdev) + static int __devexit atmel_serial_remove(struct platform_device *pdev) + { + struct uart_port *port = platform_get_drvdata(pdev); +- struct atmel_uart_port *atmel_port = (struct atmel_uart_port *) port; ++ struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); + int ret = 0; + +- clk_disable(atmel_port->clk); +- clk_put(atmel_port->clk); +- + device_init_wakeup(&pdev->dev, 0); + platform_set_drvdata(pdev, NULL); + +- if (port) { +- ret = uart_remove_one_port(&atmel_uart, port); +- kfree(port); +- } ++ ret = uart_remove_one_port(&atmel_uart, port); + -+ int test_mode; -+ int vbus_prev; ++ tasklet_kill(&atmel_port->tasklet); ++ kfree(atmel_port->rx_ring.buf); + -+#ifdef CONFIG_USB_GADGET_DEBUG_FS -+ struct dentry *debugfs_root; -+ struct dentry *debugfs_regs; -+#endif -+}; ++ /* "port" is allocated statically, so we shouldn't free it */ + -+static inline struct usba_ep *to_usba_ep(struct usb_ep *ep) ++ clk_disable(atmel_port->clk); ++ clk_put(atmel_port->clk); + + return ret; + } +diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c +index ff10808..293b7ca 100644 +--- a/drivers/spi/atmel_spi.c ++++ b/drivers/spi/atmel_spi.c +@@ -51,7 +51,9 @@ struct atmel_spi { + u8 stopping; + struct list_head queue; + struct spi_transfer *current_transfer; +- unsigned long remaining_bytes; ++ unsigned long current_remaining_bytes; ++ struct spi_transfer *next_transfer; ++ unsigned long next_remaining_bytes; + + void *buffer; + dma_addr_t buffer_dma; +@@ -121,6 +123,48 @@ static void cs_deactivate(struct atmel_spi *as, struct spi_device *spi) + gpio_set_value(gpio, !active); + } + ++static inline int atmel_spi_xfer_is_last(struct spi_message *msg, ++ struct spi_transfer *xfer) +{ -+ return container_of(ep, struct usba_ep, ep); ++ return msg->transfers.prev == &xfer->transfer_list; +} + -+static inline struct usba_request *to_usba_req(struct usb_request *req) ++static inline int atmel_spi_xfer_can_be_chained(struct spi_transfer *xfer) +{ -+ return container_of(req, struct usba_request, req); ++ return xfer->delay_usecs == 0 && !xfer->cs_change; +} + -+static inline struct usba_udc *to_usba_udc(struct usb_gadget *gadget) ++static void atmel_spi_next_xfer_data(struct spi_master *master, ++ struct spi_transfer *xfer, ++ dma_addr_t *tx_dma, ++ dma_addr_t *rx_dma, ++ u32 *plen) +{ -+ return container_of(gadget, struct usba_udc, gadget); ++ struct atmel_spi *as = spi_master_get_devdata(master); ++ u32 len = *plen; ++ ++ /* use scratch buffer only when rx or tx data is unspecified */ ++ if (xfer->rx_buf) ++ *rx_dma = xfer->rx_dma + xfer->len - len; ++ else { ++ *rx_dma = as->buffer_dma; ++ if (len > BUFFER_SIZE) ++ len = BUFFER_SIZE; ++ } ++ if (xfer->tx_buf) ++ *tx_dma = xfer->tx_dma + xfer->len - len; ++ else { ++ *tx_dma = as->buffer_dma; ++ if (len > BUFFER_SIZE) ++ len = BUFFER_SIZE; ++ memset(as->buffer, 0, len); ++ dma_sync_single_for_device(&as->pdev->dev, ++ as->buffer_dma, len, DMA_TO_DEVICE); ++ } ++ ++ *plen = len; +} + -+#define ep_is_control(ep) ((ep)->index == 0) -+#define ep_is_idle(ep) ((ep)->state == EP_STATE_IDLE) + /* + * Submit next transfer for DMA. + * lock is held, spi irq is blocked +@@ -130,53 +174,78 @@ static void atmel_spi_next_xfer(struct spi_master *master, + { + struct atmel_spi *as = spi_master_get_devdata(master); + struct spi_transfer *xfer; +- u32 len; ++ u32 len, remaining, total; + dma_addr_t tx_dma, rx_dma; + +- xfer = as->current_transfer; +- if (!xfer || as->remaining_bytes == 0) { +- if (xfer) +- xfer = list_entry(xfer->transfer_list.next, +- struct spi_transfer, transfer_list); +- else +- xfer = list_entry(msg->transfers.next, +- struct spi_transfer, transfer_list); +- as->remaining_bytes = xfer->len; +- as->current_transfer = xfer; +- } ++ if (!as->current_transfer) ++ xfer = list_entry(msg->transfers.next, ++ struct spi_transfer, transfer_list); ++ else if (!as->next_transfer) ++ xfer = list_entry(as->current_transfer->transfer_list.next, ++ struct spi_transfer, transfer_list); ++ else ++ xfer = NULL; + +- len = as->remaining_bytes; ++ if (xfer) { ++ len = xfer->len; ++ atmel_spi_next_xfer_data(master, xfer, &tx_dma, &rx_dma, &len); ++ remaining = xfer->len - len; + +- tx_dma = xfer->tx_dma + xfer->len - len; +- rx_dma = xfer->rx_dma + xfer->len - len; ++ spi_writel(as, RPR, rx_dma); ++ spi_writel(as, TPR, tx_dma); + +- /* use scratch buffer only when rx or tx data is unspecified */ +- if (!xfer->rx_buf) { +- rx_dma = as->buffer_dma; +- if (len > BUFFER_SIZE) +- len = BUFFER_SIZE; +- } +- if (!xfer->tx_buf) { +- tx_dma = as->buffer_dma; +- if (len > BUFFER_SIZE) +- len = BUFFER_SIZE; +- memset(as->buffer, 0, len); +- dma_sync_single_for_device(&as->pdev->dev, +- as->buffer_dma, len, DMA_TO_DEVICE); ++ if (msg->spi->bits_per_word > 8) ++ len >>= 1; ++ spi_writel(as, RCR, len); ++ spi_writel(as, TCR, len); ++ ++ dev_dbg(&msg->spi->dev, ++ " start xfer %p: len %u tx %p/%08x rx %p/%08x\n", ++ xfer, xfer->len, xfer->tx_buf, xfer->tx_dma, ++ xfer->rx_buf, xfer->rx_dma); ++ } else { ++ xfer = as->next_transfer; ++ remaining = as->next_remaining_bytes; + } + +- spi_writel(as, RPR, rx_dma); +- spi_writel(as, TPR, tx_dma); ++ as->current_transfer = xfer; ++ as->current_remaining_bytes = remaining; + +- as->remaining_bytes -= len; +- if (msg->spi->bits_per_word > 8) +- len >>= 1; ++ if (remaining > 0) ++ len = remaining; ++ else if (!atmel_spi_xfer_is_last(msg, xfer) ++ && atmel_spi_xfer_can_be_chained(xfer)) { ++ xfer = list_entry(xfer->transfer_list.next, ++ struct spi_transfer, transfer_list); ++ len = xfer->len; ++ } else ++ xfer = NULL; + +- /* REVISIT: when xfer->delay_usecs == 0, the PDC "next transfer" +- * mechanism might help avoid the IRQ latency between transfers +- * (and improve the nCS0 errata handling on at91rm9200 chips) +- * +- * We're also waiting for ENDRX before we start the next ++ as->next_transfer = xfer; ++ ++ if (xfer) { ++ total = len; ++ atmel_spi_next_xfer_data(master, xfer, &tx_dma, &rx_dma, &len); ++ as->next_remaining_bytes = total - len; ++ ++ spi_writel(as, RNPR, rx_dma); ++ spi_writel(as, TNPR, tx_dma); ++ ++ if (msg->spi->bits_per_word > 8) ++ len >>= 1; ++ spi_writel(as, RNCR, len); ++ spi_writel(as, TNCR, len); ++ ++ dev_dbg(&msg->spi->dev, ++ " next xfer %p: len %u tx %p/%08x rx %p/%08x\n", ++ xfer, xfer->len, xfer->tx_buf, xfer->tx_dma, ++ xfer->rx_buf, xfer->rx_dma); ++ } else { ++ spi_writel(as, RNCR, 0); ++ spi_writel(as, TNCR, 0); ++ } + -+#endif /* __LINUX_USB_GADGET_USBA_UDC_H */ ++ /* REVISIT: We're waiting for ENDRX before we start the next + * transfer because we need to handle some difficult timing + * issues otherwise. If we wait for ENDTX in one transfer and + * then starts waiting for ENDRX in the next, it's difficult +@@ -186,17 +255,7 @@ static void atmel_spi_next_xfer(struct spi_master *master, + * + * It should be doable, though. Just not now... + */ +- spi_writel(as, TNCR, 0); +- spi_writel(as, RNCR, 0); + spi_writel(as, IER, SPI_BIT(ENDRX) | SPI_BIT(OVRES)); +- +- dev_dbg(&msg->spi->dev, +- " start xfer %p: len %u tx %p/%08x rx %p/%08x imr %03x\n", +- xfer, xfer->len, xfer->tx_buf, xfer->tx_dma, +- xfer->rx_buf, xfer->rx_dma, spi_readl(as, IMR)); +- +- spi_writel(as, RCR, len); +- spi_writel(as, TCR, len); + spi_writel(as, PTCR, SPI_BIT(TXTEN) | SPI_BIT(RXTEN)); + } + +@@ -294,6 +353,7 @@ atmel_spi_msg_done(struct spi_master *master, struct atmel_spi *as, + spin_lock(&as->lock); + + as->current_transfer = NULL; ++ as->next_transfer = NULL; + + /* continue if needed */ + if (list_empty(&as->queue) || as->stopping) +@@ -377,7 +437,7 @@ atmel_spi_interrupt(int irq, void *dev_id) + + spi_writel(as, IDR, pending); + +- if (as->remaining_bytes == 0) { ++ if (as->current_remaining_bytes == 0) { + msg->actual_length += xfer->len; + + if (!msg->is_dma_mapped) +@@ -387,7 +447,7 @@ atmel_spi_interrupt(int irq, void *dev_id) + if (xfer->delay_usecs) + udelay(xfer->delay_usecs); + +- if (msg->transfers.prev == &xfer->transfer_list) { ++ if (atmel_spi_xfer_is_last(msg, xfer)) { + /* report completed message */ + atmel_spi_msg_done(master, as, msg, 0, + xfer->cs_change); +@@ -490,9 +550,14 @@ static int atmel_spi_setup(struct spi_device *spi) + if (!(spi->mode & SPI_CPHA)) + csr |= SPI_BIT(NCPHA); + +- /* TODO: DLYBS and DLYBCT */ +- csr |= SPI_BF(DLYBS, 10); +- csr |= SPI_BF(DLYBCT, 10); ++ /* DLYBS is mostly irrelevant since we manage chipselect using GPIOs. ++ * ++ * DLYBCT would add delays between words, slowing down transfers. ++ * It could potentially be useful to cope with DMA bottlenecks, but ++ * in those cases it's probably best to just use a lower bitrate. ++ */ ++ csr |= SPI_BF(DLYBS, 0); ++ csr |= SPI_BF(DLYBCT, 0); + + /* chipselect must have been muxed as GPIO (e.g. in board setup) */ + npcs_pin = (unsigned int)spi->controller_data; diff --git a/drivers/video/atmel_lcdfb.c b/drivers/video/atmel_lcdfb.c -index 235b618..bb361ab 100644 +index 7c30cc8..5e99671 100644 --- a/drivers/video/atmel_lcdfb.c +++ b/drivers/video/atmel_lcdfb.c -@@ -37,7 +37,9 @@ +@@ -16,6 +16,7 @@ + #include <linux/fb.h> + #include <linux/init.h> + #include <linux/delay.h> ++#include <linux/backlight.h> + + #include <asm/arch/board.h> + #include <asm/arch/cpu.h> +@@ -37,7 +38,9 @@ #endif #if defined(CONFIG_ARCH_AT91) @@ -8729,515 +16095,383 @@ index 235b618..bb361ab 100644 static inline void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo, struct fb_var_screeninfo *var) -@@ -74,7 +76,7 @@ static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = { - .type = FB_TYPE_PACKED_PIXELS, - .visual = FB_VISUAL_TRUECOLOR, - .xpanstep = 0, -- .ypanstep = 0, -+ .ypanstep = 1, - .ywrapstep = 0, - .accel = FB_ACCEL_NONE, - }; -diff --git a/drivers/video/backlight/Kconfig b/drivers/video/backlight/Kconfig -index 2580f5f..b6f936a 100644 ---- a/drivers/video/backlight/Kconfig -+++ b/drivers/video/backlight/Kconfig -@@ -24,6 +24,18 @@ config LCD_CLASS_DEVICE - To have support for your specific LCD panel you will have to - select the proper drivers which depend on this option. - -+config LCD_LTV350QV -+ tristate "Samsung LTV350QV LCD Panel" -+ depends on LCD_CLASS_DEVICE && SPI_MASTER -+ default n -+ help -+ If you have a Samsung LTV350QV LCD panel, say y to include a -+ power control driver for it. The panel starts up in power -+ off state, so you need this driver in order to see any -+ output. -+ -+ The LTV350QV panel is present on all ATSTK1000 boards. -+ - # - # Backlight - # -diff --git a/drivers/video/backlight/Makefile b/drivers/video/backlight/Makefile -index c6e2266..965a78b 100644 ---- a/drivers/video/backlight/Makefile -+++ b/drivers/video/backlight/Makefile -@@ -1,6 +1,8 @@ - # Backlight & LCD drivers +@@ -69,12 +72,113 @@ static void atmel_lcdfb_update_dma2d(struct atmel_lcdfb_info *sinfo, + } + #endif - obj-$(CONFIG_LCD_CLASS_DEVICE) += lcd.o -+obj-$(CONFIG_LCD_LTV350QV) += ltv350qv.o ++static const u32 contrast_ctr = ATMEL_LCDC_PS_DIV8 ++ | ATMEL_LCDC_POL_POSITIVE ++ | ATMEL_LCDC_ENA_PWMENABLE; + - obj-$(CONFIG_BACKLIGHT_CLASS_DEVICE) += backlight.o - obj-$(CONFIG_BACKLIGHT_CORGI) += corgi_bl.o - obj-$(CONFIG_BACKLIGHT_HP680) += hp680_bl.o -diff --git a/drivers/video/backlight/ltv350qv.c b/drivers/video/backlight/ltv350qv.c -new file mode 100644 -index 0000000..751dc53 ---- /dev/null -+++ b/drivers/video/backlight/ltv350qv.c -@@ -0,0 +1,339 @@ -+/* -+ * Power control for Samsung LTV350QV Quarter VGA LCD Panel -+ * -+ * Copyright (C) 2006, 2007 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ */ -+#include <linux/delay.h> -+#include <linux/err.h> -+#include <linux/fb.h> -+#include <linux/init.h> -+#include <linux/lcd.h> -+#include <linux/module.h> -+#include <linux/spi/spi.h> -+ -+#include "ltv350qv.h" -+ -+#define POWER_IS_ON(pwr) ((pwr) <= FB_BLANK_NORMAL) -+ -+struct ltv350qv { -+ struct spi_device *spi; -+ u8 *buffer; -+ int power; -+ struct lcd_device *ld; -+}; -+ -+/* -+ * The power-on and power-off sequences are taken from the -+ * LTV350QV-F04 data sheet from Samsung. The register definitions are -+ * taken from the S6F2002 command list also from Samsung. Both -+ * documents are distributed with the AVR32 Linux BSP CD from Atmel. -+ * -+ * There's still some voodoo going on here, but it's a lot better than -+ * in the first incarnation of the driver where all we had was the raw -+ * numbers from the initialization sequence. -+ */ -+static int ltv350qv_write_reg(struct ltv350qv *lcd, u8 reg, u16 val) -+{ -+ struct spi_message msg; -+ struct spi_transfer index_xfer = { -+ .len = 3, -+ .cs_change = 1, -+ }; -+ struct spi_transfer value_xfer = { -+ .len = 3, -+ }; -+ -+ spi_message_init(&msg); -+ -+ /* register index */ -+ lcd->buffer[0] = LTV_OPC_INDEX; -+ lcd->buffer[1] = 0x00; -+ lcd->buffer[2] = reg & 0x7f; -+ index_xfer.tx_buf = lcd->buffer; -+ spi_message_add_tail(&index_xfer, &msg); -+ -+ /* register value */ -+ lcd->buffer[4] = LTV_OPC_DATA; -+ lcd->buffer[5] = val >> 8; -+ lcd->buffer[6] = val; -+ value_xfer.tx_buf = lcd->buffer + 4; -+ spi_message_add_tail(&value_xfer, &msg); -+ -+ return spi_sync(lcd->spi, &msg); -+} ++#ifdef CONFIG_BACKLIGHT_ATMEL_LCDC + -+/* The comments are taken straight from the data sheet */ -+static int ltv350qv_power_on(struct ltv350qv *lcd) ++/* some bl->props field just changed */ ++static int atmel_bl_update_status(struct backlight_device *bl) +{ -+ int ret; -+ -+ /* Power On Reset Display off State */ -+ if (ltv350qv_write_reg(lcd, LTV_PWRCTL1, 0x0000)) -+ goto err; -+ msleep(15); -+ -+ /* Power Setting Function 1 */ -+ if (ltv350qv_write_reg(lcd, LTV_PWRCTL1, LTV_VCOM_DISABLE)) -+ goto err; -+ if (ltv350qv_write_reg(lcd, LTV_PWRCTL2, LTV_VCOML_ENABLE)) -+ goto err_power1; -+ -+ /* Power Setting Function 2 */ -+ if (ltv350qv_write_reg(lcd, LTV_PWRCTL1, -+ LTV_VCOM_DISABLE | LTV_DRIVE_CURRENT(5) -+ | LTV_SUPPLY_CURRENT(5))) -+ goto err_power2; -+ -+ msleep(55); -+ -+ /* Instruction Setting */ -+ ret = ltv350qv_write_reg(lcd, LTV_IFCTL, -+ LTV_NMD | LTV_REV | LTV_NL(0x1d)); -+ ret |= ltv350qv_write_reg(lcd, LTV_DATACTL, -+ LTV_DS_SAME | LTV_CHS_480 -+ | LTV_DF_RGB | LTV_RGB_BGR); -+ ret |= ltv350qv_write_reg(lcd, LTV_ENTRY_MODE, -+ LTV_VSPL_ACTIVE_LOW -+ | LTV_HSPL_ACTIVE_LOW -+ | LTV_DPL_SAMPLE_RISING -+ | LTV_EPL_ACTIVE_LOW -+ | LTV_SS_RIGHT_TO_LEFT); -+ ret |= ltv350qv_write_reg(lcd, LTV_GATECTL1, LTV_CLW(3)); -+ ret |= ltv350qv_write_reg(lcd, LTV_GATECTL2, -+ LTV_NW_INV_1LINE | LTV_FWI(3)); -+ ret |= ltv350qv_write_reg(lcd, LTV_VBP, 0x000a); -+ ret |= ltv350qv_write_reg(lcd, LTV_HBP, 0x0021); -+ ret |= ltv350qv_write_reg(lcd, LTV_SOTCTL, LTV_SDT(3) | LTV_EQ(0)); -+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(0), 0x0103); -+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(1), 0x0301); -+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(2), 0x1f0f); -+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(3), 0x1f0f); -+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(4), 0x0707); -+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(5), 0x0307); -+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(6), 0x0707); -+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(7), 0x0000); -+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(8), 0x0004); -+ ret |= ltv350qv_write_reg(lcd, LTV_GAMMA(9), 0x0000); -+ if (ret) -+ goto err_settings; -+ -+ /* Wait more than 2 frames */ -+ msleep(20); -+ -+ /* Display On Sequence */ -+ ret = ltv350qv_write_reg(lcd, LTV_PWRCTL1, -+ LTV_VCOM_DISABLE | LTV_VCOMOUT_ENABLE -+ | LTV_POWER_ON | LTV_DRIVE_CURRENT(5) -+ | LTV_SUPPLY_CURRENT(5)); -+ ret |= ltv350qv_write_reg(lcd, LTV_GATECTL2, -+ LTV_NW_INV_1LINE | LTV_DSC | LTV_FWI(3)); -+ if (ret) -+ goto err_disp_on; -+ -+ /* Display should now be ON. Phew. */ -+ return 0; ++ struct atmel_lcdfb_info *sinfo = bl_get_data(bl); ++ int power = sinfo->bl_power; ++ int brightness = bl->props.brightness; + -+err_disp_on: -+ /* -+ * Try to recover. Error handling probably isn't very useful -+ * at this point, just make a best effort to switch the panel -+ * off. ++ /* REVISIT there may be a meaningful difference between ++ * fb_blank and power ... there seem to be some cases ++ * this doesn't handle correctly. + */ -+ ltv350qv_write_reg(lcd, LTV_PWRCTL1, -+ LTV_VCOM_DISABLE | LTV_DRIVE_CURRENT(5) -+ | LTV_SUPPLY_CURRENT(5)); -+ ltv350qv_write_reg(lcd, LTV_GATECTL2, -+ LTV_NW_INV_1LINE | LTV_FWI(3)); -+err_settings: -+err_power2: -+err_power1: -+ ltv350qv_write_reg(lcd, LTV_PWRCTL2, 0x0000); -+ msleep(1); -+err: -+ ltv350qv_write_reg(lcd, LTV_PWRCTL1, LTV_VCOM_DISABLE); -+ return -EIO; -+} ++ if (bl->props.fb_blank != sinfo->bl_power) ++ power = bl->props.fb_blank; ++ else if (bl->props.power != sinfo->bl_power) ++ power = bl->props.power; + -+static int ltv350qv_power_off(struct ltv350qv *lcd) -+{ -+ int ret; -+ -+ /* Display Off Sequence */ -+ ret = ltv350qv_write_reg(lcd, LTV_PWRCTL1, -+ LTV_VCOM_DISABLE -+ | LTV_DRIVE_CURRENT(5) -+ | LTV_SUPPLY_CURRENT(5)); -+ ret |= ltv350qv_write_reg(lcd, LTV_GATECTL2, -+ LTV_NW_INV_1LINE | LTV_FWI(3)); -+ -+ /* Power down setting 1 */ -+ ret |= ltv350qv_write_reg(lcd, LTV_PWRCTL2, 0x0000); ++ if (brightness < 0 && power == FB_BLANK_UNBLANK) ++ brightness = lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL); ++ else if (power != FB_BLANK_UNBLANK) ++ brightness = 0; + -+ /* Wait at least 1 ms */ -+ msleep(1); ++ lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, brightness); ++ lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, ++ brightness ? contrast_ctr : 0); + -+ /* Power down setting 2 */ -+ ret |= ltv350qv_write_reg(lcd, LTV_PWRCTL1, LTV_VCOM_DISABLE); ++ bl->props.fb_blank = bl->props.power = sinfo->bl_power = power; + -+ /* -+ * No point in trying to recover here. If we can't switch the -+ * panel off, what are we supposed to do other than inform the -+ * user about the failure? -+ */ -+ if (ret) -+ return -EIO; -+ -+ /* Display power should now be OFF */ + return 0; +} + -+static int ltv350qv_power(struct ltv350qv *lcd, int power) -+{ -+ int ret = 0; -+ -+ if (POWER_IS_ON(power) && !POWER_IS_ON(lcd->power)) -+ ret = ltv350qv_power_on(lcd); -+ else if (!POWER_IS_ON(power) && POWER_IS_ON(lcd->power)) -+ ret = ltv350qv_power_off(lcd); -+ -+ if (!ret) -+ lcd->power = power; -+ -+ return ret; -+} -+ -+static int ltv350qv_set_power(struct lcd_device *ld, int power) ++static int atmel_bl_get_brightness(struct backlight_device *bl) +{ -+ struct ltv350qv *lcd; ++ struct atmel_lcdfb_info *sinfo = bl_get_data(bl); + -+ lcd = lcd_get_data(ld); -+ return ltv350qv_power(lcd, power); ++ return lcdc_readl(sinfo, ATMEL_LCDC_CONTRAST_VAL); +} + -+static int ltv350qv_get_power(struct lcd_device *ld) -+{ -+ struct ltv350qv *lcd; -+ -+ lcd = lcd_get_data(ld); -+ return lcd->power; -+} -+ -+static struct lcd_ops ltv_ops = { -+ .get_power = ltv350qv_get_power, -+ .set_power = ltv350qv_set_power, ++static struct backlight_ops atmel_lcdc_bl_ops = { ++ .update_status = atmel_bl_update_status, ++ .get_brightness = atmel_bl_get_brightness, +}; + -+static int __devinit ltv350qv_probe(struct spi_device *spi) ++static void init_backlight(struct atmel_lcdfb_info *sinfo) +{ -+ struct ltv350qv *lcd; -+ struct lcd_device *ld; -+ int ret; ++ struct backlight_device *bl; + -+ lcd = kzalloc(sizeof(struct ltv350qv), GFP_KERNEL); -+ if (!lcd) -+ return -ENOMEM; ++ sinfo->bl_power = FB_BLANK_UNBLANK; + -+ lcd->spi = spi; -+ lcd->power = FB_BLANK_POWERDOWN; -+ lcd->buffer = kzalloc(8, GFP_KERNEL); ++ if (sinfo->backlight) ++ return; + -+ ld = lcd_device_register("ltv350qv", &spi->dev, lcd, <v_ops); -+ if (IS_ERR(ld)) { -+ ret = PTR_ERR(ld); -+ goto out_free_lcd; ++ bl = backlight_device_register("backlight", &sinfo->pdev->dev, ++ sinfo, &atmel_lcdc_bl_ops); ++ if (IS_ERR(sinfo->backlight)) { ++ dev_err(&sinfo->pdev->dev, "error %ld on backlight register\n", ++ PTR_ERR(bl)); ++ return; + } -+ lcd->ld = ld; -+ -+ ret = ltv350qv_power(lcd, FB_BLANK_UNBLANK); -+ if (ret) -+ goto out_unregister; ++ sinfo->backlight = bl; + -+ dev_set_drvdata(&spi->dev, lcd); -+ -+ return 0; -+ -+out_unregister: -+ lcd_device_unregister(ld); -+out_free_lcd: -+ kfree(lcd); -+ return ret; ++ bl->props.power = FB_BLANK_UNBLANK; ++ bl->props.fb_blank = FB_BLANK_UNBLANK; ++ bl->props.max_brightness = 0xff; ++ bl->props.brightness = atmel_bl_get_brightness(bl); +} + -+static int __devexit ltv350qv_remove(struct spi_device *spi) ++static void exit_backlight(struct atmel_lcdfb_info *sinfo) +{ -+ struct ltv350qv *lcd = dev_get_drvdata(&spi->dev); -+ -+ ltv350qv_power(lcd, FB_BLANK_POWERDOWN); -+ lcd_device_unregister(lcd->ld); -+ kfree(lcd); -+ -+ return 0; ++ if (sinfo->backlight) ++ backlight_device_unregister(sinfo->backlight); +} + -+#ifdef CONFIG_PM -+static int ltv350qv_suspend(struct spi_device *spi, -+ pm_message_t state, u32 level) -+{ -+ struct ltv350qv *lcd = dev_get_drvdata(&spi->dev); -+ -+ if (level == SUSPEND_POWER_DOWN) -+ return ltv350qv_power(lcd, FB_BLANK_POWERDOWN); ++#else + -+ return 0; ++static void init_backlight(struct atmel_lcdfb_info *sinfo) ++{ ++ dev_warn(&sinfo->pdev->dev, "backlight control is not available\n"); +} + -+static int ltv350qv_resume(struct spi_device *spi, u32 level) ++static void exit_backlight(struct atmel_lcdfb_info *sinfo) +{ -+ struct ltv350qv *lcd = dev_get_drvdata(&spi->dev); -+ -+ if (level == RESUME_POWER_ON) -+ return ltv350qv_power(lcd, FB_BLANK_UNBLANK); -+ -+ return 0; +} -+#else -+#define ltv350qv_suspend NULL -+#define ltv350qv_resume NULL ++ +#endif + -+/* Power down all displays on reboot, poweroff or halt */ -+static void ltv350qv_shutdown(struct spi_device *spi) ++static void init_contrast(struct atmel_lcdfb_info *sinfo) +{ -+ struct ltv350qv *lcd = dev_get_drvdata(&spi->dev); ++ /* have some default contrast/backlight settings */ ++ lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, contrast_ctr); ++ lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT); + -+ ltv350qv_power(lcd, FB_BLANK_POWERDOWN); ++ if (sinfo->lcdcon_is_backlight) ++ init_backlight(sinfo); +} + -+static struct spi_driver ltv350qv_driver = { -+ .driver = { -+ .name = "ltv350qv", -+ .bus = &spi_bus_type, -+ .owner = THIS_MODULE, -+ }, + + static struct fb_fix_screeninfo atmel_lcdfb_fix __initdata = { + .type = FB_TYPE_PACKED_PIXELS, + .visual = FB_VISUAL_TRUECOLOR, + .xpanstep = 0, +- .ypanstep = 0, ++ .ypanstep = 1, + .ywrapstep = 0, + .accel = FB_ACCEL_NONE, + }; +@@ -148,6 +252,8 @@ static int atmel_lcdfb_alloc_video_memory(struct atmel_lcdfb_info *sinfo) + return -ENOMEM; + } + ++ memset(info->screen_base, 0, info->fix.smem_len); + -+ .probe = ltv350qv_probe, -+ .remove = __devexit_p(ltv350qv_remove), -+ .shutdown = ltv350qv_shutdown, -+ .suspend = ltv350qv_suspend, -+ .resume = ltv350qv_resume, -+}; + return 0; + } + +@@ -203,6 +309,26 @@ static int atmel_lcdfb_check_var(struct fb_var_screeninfo *var, + var->transp.offset = var->transp.length = 0; + var->xoffset = var->yoffset = 0; + ++ /* Saturate vertical and horizontal timings at maximum values */ ++ var->vsync_len = min_t(u32, var->vsync_len, ++ (ATMEL_LCDC_VPW >> ATMEL_LCDC_VPW_OFFSET) + 1); ++ var->upper_margin = min_t(u32, var->upper_margin, ++ ATMEL_LCDC_VBP >> ATMEL_LCDC_VBP_OFFSET); ++ var->lower_margin = min_t(u32, var->lower_margin, ++ ATMEL_LCDC_VFP); ++ var->right_margin = min_t(u32, var->right_margin, ++ (ATMEL_LCDC_HFP >> ATMEL_LCDC_HFP_OFFSET) + 1); ++ var->hsync_len = min_t(u32, var->hsync_len, ++ (ATMEL_LCDC_HPW >> ATMEL_LCDC_HPW_OFFSET) + 1); ++ var->left_margin = min_t(u32, var->left_margin, ++ ATMEL_LCDC_HBP + 1); ++ ++ /* Some parameters can't be zero */ ++ var->vsync_len = max_t(u32, var->vsync_len, 1); ++ var->right_margin = max_t(u32, var->right_margin, 1); ++ var->hsync_len = max_t(u32, var->hsync_len, 1); ++ var->left_margin = max_t(u32, var->left_margin, 1); ++ + switch (var->bits_per_pixel) { + case 1: + case 2: +@@ -370,10 +496,6 @@ static int atmel_lcdfb_set_par(struct fb_info *info) + /* Disable all interrupts */ + lcdc_writel(sinfo, ATMEL_LCDC_IDR, ~0UL); + +- /* Set contrast */ +- value = ATMEL_LCDC_PS_DIV8 | ATMEL_LCDC_POL_POSITIVE | ATMEL_LCDC_ENA_PWMENABLE; +- lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_CTR, value); +- lcdc_writel(sinfo, ATMEL_LCDC_CONTRAST_VAL, ATMEL_LCDC_CVAL_DEFAULT); + /* ...wait for DMA engine to become idle... */ + while (lcdc_readl(sinfo, ATMEL_LCDC_DMACON) & ATMEL_LCDC_DMABUSY) + msleep(10); +@@ -516,7 +638,6 @@ static int __init atmel_lcdfb_init_fbinfo(struct atmel_lcdfb_info *sinfo) + struct fb_info *info = sinfo->info; + int ret = 0; + +- memset_io(info->screen_base, 0, info->fix.smem_len); + info->var.activate |= FB_ACTIVATE_FORCE | FB_ACTIVATE_NOW; + + dev_info(info->device, +@@ -577,6 +698,7 @@ static int __init atmel_lcdfb_probe(struct platform_device *pdev) + sinfo->default_monspecs = pdata_sinfo->default_monspecs; + sinfo->atmel_lcdfb_power_control = pdata_sinfo->atmel_lcdfb_power_control; + sinfo->guard_time = pdata_sinfo->guard_time; ++ sinfo->lcdcon_is_backlight = pdata_sinfo->lcdcon_is_backlight; + } else { + dev_err(dev, "cannot get default configuration\n"); + goto free_info; +@@ -645,6 +767,11 @@ static int __init atmel_lcdfb_probe(struct platform_device *pdev) + info->screen_base = ioremap(info->fix.smem_start, info->fix.smem_len); + if (!info->screen_base) + goto release_intmem; + -+static int __init ltv350qv_init(void) -+{ -+ return spi_register_driver(<v350qv_driver); -+} ++ /* ++ * Don't clear the framebuffer -- someone may have set ++ * up a splash image. ++ */ + } else { + /* alocate memory buffer */ + ret = atmel_lcdfb_alloc_video_memory(sinfo); +@@ -670,6 +797,9 @@ static int __init atmel_lcdfb_probe(struct platform_device *pdev) + goto release_mem; + } + ++ /* Initialize PWM for contrast or backlight ("off") */ ++ init_contrast(sinfo); ++ + /* interrupt */ + ret = request_irq(sinfo->irq_base, atmel_lcdfb_interrupt, 0, pdev->name, info); + if (ret) { +@@ -721,6 +851,7 @@ free_cmap: + unregister_irqs: + free_irq(sinfo->irq_base, info); + unmap_mmio: ++ exit_backlight(sinfo); + iounmap(sinfo->mmio); + release_mem: + release_mem_region(info->fix.mmio_start, info->fix.mmio_len); +@@ -755,6 +886,7 @@ static int __exit atmel_lcdfb_remove(struct platform_device *pdev) + if (!sinfo) + return 0; + ++ exit_backlight(sinfo); + if (sinfo->atmel_lcdfb_power_control) + sinfo->atmel_lcdfb_power_control(0); + unregister_framebuffer(info); +@@ -781,6 +913,9 @@ static int __exit atmel_lcdfb_remove(struct platform_device *pdev) + + static struct platform_driver atmel_lcdfb_driver = { + .remove = __exit_p(atmel_lcdfb_remove), + -+static void __exit ltv350qv_exit(void) -+{ -+ spi_unregister_driver(<v350qv_driver); -+} -+module_init(ltv350qv_init); -+module_exit(ltv350qv_exit); ++// FIXME need suspend, resume + -+MODULE_AUTHOR("Haavard Skinnemoen <hskinnemoen@atmel.com>"); -+MODULE_DESCRIPTION("Samsung LTV350QV LCD Driver"); -+MODULE_LICENSE("GPL"); -diff --git a/drivers/video/backlight/ltv350qv.h b/drivers/video/backlight/ltv350qv.h + .driver = { + .name = "atmel_lcdfb", + .owner = THIS_MODULE, +diff --git a/drivers/video/backlight/Kconfig b/drivers/video/backlight/Kconfig +index 9609a6c..924e255 100644 +--- a/drivers/video/backlight/Kconfig ++++ b/drivers/video/backlight/Kconfig +@@ -50,6 +50,19 @@ config BACKLIGHT_CLASS_DEVICE + To have support for your specific LCD panel you will have to + select the proper drivers which depend on this option. + ++config BACKLIGHT_ATMEL_LCDC ++ bool "Atmel LCDC Contrast-as-Backlight control" ++ depends on BACKLIGHT_CLASS_DEVICE && FB_ATMEL ++ default y if MACH_SAM9261EK || MACH_SAM9263EK ++ help ++ This provides a backlight control internal to the Atmel LCDC ++ driver. If the LCD "contrast control" on your board is wired ++ so it controls the backlight brightness, select this option to ++ export this as a PWM-based backlight control. ++ ++ If in doubt, it's safe to enable this option; it doesn't kick ++ in unless the board's description says it's wired that way. ++ + config BACKLIGHT_CORGI + tristate "Generic (aka Sharp Corgi) Backlight Driver" + depends on BACKLIGHT_CLASS_DEVICE +diff --git a/drivers/video/console/Kconfig b/drivers/video/console/Kconfig +index b87ed37..2b53d1f 100644 +--- a/drivers/video/console/Kconfig ++++ b/drivers/video/console/Kconfig +@@ -6,7 +6,7 @@ menu "Console display driver support" + + config VGA_CONSOLE + bool "VGA text console" if EMBEDDED || !X86 +- depends on !ARCH_ACORN && !ARCH_EBSA110 && !4xx && !8xx && !SPARC && !M68K && !PARISC && !FRV && !ARCH_VERSATILE && !SUPERH && !BLACKFIN ++ depends on !ARCH_ACORN && !ARCH_EBSA110 && !4xx && !8xx && !SPARC && !M68K && !PARISC && !FRV && !ARCH_VERSATILE && !SUPERH && !BLACKFIN && !AVR32 + default y + help + Saying Y here will allow you to use Linux in text mode through a +diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig +index 52dff40..fbd6112 100644 +--- a/drivers/watchdog/Kconfig ++++ b/drivers/watchdog/Kconfig +@@ -223,7 +223,7 @@ config DAVINCI_WATCHDOG + + config AT32AP700X_WDT + tristate "AT32AP700x watchdog" +- depends on CPU_AT32AP7000 ++ depends on CPU_AT32AP700X + help + Watchdog timer embedded into AT32AP700x devices. This will reboot + your system when the timeout is reached. +diff --git a/include/asm-avr32/arch-at32ap/at32ap7000.h b/include/asm-avr32/arch-at32ap/at32ap7000.h +deleted file mode 100644 +index 3914d7b..0000000 +--- a/include/asm-avr32/arch-at32ap/at32ap7000.h ++++ /dev/null +@@ -1,35 +0,0 @@ +-/* +- * Pin definitions for AT32AP7000. +- * +- * Copyright (C) 2006 Atmel Corporation +- * +- * This program is free software; you can redistribute it and/or modify +- * it under the terms of the GNU General Public License version 2 as +- * published by the Free Software Foundation. +- */ +-#ifndef __ASM_ARCH_AT32AP7000_H__ +-#define __ASM_ARCH_AT32AP7000_H__ +- +-#define GPIO_PERIPH_A 0 +-#define GPIO_PERIPH_B 1 +- +-#define NR_GPIO_CONTROLLERS 4 +- +-/* +- * Pin numbers identifying specific GPIO pins on the chip. They can +- * also be converted to IRQ numbers by passing them through +- * gpio_to_irq(). +- */ +-#define GPIO_PIOA_BASE (0) +-#define GPIO_PIOB_BASE (GPIO_PIOA_BASE + 32) +-#define GPIO_PIOC_BASE (GPIO_PIOB_BASE + 32) +-#define GPIO_PIOD_BASE (GPIO_PIOC_BASE + 32) +-#define GPIO_PIOE_BASE (GPIO_PIOD_BASE + 32) +- +-#define GPIO_PIN_PA(N) (GPIO_PIOA_BASE + (N)) +-#define GPIO_PIN_PB(N) (GPIO_PIOB_BASE + (N)) +-#define GPIO_PIN_PC(N) (GPIO_PIOC_BASE + (N)) +-#define GPIO_PIN_PD(N) (GPIO_PIOD_BASE + (N)) +-#define GPIO_PIN_PE(N) (GPIO_PIOE_BASE + (N)) +- +-#endif /* __ASM_ARCH_AT32AP7000_H__ */ +diff --git a/include/asm-avr32/arch-at32ap/at32ap700x.h b/include/asm-avr32/arch-at32ap/at32ap700x.h new file mode 100644 -index 0000000..189112e +index 0000000..99684d6 --- /dev/null -+++ b/drivers/video/backlight/ltv350qv.h -@@ -0,0 +1,95 @@ ++++ b/include/asm-avr32/arch-at32ap/at32ap700x.h +@@ -0,0 +1,35 @@ +/* -+ * Register definitions for Samsung LTV350QV Quarter VGA LCD Panel ++ * Pin definitions for AT32AP7000. + * -+ * Copyright (C) 2006, 2007 Atmel Corporation ++ * Copyright (C) 2006 Atmel Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ -+#ifndef __LTV350QV_H -+#define __LTV350QV_H -+ -+#define LTV_OPC_INDEX 0x74 -+#define LTV_OPC_DATA 0x76 -+ -+#define LTV_ID 0x00 /* ID Read */ -+#define LTV_IFCTL 0x01 /* Display Interface Control */ -+#define LTV_DATACTL 0x02 /* Display Data Control */ -+#define LTV_ENTRY_MODE 0x03 /* Entry Mode */ -+#define LTV_GATECTL1 0x04 /* Gate Control 1 */ -+#define LTV_GATECTL2 0x05 /* Gate Control 2 */ -+#define LTV_VBP 0x06 /* Vertical Back Porch */ -+#define LTV_HBP 0x07 /* Horizontal Back Porch */ -+#define LTV_SOTCTL 0x08 /* Source Output Timing Control */ -+#define LTV_PWRCTL1 0x09 /* Power Control 1 */ -+#define LTV_PWRCTL2 0x0a /* Power Control 2 */ -+#define LTV_GAMMA(x) (0x10 + (x)) /* Gamma control */ -+ -+/* Bit definitions for LTV_IFCTL */ -+#define LTV_IM (1 << 15) -+#define LTV_NMD (1 << 14) -+#define LTV_SSMD (1 << 13) -+#define LTV_REV (1 << 7) -+#define LTV_NL(x) (((x) & 0x001f) << 0) -+ -+/* Bit definitions for LTV_DATACTL */ -+#define LTV_DS_SAME (0 << 12) -+#define LTV_DS_D_TO_S (1 << 12) -+#define LTV_DS_S_TO_D (2 << 12) -+#define LTV_CHS_384 (0 << 9) -+#define LTV_CHS_480 (1 << 9) -+#define LTV_CHS_492 (2 << 9) -+#define LTV_DF_RGB (0 << 6) -+#define LTV_DF_RGBX (1 << 6) -+#define LTV_DF_XRGB (2 << 6) -+#define LTV_RGB_RGB (0 << 2) -+#define LTV_RGB_BGR (1 << 2) -+#define LTV_RGB_GRB (2 << 2) -+#define LTV_RGB_RBG (3 << 2) -+ -+/* Bit definitions for LTV_ENTRY_MODE */ -+#define LTV_VSPL_ACTIVE_LOW (0 << 15) -+#define LTV_VSPL_ACTIVE_HIGH (1 << 15) -+#define LTV_HSPL_ACTIVE_LOW (0 << 14) -+#define LTV_HSPL_ACTIVE_HIGH (1 << 14) -+#define LTV_DPL_SAMPLE_RISING (0 << 13) -+#define LTV_DPL_SAMPLE_FALLING (1 << 13) -+#define LTV_EPL_ACTIVE_LOW (0 << 12) -+#define LTV_EPL_ACTIVE_HIGH (1 << 12) -+#define LTV_SS_LEFT_TO_RIGHT (0 << 8) -+#define LTV_SS_RIGHT_TO_LEFT (1 << 8) -+#define LTV_STB (1 << 1) -+ -+/* Bit definitions for LTV_GATECTL1 */ -+#define LTV_CLW(x) (((x) & 0x0007) << 12) -+#define LTV_GAON (1 << 5) -+#define LTV_SDR (1 << 3) -+ -+/* Bit definitions for LTV_GATECTL2 */ -+#define LTV_NW_INV_FRAME (0 << 14) -+#define LTV_NW_INV_1LINE (1 << 14) -+#define LTV_NW_INV_2LINE (2 << 14) -+#define LTV_DSC (1 << 12) -+#define LTV_GIF (1 << 8) -+#define LTV_FHN (1 << 7) -+#define LTV_FTI(x) (((x) & 0x0003) << 4) -+#define LTV_FWI(x) (((x) & 0x0003) << 0) -+ -+/* Bit definitions for LTV_SOTCTL */ -+#define LTV_SDT(x) (((x) & 0x0007) << 10) -+#define LTV_EQ(x) (((x) & 0x0007) << 2) -+ -+/* Bit definitions for LTV_PWRCTL1 */ -+#define LTV_VCOM_DISABLE (1 << 14) -+#define LTV_VCOMOUT_ENABLE (1 << 11) -+#define LTV_POWER_ON (1 << 9) -+#define LTV_DRIVE_CURRENT(x) (((x) & 0x0007) << 4) /* 0=off, 5=max */ -+#define LTV_SUPPLY_CURRENT(x) (((x) & 0x0007) << 0) /* 0=off, 5=max */ -+ -+/* Bit definitions for LTV_PWRCTL2 */ -+#define LTV_VCOML_ENABLE (1 << 13) -+#define LTV_VCOML_VOLTAGE(x) (((x) & 0x001f) << 8) /* 0=1V, 31=-1V */ -+#define LTV_VCOMH_VOLTAGE(x) (((x) & 0x001f) << 0) /* 0=3V, 31=4.5V */ -+ -+#endif /* __LTV350QV_H */ ++#ifndef __ASM_ARCH_AT32AP700X_H__ ++#define __ASM_ARCH_AT32AP700X_H__ ++ ++#define GPIO_PERIPH_A 0 ++#define GPIO_PERIPH_B 1 ++ ++#define NR_GPIO_CONTROLLERS 4 ++ ++/* ++ * Pin numbers identifying specific GPIO pins on the chip. They can ++ * also be converted to IRQ numbers by passing them through ++ * gpio_to_irq(). ++ */ ++#define GPIO_PIOA_BASE (0) ++#define GPIO_PIOB_BASE (GPIO_PIOA_BASE + 32) ++#define GPIO_PIOC_BASE (GPIO_PIOB_BASE + 32) ++#define GPIO_PIOD_BASE (GPIO_PIOC_BASE + 32) ++#define GPIO_PIOE_BASE (GPIO_PIOD_BASE + 32) ++ ++#define GPIO_PIN_PA(N) (GPIO_PIOA_BASE + (N)) ++#define GPIO_PIN_PB(N) (GPIO_PIOB_BASE + (N)) ++#define GPIO_PIN_PC(N) (GPIO_PIOC_BASE + (N)) ++#define GPIO_PIN_PD(N) (GPIO_PIOD_BASE + (N)) ++#define GPIO_PIN_PE(N) (GPIO_PIOE_BASE + (N)) ++ ++#endif /* __ASM_ARCH_AT32AP700X_H__ */ diff --git a/include/asm-avr32/arch-at32ap/board.h b/include/asm-avr32/arch-at32ap/board.h -index 0215965..e1318e0 100644 +index d6993a6..8816b66 100644 --- a/include/asm-avr32/arch-at32ap/board.h +++ b/include/asm-avr32/arch-at32ap/board.h -@@ -6,6 +6,8 @@ - - #include <linux/types.h> +@@ -51,6 +51,9 @@ struct platform_device * + at32_add_device_ide(unsigned int id, unsigned int extint, + struct ide_platform_data *data); -+#define GPIO_PIN_NONE (-1) ++/* mask says which PWM channels to mux */ ++struct platform_device *at32_add_device_pwm(u32 mask); + - /* Add basic devices: system manager, interrupt controller, portmuxes, etc. */ - void at32_add_system_devices(void); - -@@ -31,11 +33,26 @@ struct spi_board_info; - struct platform_device * - at32_add_device_spi(unsigned int id, struct spi_board_info *b, unsigned int n); + /* depending on what's hooked up, not all SSC pins will be used */ + #define ATMEL_SSC_TK 0x01 + #define ATMEL_SSC_TF 0x02 +@@ -66,7 +69,13 @@ struct platform_device * + at32_add_device_ssc(unsigned int id, unsigned int flags); -+struct platform_device *at32_add_device_twi(unsigned int id); + struct platform_device *at32_add_device_twi(unsigned int id); +-struct platform_device *at32_add_device_mci(unsigned int id); + +struct mci_platform_data { + int detect_pin; @@ -9245,41 +16479,49 @@ index 0215965..e1318e0 100644 +}; +struct platform_device * +at32_add_device_mci(unsigned int id, struct mci_platform_data *data); -+ - struct atmel_lcdfb_info; - struct platform_device * - at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data, - unsigned long fbmem_start, unsigned long fbmem_len); + struct platform_device *at32_add_device_ac97c(unsigned int id); + struct platform_device *at32_add_device_abdac(unsigned int id); -+struct usba_platform_data { -+ int vbus_pin; -+}; -+struct platform_device * -+at32_add_device_usba(unsigned int id, struct usba_platform_data *data); -+ - /* depending on what's hooked up, not all SSC pins will be used */ - #define ATMEL_SSC_TK 0x01 - #define ATMEL_SSC_TF 0x02 -@@ -50,4 +67,7 @@ at32_add_device_lcdc(unsigned int id, struct atmel_lcdfb_info *data, - struct platform_device * - at32_add_device_ssc(unsigned int id, unsigned int flags); +diff --git a/include/asm-avr32/arch-at32ap/cpu.h b/include/asm-avr32/arch-at32ap/cpu.h +index a762f42..0dc2026 100644 +--- a/include/asm-avr32/arch-at32ap/cpu.h ++++ b/include/asm-avr32/arch-at32ap/cpu.h +@@ -14,7 +14,7 @@ + * Only AT32AP7000 is defined for now. We can identify the specific + * chip at runtime, but I'm not sure if it's really worth it. + */ +-#ifdef CONFIG_CPU_AT32AP7000 ++#ifdef CONFIG_CPU_AT32AP700X + # define cpu_is_at32ap7000() (1) + #else + # define cpu_is_at32ap7000() (0) +diff --git a/include/asm-avr32/arch-at32ap/io.h b/include/asm-avr32/arch-at32ap/io.h +index ee59e40..4ec6abc 100644 +--- a/include/asm-avr32/arch-at32ap/io.h ++++ b/include/asm-avr32/arch-at32ap/io.h +@@ -4,7 +4,7 @@ + /* For "bizarre" halfword swapping */ + #include <linux/byteorder/swabb.h> -+struct platform_device *at32_add_device_ac97c(unsigned int id); -+struct platform_device *at32_add_device_abdac(unsigned int id); -+ - #endif /* __ASM_ARCH_BOARD_H */ +-#if defined(CONFIG_AP7000_32_BIT_SMC) ++#if defined(CONFIG_AP700X_32_BIT_SMC) + # define __swizzle_addr_b(addr) (addr ^ 3UL) + # define __swizzle_addr_w(addr) (addr ^ 2UL) + # define __swizzle_addr_l(addr) (addr) +@@ -14,7 +14,7 @@ + # define __mem_ioswabb(a, x) (x) + # define __mem_ioswabw(a, x) swab16(x) + # define __mem_ioswabl(a, x) swab32(x) +-#elif defined(CONFIG_AP7000_16_BIT_SMC) ++#elif defined(CONFIG_AP700X_16_BIT_SMC) + # define __swizzle_addr_b(addr) (addr ^ 1UL) + # define __swizzle_addr_w(addr) (addr) + # define __swizzle_addr_l(addr) (addr) diff --git a/include/asm-avr32/arch-at32ap/portmux.h b/include/asm-avr32/arch-at32ap/portmux.h -index 9930871..135e034 100644 +index b1abe6b..135e034 100644 --- a/include/asm-avr32/arch-at32ap/portmux.h +++ b/include/asm-avr32/arch-at32ap/portmux.h -@@ -19,10 +19,23 @@ - #define AT32_GPIOF_OUTPUT 0x00000002 /* (OUT) Enable output driver */ - #define AT32_GPIOF_HIGH 0x00000004 /* (OUT) Set output high */ - #define AT32_GPIOF_DEGLITCH 0x00000008 /* (IN) Filter glitches */ -+#define AT32_GPIOF_MULTIDRV 0x00000010 /* Enable multidriver option */ - - void at32_select_periph(unsigned int pin, unsigned int periph, - unsigned long flags); +@@ -26,4 +26,16 @@ void at32_select_periph(unsigned int pin, unsigned int periph, void at32_select_gpio(unsigned int pin, unsigned long flags); void at32_reserve_pin(unsigned int pin); @@ -9296,81 +16538,6 @@ index 9930871..135e034 100644 +#endif /* CONFIG_GPIO_DEV */ + #endif /* __ASM_ARCH_PORTMUX_H__ */ -diff --git a/include/asm-avr32/arch-at32ap/smc.h b/include/asm-avr32/arch-at32ap/smc.h -index 07152b7..c98eea4 100644 ---- a/include/asm-avr32/arch-at32ap/smc.h -+++ b/include/asm-avr32/arch-at32ap/smc.h -@@ -15,22 +15,50 @@ - /* - * All timing parameters are in nanoseconds. - */ -+struct smc_timing { -+ /* Delay from address valid to assertion of given strobe */ -+ int ncs_read_setup; -+ int nrd_setup; -+ int ncs_write_setup; -+ int nwe_setup; -+ -+ /* Pulse length of given strobe */ -+ int ncs_read_pulse; -+ int nrd_pulse; -+ int ncs_write_pulse; -+ int nwe_pulse; -+ -+ /* Total cycle length of given operation */ -+ int read_cycle; -+ int write_cycle; -+ -+ /* Minimal recovery times, will extend cycle if needed */ -+ int ncs_read_recover; -+ int nrd_recover; -+ int ncs_write_recover; -+ int nwe_recover; -+}; -+ -+/* -+ * All timing parameters are in clock cycles. -+ */ - struct smc_config { -+ - /* Delay from address valid to assertion of given strobe */ -- u16 ncs_read_setup; -- u16 nrd_setup; -- u16 ncs_write_setup; -- u16 nwe_setup; -+ u8 ncs_read_setup; -+ u8 nrd_setup; -+ u8 ncs_write_setup; -+ u8 nwe_setup; - - /* Pulse length of given strobe */ -- u16 ncs_read_pulse; -- u16 nrd_pulse; -- u16 ncs_write_pulse; -- u16 nwe_pulse; -+ u8 ncs_read_pulse; -+ u8 nrd_pulse; -+ u8 ncs_write_pulse; -+ u8 nwe_pulse; - - /* Total cycle length of given operation */ -- u16 read_cycle; -- u16 write_cycle; -+ u8 read_cycle; -+ u8 write_cycle; - - /* Bus width in bytes */ - u8 bus_width; -@@ -76,6 +104,9 @@ struct smc_config { - unsigned int tdf_mode:1; - }; - -+extern void smc_set_timing(struct smc_config *config, -+ const struct smc_timing *timing); -+ - extern int smc_set_configuration(int cs, const struct smc_config *config); - extern struct smc_config *smc_get_configuration(int cs); - diff --git a/include/asm-avr32/dma-controller.h b/include/asm-avr32/dma-controller.h new file mode 100644 index 0000000..56a4965 @@ -9543,490 +16710,290 @@ index 0000000..56a4965 +extern struct dma_controller *find_dma_controller(int id); + +#endif /* __ASM_AVR32_DMA_CONTROLLER_H */ -diff --git a/include/asm-avr32/dma-mapping.h b/include/asm-avr32/dma-mapping.h -index 21bb60b..81e3426 100644 ---- a/include/asm-avr32/dma-mapping.h -+++ b/include/asm-avr32/dma-mapping.h -@@ -264,7 +264,11 @@ static inline void - dma_sync_single_for_cpu(struct device *dev, dma_addr_t dma_handle, - size_t size, enum dma_data_direction direction) - { -- dma_cache_sync(dev, bus_to_virt(dma_handle), size, direction); -+ /* -+ * No need to do anything since the CPU isn't supposed to -+ * touch this memory after we flushed it at mapping- or -+ * sync-for-device time. -+ */ - } +diff --git a/include/asm-avr32/irq.h b/include/asm-avr32/irq.h +index 83e6549..9315724 100644 +--- a/include/asm-avr32/irq.h ++++ b/include/asm-avr32/irq.h +@@ -11,4 +11,9 @@ - static inline void -@@ -309,12 +313,11 @@ static inline void - dma_sync_sg_for_cpu(struct device *dev, struct scatterlist *sg, - int nents, enum dma_data_direction direction) - { -- int i; -- -- for (i = 0; i < nents; i++) { -- dma_cache_sync(dev, page_address(sg[i].page) + sg[i].offset, -- sg[i].length, direction); -- } -+ /* -+ * No need to do anything since the CPU isn't supposed to -+ * touch this memory after we flushed it at mapping- or -+ * sync-for-device time. -+ */ - } + #define irq_canonicalize(i) (i) - static inline void -diff --git a/include/asm-avr32/system.h b/include/asm-avr32/system.h -index a8236ba..dc2d527 100644 ---- a/include/asm-avr32/system.h -+++ b/include/asm-avr32/system.h -@@ -73,11 +73,16 @@ extern struct task_struct *__switch_to(struct task_struct *, ++#ifndef __ASSEMBLER__ ++int nmi_enable(void); ++void nmi_disable(void); ++#endif ++ + #endif /* __ASM_AVR32_IOCTLS_H */ +diff --git a/include/asm-avr32/kdebug.h b/include/asm-avr32/kdebug.h +index fd7e990..ca4f954 100644 +--- a/include/asm-avr32/kdebug.h ++++ b/include/asm-avr32/kdebug.h +@@ -5,6 +5,7 @@ + enum die_val { + DIE_BREAKPOINT, + DIE_SSTEP, ++ DIE_NMI, + }; - extern void __xchg_called_with_bad_pointer(void); + #endif /* __ASM_AVR32_KDEBUG_H */ +diff --git a/include/asm-avr32/ocd.h b/include/asm-avr32/ocd.h +index 996405e..6bef094 100644 +--- a/include/asm-avr32/ocd.h ++++ b/include/asm-avr32/ocd.h +@@ -533,6 +533,11 @@ static inline void __ocd_write(unsigned int reg, unsigned long value) + #define ocd_read(reg) __ocd_read(OCD_##reg) + #define ocd_write(reg, value) __ocd_write(OCD_##reg, value) --#ifdef __CHECKER__ --extern unsigned long __builtin_xchg(void *ptr, unsigned long x); --#endif -+static inline unsigned long xchg_u32(u32 val, volatile u32 *m) -+{ -+ u32 ret; ++struct task_struct; ++ ++void ocd_enable(struct task_struct *child); ++void ocd_disable(struct task_struct *child); ++ + #endif /* !__ASSEMBLER__ */ --#define xchg_u32(val, m) __builtin_xchg((void *)m, val) -+ asm volatile("xchg %[ret], %[m], %[val]" -+ : [ret] "=&r"(ret), "=m"(*m) -+ : "m"(*m), [m] "r"(m), [val] "r"(val) -+ : "memory"); -+ return ret; + #endif /* __ASM_AVR32_OCD_H */ +diff --git a/include/asm-avr32/processor.h b/include/asm-avr32/processor.h +index a52576b..4212551 100644 +--- a/include/asm-avr32/processor.h ++++ b/include/asm-avr32/processor.h +@@ -57,11 +57,25 @@ struct avr32_cpuinfo { + unsigned short cpu_revision; + enum tlb_config tlb_config; + unsigned long features; ++ u32 device_id; + + struct cache_info icache; + struct cache_info dcache; + }; + ++static inline unsigned int avr32_get_manufacturer_id(struct avr32_cpuinfo *cpu) ++{ ++ return (cpu->device_id >> 1) & 0x7f; +} ++static inline unsigned int avr32_get_product_number(struct avr32_cpuinfo *cpu) ++{ ++ return (cpu->device_id >> 12) & 0xffff; ++} ++static inline unsigned int avr32_get_chip_revision(struct avr32_cpuinfo *cpu) ++{ ++ return (cpu->device_id >> 28) & 0x0f; ++} ++ + extern struct avr32_cpuinfo boot_cpu_data; - static inline unsigned long __xchg(unsigned long x, - volatile void *ptr, -diff --git a/include/asm-avr32/unistd.h b/include/asm-avr32/unistd.h -index 3b4e35b..de09009 100644 ---- a/include/asm-avr32/unistd.h -+++ b/include/asm-avr32/unistd.h -@@ -303,6 +303,19 @@ - #ifdef __KERNEL__ - #define NR_syscalls 282 + #ifdef CONFIG_SMP +diff --git a/include/asm-avr32/ptrace.h b/include/asm-avr32/ptrace.h +index 8c5dba5..9e2d44f 100644 +--- a/include/asm-avr32/ptrace.h ++++ b/include/asm-avr32/ptrace.h +@@ -121,7 +121,15 @@ struct pt_regs { + }; -+/* Old stuff */ -+#define __IGNORE_uselib -+#define __IGNORE_mmap + #ifdef __KERNEL__ +-# define user_mode(regs) (((regs)->sr & MODE_MASK) == MODE_USER) ++ ++#include <asm/ocd.h> ++ ++#define arch_ptrace_attach(child) ocd_enable(child) + -+/* NUMA stuff */ -+#define __IGNORE_mbind -+#define __IGNORE_get_mempolicy -+#define __IGNORE_set_mempolicy -+#define __IGNORE_migrate_pages -+#define __IGNORE_move_pages ++#define user_mode(regs) (((regs)->sr & MODE_MASK) == MODE_USER) ++#define instruction_pointer(regs) ((regs)->pc) ++#define profile_pc(regs) instruction_pointer(regs) + -+/* SMP stuff */ -+#define __IGNORE_getcpu + extern void show_regs (struct pt_regs *); - #define __ARCH_WANT_IPC_PARSE_VERSION - #define __ARCH_WANT_STAT64 -diff --git a/include/linux/atmel-ssc.h b/include/linux/atmel-ssc.h + static __inline__ int valid_user_regs(struct pt_regs *regs) +@@ -141,9 +149,6 @@ static __inline__ int valid_user_regs(struct pt_regs *regs) + return 0; + } + +-#define instruction_pointer(regs) ((regs)->pc) +- +-#define profile_pc(regs) instruction_pointer(regs) + + #endif /* __KERNEL__ */ + +diff --git a/include/asm-avr32/thread_info.h b/include/asm-avr32/thread_info.h +index 184b574..07049f6 100644 +--- a/include/asm-avr32/thread_info.h ++++ b/include/asm-avr32/thread_info.h +@@ -88,6 +88,7 @@ static inline struct thread_info *current_thread_info(void) + #define TIF_MEMDIE 6 + #define TIF_RESTORE_SIGMASK 7 /* restore signal mask in do_signal */ + #define TIF_CPU_GOING_TO_SLEEP 8 /* CPU is entering sleep 0 mode */ ++#define TIF_DEBUG 30 /* debugging enabled */ + #define TIF_USERSPACE 31 /* true if FS sets userspace */ + + #define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE) +diff --git a/include/linux/atmel_pwm.h b/include/linux/atmel_pwm.h new file mode 100644 -index 0000000..0602339 +index 0000000..ea04abb --- /dev/null -+++ b/include/linux/atmel-ssc.h -@@ -0,0 +1,312 @@ -+#ifndef __INCLUDE_ATMEL_SSC_H -+#define __INCLUDE_ATMEL_SSC_H -+ -+#include <linux/platform_device.h> -+#include <linux/list.h> ++++ b/include/linux/atmel_pwm.h +@@ -0,0 +1,70 @@ ++#ifndef __LINUX_ATMEL_PWM_H ++#define __LINUX_ATMEL_PWM_H + -+struct ssc_device { -+ struct list_head list; -+ void __iomem *regs; -+ struct platform_device *pdev; -+ struct clk *clk; -+ int user; -+ int irq; ++/** ++ * struct pwm_channel - driver handle to a PWM channel ++ * @regs: base of this channel's registers ++ * @index: number of this channel (0..31) ++ * @mck: base clock rate, which can be prescaled and maybe subdivided ++ * ++ * Drivers initialize a pwm_channel structure using pwm_channel_alloc(). ++ * Then they configure its clock rate (derived from MCK), alignment, ++ * polarity, and duty cycle by writing directly to the channel registers, ++ * before enabling the channel by calling pwm_channel_enable(). ++ * ++ * After emitting a PWM signal for the desired length of time, drivers ++ * may then pwm_channel_disable() or pwm_channel_free(). Both of these ++ * disable the channel, but when it's freed the IRQ is deconfigured and ++ * the channel must later be re-allocated and reconfigured. ++ * ++ * Note that if the period or duty cycle need to be changed while the ++ * PWM channel is operating, drivers must use the PWM_CUPD double buffer ++ * mechanism, either polling until they change or getting implicitly ++ * notified through a once-per-period interrupt handler. ++ */ ++struct pwm_channel { ++ void __iomem *regs; ++ unsigned index; ++ unsigned long mck; +}; + -+struct ssc_device * __must_check ssc_request(unsigned int ssc_num); -+void ssc_free(struct ssc_device *ssc); -+ -+/* SSC register offsets */ -+ -+/* SSC Control Register */ -+#define SSC_CR 0x00000000 -+#define SSC_CR_RXDIS_SIZE 1 -+#define SSC_CR_RXDIS_OFFSET 1 -+#define SSC_CR_RXEN_SIZE 1 -+#define SSC_CR_RXEN_OFFSET 0 -+#define SSC_CR_SWRST_SIZE 1 -+#define SSC_CR_SWRST_OFFSET 15 -+#define SSC_CR_TXDIS_SIZE 1 -+#define SSC_CR_TXDIS_OFFSET 9 -+#define SSC_CR_TXEN_SIZE 1 -+#define SSC_CR_TXEN_OFFSET 8 -+ -+/* SSC Clock Mode Register */ -+#define SSC_CMR 0x00000004 -+#define SSC_CMR_DIV_SIZE 12 -+#define SSC_CMR_DIV_OFFSET 0 -+ -+/* SSC Receive Clock Mode Register */ -+#define SSC_RCMR 0x00000010 -+#define SSC_RCMR_CKG_SIZE 2 -+#define SSC_RCMR_CKG_OFFSET 6 -+#define SSC_RCMR_CKI_SIZE 1 -+#define SSC_RCMR_CKI_OFFSET 5 -+#define SSC_RCMR_CKO_SIZE 3 -+#define SSC_RCMR_CKO_OFFSET 2 -+#define SSC_RCMR_CKS_SIZE 2 -+#define SSC_RCMR_CKS_OFFSET 0 -+#define SSC_RCMR_PERIOD_SIZE 8 -+#define SSC_RCMR_PERIOD_OFFSET 24 -+#define SSC_RCMR_START_SIZE 4 -+#define SSC_RCMR_START_OFFSET 8 -+#define SSC_RCMR_STOP_SIZE 1 -+#define SSC_RCMR_STOP_OFFSET 12 -+#define SSC_RCMR_STTDLY_SIZE 8 -+#define SSC_RCMR_STTDLY_OFFSET 16 -+ -+/* SSC Receive Frame Mode Register */ -+#define SSC_RFMR 0x00000014 -+#define SSC_RFMR_DATLEN_SIZE 5 -+#define SSC_RFMR_DATLEN_OFFSET 0 -+#define SSC_RFMR_DATNB_SIZE 4 -+#define SSC_RFMR_DATNB_OFFSET 8 -+#define SSC_RFMR_FSEDGE_SIZE 1 -+#define SSC_RFMR_FSEDGE_OFFSET 24 -+#define SSC_RFMR_FSLEN_SIZE 4 -+#define SSC_RFMR_FSLEN_OFFSET 16 -+#define SSC_RFMR_FSOS_SIZE 4 -+#define SSC_RFMR_FSOS_OFFSET 20 -+#define SSC_RFMR_LOOP_SIZE 1 -+#define SSC_RFMR_LOOP_OFFSET 5 -+#define SSC_RFMR_MSBF_SIZE 1 -+#define SSC_RFMR_MSBF_OFFSET 7 -+ -+/* SSC Transmit Clock Mode Register */ -+#define SSC_TCMR 0x00000018 -+#define SSC_TCMR_CKG_SIZE 2 -+#define SSC_TCMR_CKG_OFFSET 6 -+#define SSC_TCMR_CKI_SIZE 1 -+#define SSC_TCMR_CKI_OFFSET 5 -+#define SSC_TCMR_CKO_SIZE 3 -+#define SSC_TCMR_CKO_OFFSET 2 -+#define SSC_TCMR_CKS_SIZE 2 -+#define SSC_TCMR_CKS_OFFSET 0 -+#define SSC_TCMR_PERIOD_SIZE 8 -+#define SSC_TCMR_PERIOD_OFFSET 24 -+#define SSC_TCMR_START_SIZE 4 -+#define SSC_TCMR_START_OFFSET 8 -+#define SSC_TCMR_STTDLY_SIZE 8 -+#define SSC_TCMR_STTDLY_OFFSET 16 -+ -+/* SSC Transmit Frame Mode Register */ -+#define SSC_TFMR 0x0000001c -+#define SSC_TFMR_DATDEF_SIZE 1 -+#define SSC_TFMR_DATDEF_OFFSET 5 -+#define SSC_TFMR_DATLEN_SIZE 5 -+#define SSC_TFMR_DATLEN_OFFSET 0 -+#define SSC_TFMR_DATNB_SIZE 4 -+#define SSC_TFMR_DATNB_OFFSET 8 -+#define SSC_TFMR_FSDEN_SIZE 1 -+#define SSC_TFMR_FSDEN_OFFSET 23 -+#define SSC_TFMR_FSEDGE_SIZE 1 -+#define SSC_TFMR_FSEDGE_OFFSET 24 -+#define SSC_TFMR_FSLEN_SIZE 4 -+#define SSC_TFMR_FSLEN_OFFSET 16 -+#define SSC_TFMR_FSOS_SIZE 3 -+#define SSC_TFMR_FSOS_OFFSET 20 -+#define SSC_TFMR_MSBF_SIZE 1 -+#define SSC_TFMR_MSBF_OFFSET 7 -+ -+/* SSC Receive Hold Register */ -+#define SSC_RHR 0x00000020 -+#define SSC_RHR_RDAT_SIZE 32 -+#define SSC_RHR_RDAT_OFFSET 0 -+ -+/* SSC Transmit Hold Register */ -+#define SSC_THR 0x00000024 -+#define SSC_THR_TDAT_SIZE 32 -+#define SSC_THR_TDAT_OFFSET 0 -+ -+/* SSC Receive Sync. Holding Register */ -+#define SSC_RSHR 0x00000030 -+#define SSC_RSHR_RSDAT_SIZE 16 -+#define SSC_RSHR_RSDAT_OFFSET 0 -+ -+/* SSC Transmit Sync. Holding Register */ -+#define SSC_TSHR 0x00000034 -+#define SSC_TSHR_TSDAT_SIZE 16 -+#define SSC_TSHR_RSDAT_OFFSET 0 -+ -+/* SSC Receive Compare 0 Register */ -+#define SSC_RC0R 0x00000038 -+#define SSC_RC0R_CP0_SIZE 16 -+#define SSC_RC0R_CP0_OFFSET 0 -+ -+/* SSC Receive Compare 1 Register */ -+#define SSC_RC1R 0x0000003c -+#define SSC_RC1R_CP1_SIZE 16 -+#define SSC_RC1R_CP1_OFFSET 0 -+ -+/* SSC Status Register */ -+#define SSC_SR 0x00000040 -+#define SSC_SR_CP0_SIZE 1 -+#define SSC_SR_CP0_OFFSET 8 -+#define SSC_SR_CP1_SIZE 1 -+#define SSC_SR_CP1_OFFSET 9 -+#define SSC_SR_ENDRX_SIZE 1 -+#define SSC_SR_ENDRX_OFFSET 6 -+#define SSC_SR_ENDTX_SIZE 1 -+#define SSC_SR_ENDTX_OFFSET 2 -+#define SSC_SR_OVRUN_SIZE 1 -+#define SSC_SR_OVRUN_OFFSET 5 -+#define SSC_SR_RXBUFF_SIZE 1 -+#define SSC_SR_RXBUFF_OFFSET 7 -+#define SSC_SR_RXEN_SIZE 1 -+#define SSC_SR_RXEN_OFFSET 17 -+#define SSC_SR_RXRDY_SIZE 1 -+#define SSC_SR_RXRDY_OFFSET 4 -+#define SSC_SR_RXSYN_SIZE 1 -+#define SSC_SR_RXSYN_OFFSET 11 -+#define SSC_SR_TXBUFE_SIZE 1 -+#define SSC_SR_TXBUFE_OFFSET 3 -+#define SSC_SR_TXEMPTY_SIZE 1 -+#define SSC_SR_TXEMPTY_OFFSET 1 -+#define SSC_SR_TXEN_SIZE 1 -+#define SSC_SR_TXEN_OFFSET 16 -+#define SSC_SR_TXRDY_SIZE 1 -+#define SSC_SR_TXRDY_OFFSET 0 -+#define SSC_SR_TXSYN_SIZE 1 -+#define SSC_SR_TXSYN_OFFSET 10 -+ -+/* SSC Interrupt Enable Register */ -+#define SSC_IER 0x00000044 -+#define SSC_IER_CP0_SIZE 1 -+#define SSC_IER_CP0_OFFSET 8 -+#define SSC_IER_CP1_SIZE 1 -+#define SSC_IER_CP1_OFFSET 9 -+#define SSC_IER_ENDRX_SIZE 1 -+#define SSC_IER_ENDRX_OFFSET 6 -+#define SSC_IER_ENDTX_SIZE 1 -+#define SSC_IER_ENDTX_OFFSET 2 -+#define SSC_IER_OVRUN_SIZE 1 -+#define SSC_IER_OVRUN_OFFSET 5 -+#define SSC_IER_RXBUFF_SIZE 1 -+#define SSC_IER_RXBUFF_OFFSET 7 -+#define SSC_IER_RXRDY_SIZE 1 -+#define SSC_IER_RXRDY_OFFSET 4 -+#define SSC_IER_RXSYN_SIZE 1 -+#define SSC_IER_RXSYN_OFFSET 11 -+#define SSC_IER_TXBUFE_SIZE 1 -+#define SSC_IER_TXBUFE_OFFSET 3 -+#define SSC_IER_TXEMPTY_SIZE 1 -+#define SSC_IER_TXEMPTY_OFFSET 1 -+#define SSC_IER_TXRDY_SIZE 1 -+#define SSC_IER_TXRDY_OFFSET 0 -+#define SSC_IER_TXSYN_SIZE 1 -+#define SSC_IER_TXSYN_OFFSET 10 -+ -+/* SSC Interrupt Disable Register */ -+#define SSC_IDR 0x00000048 -+#define SSC_IDR_CP0_SIZE 1 -+#define SSC_IDR_CP0_OFFSET 8 -+#define SSC_IDR_CP1_SIZE 1 -+#define SSC_IDR_CP1_OFFSET 9 -+#define SSC_IDR_ENDRX_SIZE 1 -+#define SSC_IDR_ENDRX_OFFSET 6 -+#define SSC_IDR_ENDTX_SIZE 1 -+#define SSC_IDR_ENDTX_OFFSET 2 -+#define SSC_IDR_OVRUN_SIZE 1 -+#define SSC_IDR_OVRUN_OFFSET 5 -+#define SSC_IDR_RXBUFF_SIZE 1 -+#define SSC_IDR_RXBUFF_OFFSET 7 -+#define SSC_IDR_RXRDY_SIZE 1 -+#define SSC_IDR_RXRDY_OFFSET 4 -+#define SSC_IDR_RXSYN_SIZE 1 -+#define SSC_IDR_RXSYN_OFFSET 11 -+#define SSC_IDR_TXBUFE_SIZE 1 -+#define SSC_IDR_TXBUFE_OFFSET 3 -+#define SSC_IDR_TXEMPTY_SIZE 1 -+#define SSC_IDR_TXEMPTY_OFFSET 1 -+#define SSC_IDR_TXRDY_SIZE 1 -+#define SSC_IDR_TXRDY_OFFSET 0 -+#define SSC_IDR_TXSYN_SIZE 1 -+#define SSC_IDR_TXSYN_OFFSET 10 -+ -+/* SSC Interrupt Mask Register */ -+#define SSC_IMR 0x0000004c -+#define SSC_IMR_CP0_SIZE 1 -+#define SSC_IMR_CP0_OFFSET 8 -+#define SSC_IMR_CP1_SIZE 1 -+#define SSC_IMR_CP1_OFFSET 9 -+#define SSC_IMR_ENDRX_SIZE 1 -+#define SSC_IMR_ENDRX_OFFSET 6 -+#define SSC_IMR_ENDTX_SIZE 1 -+#define SSC_IMR_ENDTX_OFFSET 2 -+#define SSC_IMR_OVRUN_SIZE 1 -+#define SSC_IMR_OVRUN_OFFSET 5 -+#define SSC_IMR_RXBUFF_SIZE 1 -+#define SSC_IMR_RXBUFF_OFFSET 7 -+#define SSC_IMR_RXRDY_SIZE 1 -+#define SSC_IMR_RXRDY_OFFSET 4 -+#define SSC_IMR_RXSYN_SIZE 1 -+#define SSC_IMR_RXSYN_OFFSET 11 -+#define SSC_IMR_TXBUFE_SIZE 1 -+#define SSC_IMR_TXBUFE_OFFSET 3 -+#define SSC_IMR_TXEMPTY_SIZE 1 -+#define SSC_IMR_TXEMPTY_OFFSET 1 -+#define SSC_IMR_TXRDY_SIZE 1 -+#define SSC_IMR_TXRDY_OFFSET 0 -+#define SSC_IMR_TXSYN_SIZE 1 -+#define SSC_IMR_TXSYN_OFFSET 10 -+ -+/* SSC PDC Receive Pointer Register */ -+#define SSC_PDC_RPR 0x00000100 -+ -+/* SSC PDC Receive Counter Register */ -+#define SSC_PDC_RCR 0x00000104 -+ -+/* SSC PDC Transmit Pointer Register */ -+#define SSC_PDC_TPR 0x00000108 -+ -+/* SSC PDC Receive Next Pointer Register */ -+#define SSC_PDC_RNPR 0x00000110 -+ -+/* SSC PDC Receive Next Counter Register */ -+#define SSC_PDC_RNCR 0x00000114 -+ -+/* SSC PDC Transmit Counter Register */ -+#define SSC_PDC_TCR 0x0000010c -+ -+/* SSC PDC Transmit Next Pointer Register */ -+#define SSC_PDC_TNPR 0x00000118 -+ -+/* SSC PDC Transmit Next Counter Register */ -+#define SSC_PDC_TNCR 0x0000011c -+ -+/* SSC PDC Transfer Control Register */ -+#define SSC_PDC_PTCR 0x00000120 -+#define SSC_PDC_PTCR_RXTDIS_SIZE 1 -+#define SSC_PDC_PTCR_RXTDIS_OFFSET 1 -+#define SSC_PDC_PTCR_RXTEN_SIZE 1 -+#define SSC_PDC_PTCR_RXTEN_OFFSET 0 -+#define SSC_PDC_PTCR_TXTDIS_SIZE 1 -+#define SSC_PDC_PTCR_TXTDIS_OFFSET 9 -+#define SSC_PDC_PTCR_TXTEN_SIZE 1 -+#define SSC_PDC_PTCR_TXTEN_OFFSET 8 -+ -+/* SSC PDC Transfer Status Register */ -+#define SSC_PDC_PTSR 0x00000124 -+#define SSC_PDC_PTSR_RXTEN_SIZE 1 -+#define SSC_PDC_PTSR_RXTEN_OFFSET 0 -+#define SSC_PDC_PTSR_TXTEN_SIZE 1 -+#define SSC_PDC_PTSR_TXTEN_OFFSET 8 ++extern int pwm_channel_alloc(int index, struct pwm_channel *ch); ++extern int pwm_channel_free(struct pwm_channel *ch); + -+/* Bit manipulation macros */ -+#define SSC_BIT(name) \ -+ (1 << SSC_##name##_OFFSET) -+#define SSC_BF(name, value) \ -+ (((value) & ((1 << SSC_##name##_SIZE) - 1)) \ -+ << SSC_##name##_OFFSET) -+#define SSC_BFEXT(name, value) \ -+ (((value) >> SSC_##name##_OFFSET) \ -+ & ((1 << SSC_##name##_SIZE) - 1)) -+#define SSC_BFINS(name, value, old) \ -+ (((old) & ~(((1 << SSC_##name##_SIZE) - 1) \ -+ << SSC_##name##_OFFSET)) | SSC_BF(name, value)) ++extern int pwm_clk_alloc(unsigned prescale, unsigned div); ++extern void pwm_clk_free(unsigned clk); + -+/* Register access macros */ -+#define ssc_readl(base, reg) __raw_readl(base + SSC_##reg) -+#define ssc_writel(base, reg, value) __raw_writel((value), base + SSC_##reg) ++extern int __pwm_channel_onoff(struct pwm_channel *ch, int enabled); + -+#endif /* __INCLUDE_ATMEL_SSC_H */ -diff --git a/include/linux/spi/at73c213.h b/include/linux/spi/at73c213.h -new file mode 100644 -index 0000000..0f20a70 ---- /dev/null -+++ b/include/linux/spi/at73c213.h -@@ -0,0 +1,25 @@ -+/* -+ * Board-specific data used to set up AT73c213 audio DAC driver. -+ */ ++#define pwm_channel_enable(ch) __pwm_channel_onoff((ch), 1) ++#define pwm_channel_disable(ch) __pwm_channel_onoff((ch), 0) + -+#ifndef __LINUX_SPI_AT73C213_H -+#define __LINUX_SPI_AT73C213_H ++/* periodic interrupts, mostly for CUPD changes to period or cycle */ ++extern int pwm_channel_handler(struct pwm_channel *ch, ++ void (*handler)(struct pwm_channel *ch)); + -+/** -+ * at73c213_board_info - how the external DAC is wired to the device. -+ * -+ * @ssc_id: SSC platform_driver id the DAC shall use to stream the audio. -+ * @dac_clk: the external clock used to provide master clock to the DAC. -+ * @shortname: a short discription for the DAC, seen by userspace tools. -+ * -+ * This struct contains the configuration of the hardware connection to the -+ * external DAC. The DAC needs a master clock and a I2S audio stream. It also -+ * provides a name which is used to identify it in userspace tools. -+ */ -+struct at73c213_board_info { -+ int ssc_id; -+ struct clk *dac_clk; -+ char shortname[32]; -+}; -+ -+#endif /* __LINUX_SPI_AT73C213_H */ -diff --git a/scripts/checkstack.pl b/scripts/checkstack.pl -index f7844f6..6631586 100755 ---- a/scripts/checkstack.pl -+++ b/scripts/checkstack.pl -@@ -12,6 +12,7 @@ - # sh64 port by Paul Mundt - # Random bits by Matt Mackall <mpm@selenic.com> - # M68k port by Geert Uytterhoeven and Andreas Schwab -+# AVR32 port by Haavard Skinnemoen <hskinnemoen@atmel.com> - # - # Usage: - # objdump -d vmlinux | stackcheck.pl [arch] -@@ -37,6 +38,10 @@ my (@stack, $re, $x, $xs); - if ($arch eq 'arm') { - #c0008ffc: e24dd064 sub sp, sp, #100 ; 0x64 - $re = qr/.*sub.*sp, sp, #(([0-9]{2}|[3-9])[0-9]{2})/o; -+ } elsif ($arch eq 'avr32') { -+ #8000008a: 20 1d sub sp,4 -+ #80000ca8: fa cd 05 b0 sub sp,sp,1456 -+ $re = qr/^.*sub.*sp.*,([0-9]{1,8})/o; - } elsif ($arch =~ /^i[3456]86$/) { - #c0105234: 81 ec ac 05 00 00 sub $0x5ac,%esp - $re = qr/^.*[as][du][db] \$(0x$x{1,8}),\%esp$/o; ++/* per-channel registers (banked at pwm_channel->regs) */ ++#define PWM_CMR 0x00 /* mode register */ ++#define PWM_CPR_CPD (1 << 10) /* set: CUPD modifies period */ ++#define PWM_CPR_CPOL (1 << 9) /* set: idle high */ ++#define PWM_CPR_CALG (1 << 8) /* set: center align */ ++#define PWM_CPR_CPRE (0xf << 0) /* mask: rate is mck/(2^pre) */ ++#define PWM_CPR_CLKA (0xb << 0) /* rate CLKA */ ++#define PWM_CPR_CLKB (0xc << 0) /* rate CLKB */ ++#define PWM_CDTY 0x04 /* duty cycle (max of CPRD) */ ++#define PWM_CPRD 0x08 /* period (count up from zero) */ ++#define PWM_CCNT 0x0c /* counter (20 bits?) */ ++#define PWM_CUPD 0x10 /* update CPRD (or CDTY) next period */ ++ ++static inline void ++pwm_channel_writel(struct pwm_channel *pwmc, unsigned offset, u32 val) ++{ ++ __raw_writel(val, pwmc->regs + offset); ++} ++ ++static inline u32 pwm_channel_readl(struct pwm_channel *pwmc, unsigned offset) ++{ ++ return __raw_readl(pwmc->regs + offset); ++} ++ ++#endif /* __LINUX_ATMEL_PWM_H */ +diff --git a/include/video/atmel_lcdc.h b/include/video/atmel_lcdc.h +index 4eea637..336c20d 100644 +--- a/include/video/atmel_lcdc.h ++++ b/include/video/atmel_lcdc.h +@@ -22,7 +22,7 @@ + #ifndef __ATMEL_LCDC_H__ + #define __ATMEL_LCDC_H__ + +- /* LCD Controller info data structure */ ++ /* LCD Controller info data structure, stored in device platform_data */ + struct atmel_lcdfb_info { + spinlock_t lock; + struct fb_info *info; +@@ -33,7 +33,14 @@ struct atmel_lcdfb_info { + struct platform_device *pdev; + struct clk *bus_clk; + struct clk *lcdc_clk; +- unsigned int default_bpp; ++ ++#ifdef CONFIG_BACKLIGHT_ATMEL_LCDC ++ struct backlight_device *backlight; ++ u8 bl_power; ++#endif ++ bool lcdcon_is_backlight; ++ ++ u8 default_bpp; + unsigned int default_lcdcon2; + unsigned int default_dmacon; + void (*atmel_lcdfb_power_control)(int on); +@@ -115,20 +122,20 @@ struct atmel_lcdfb_info { + #define ATMEL_LCDC_MEMOR_LITTLE (1 << 31) + + #define ATMEL_LCDC_TIM1 0x0808 +-#define ATMEL_LCDC_VFP (0xff << 0) ++#define ATMEL_LCDC_VFP (0xffU << 0) + #define ATMEL_LCDC_VBP_OFFSET 8 +-#define ATMEL_LCDC_VBP (0xff << ATMEL_LCDC_VBP_OFFSET) ++#define ATMEL_LCDC_VBP (0xffU << ATMEL_LCDC_VBP_OFFSET) + #define ATMEL_LCDC_VPW_OFFSET 16 +-#define ATMEL_LCDC_VPW (0x3f << ATMEL_LCDC_VPW_OFFSET) ++#define ATMEL_LCDC_VPW (0x3fU << ATMEL_LCDC_VPW_OFFSET) + #define ATMEL_LCDC_VHDLY_OFFSET 24 +-#define ATMEL_LCDC_VHDLY (0xf << ATMEL_LCDC_VHDLY_OFFSET) ++#define ATMEL_LCDC_VHDLY (0xfU << ATMEL_LCDC_VHDLY_OFFSET) + + #define ATMEL_LCDC_TIM2 0x080c +-#define ATMEL_LCDC_HBP (0xff << 0) ++#define ATMEL_LCDC_HBP (0xffU << 0) + #define ATMEL_LCDC_HPW_OFFSET 8 +-#define ATMEL_LCDC_HPW (0x3f << ATMEL_LCDC_HPW_OFFSET) ++#define ATMEL_LCDC_HPW (0x3fU << ATMEL_LCDC_HPW_OFFSET) + #define ATMEL_LCDC_HFP_OFFSET 21 +-#define ATMEL_LCDC_HFP (0x7ff << ATMEL_LCDC_HFP_OFFSET) ++#define ATMEL_LCDC_HFP (0x7ffU << ATMEL_LCDC_HFP_OFFSET) + + #define ATMEL_LCDC_LCDFRMCFG 0x0810 + #define ATMEL_LCDC_LINEVAL (0x7ff << 0) +diff --git a/kernel/ptrace.c b/kernel/ptrace.c +index c25db86..c719bb9 100644 +--- a/kernel/ptrace.c ++++ b/kernel/ptrace.c +@@ -470,6 +470,8 @@ asmlinkage long sys_ptrace(long request, long pid, long addr, long data) + lock_kernel(); + if (request == PTRACE_TRACEME) { + ret = ptrace_traceme(); ++ if (!ret) ++ arch_ptrace_attach(current); + goto out; + } + diff --git a/sound/Kconfig b/sound/Kconfig -index e48b9b3..29a9979 100644 +index b2a2db4..29a9979 100644 --- a/sound/Kconfig +++ b/sound/Kconfig -@@ -63,6 +63,12 @@ source "sound/aoa/Kconfig" +@@ -63,6 +63,8 @@ source "sound/aoa/Kconfig" source "sound/arm/Kconfig" +source "sound/avr32/Kconfig" + -+if SPI -+source "sound/spi/Kconfig" -+endif -+ - source "sound/mips/Kconfig" - - source "sound/sh/Kconfig" + if SPI + source "sound/spi/Kconfig" + endif diff --git a/sound/Makefile b/sound/Makefile -index 3ead922..e655df7 100644 +index c76d707..a52b236 100644 --- a/sound/Makefile +++ b/sound/Makefile -@@ -5,7 +5,8 @@ obj-$(CONFIG_SOUND) += soundcore.o - obj-$(CONFIG_SOUND_PRIME) += sound_firmware.o +@@ -6,7 +6,7 @@ obj-$(CONFIG_SOUND_PRIME) += sound_firmware.o obj-$(CONFIG_SOUND_PRIME) += oss/ obj-$(CONFIG_DMASOUND) += oss/ --obj-$(CONFIG_SND) += core/ i2c/ drivers/ isa/ pci/ ppc/ arm/ sh/ synth/ usb/ sparc/ parisc/ pcmcia/ mips/ soc/ -+obj-$(CONFIG_SND) += core/ i2c/ drivers/ isa/ pci/ ppc/ arm/ avr32/ sh/ synth/ usb/ sparc/ spi/ parisc/ pcmcia/ mips/ soc/ -+ + obj-$(CONFIG_SND) += core/ i2c/ drivers/ isa/ pci/ ppc/ arm/ sh/ synth/ usb/ \ +- sparc/ spi/ parisc/ pcmcia/ mips/ soc/ ++ sparc/ spi/ parisc/ pcmcia/ mips/ soc/ avr32/ obj-$(CONFIG_SND_AOA) += aoa/ # This one must be compilable even if sound is configured out @@ -11054,7 +18021,7 @@ index 0000000..96246e7 + +#endif /* __SOUND_AVR32_AC97C_H */ diff --git a/sound/oss/Kconfig b/sound/oss/Kconfig -index af37cd0..e3cc557 100644 +index 857008b..db69a17 100644 --- a/sound/oss/Kconfig +++ b/sound/oss/Kconfig @@ -654,3 +654,7 @@ config SOUND_SH_DAC_AUDIO_CHANNEL @@ -11066,7 +18033,7 @@ index af37cd0..e3cc557 100644 + tristate "Atmel AT32 Audio Bitstream DAC (ABDAC) support" + depends on SOUND_PRIME && AVR32 diff --git a/sound/oss/Makefile b/sound/oss/Makefile -index 1200670..fafc246 100644 +index f883c4b..a41853b 100644 --- a/sound/oss/Makefile +++ b/sound/oss/Makefile @@ -10,6 +10,7 @@ obj-$(CONFIG_SOUND_CS4232) += cs4232.o ad1848.o @@ -11870,1303 +18837,3 @@ index 0000000..3c88e25 + __raw_writel((value), (port)->regs + DAC_##reg) + +#endif /* __SOUND_OSS_AT32_ABDAC_H__ */ -diff --git a/sound/spi/Kconfig b/sound/spi/Kconfig -new file mode 100644 -index 0000000..0d08c29 ---- /dev/null -+++ b/sound/spi/Kconfig -@@ -0,0 +1,31 @@ -+#SPI drivers -+ -+menu "SPI devices" -+ depends on SND != n -+ -+config SND_AT73C213 -+ tristate "Atmel AT73C213 DAC driver" -+ depends on ATMEL_SSC -+ select SND_PCM -+ help -+ Say Y here if you want to use the Atmel AT73C213 external DAC. This -+ DAC can be found on Atmel development boards. -+ -+ This driver requires the Atmel SSC driver for sound sink, a -+ peripheral found on most AT91 and AVR32 microprocessors. -+ -+ To compile this driver as a module, choose M here: the module will be -+ called snd-at73c213. -+ -+config SND_AT73C213_TARGET_BITRATE -+ int "Target bitrate for AT73C213" -+ depends on SND_AT73C213 -+ default "48000" -+ range 8000 50000 -+ help -+ Sets the target bitrate for the bitrate calculator in the driver. -+ Limited by hardware to be between 8000 Hz and 50000 Hz. -+ -+ Set to 48000 Hz by default. -+ -+endmenu -diff --git a/sound/spi/Makefile b/sound/spi/Makefile -new file mode 100644 -index 0000000..026fb73 ---- /dev/null -+++ b/sound/spi/Makefile -@@ -0,0 +1,5 @@ -+# Makefile for SPI drivers -+ -+snd-at73c213-objs := at73c213.o -+ -+obj-$(CONFIG_SND_AT73C213) += snd-at73c213.o -diff --git a/sound/spi/at73c213.c b/sound/spi/at73c213.c -new file mode 100644 -index 0000000..f514f47 ---- /dev/null -+++ b/sound/spi/at73c213.c -@@ -0,0 +1,1121 @@ -+/* -+ * Driver for AT73C213 16-bit stereo DAC connected to Atmel SSC -+ * -+ * Copyright (C) 2006-2007 Atmel Norway -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published by -+ * the Free Software Foundation. -+ */ -+ -+/*#define DEBUG*/ -+ -+#include <linux/clk.h> -+#include <linux/err.h> -+#include <linux/delay.h> -+#include <linux/device.h> -+#include <linux/dma-mapping.h> -+#include <linux/init.h> -+#include <linux/interrupt.h> -+#include <linux/module.h> -+#include <linux/platform_device.h> -+#include <linux/io.h> -+ -+#include <sound/driver.h> -+#include <sound/initval.h> -+#include <sound/control.h> -+#include <sound/core.h> -+#include <sound/pcm.h> -+ -+#include <linux/atmel-ssc.h> -+ -+#include <linux/spi/spi.h> -+#include <linux/spi/at73c213.h> -+ -+#include "at73c213.h" -+ -+#define BITRATE_MIN 8000 /* Hardware limit? */ -+#define BITRATE_TARGET CONFIG_SND_AT73C213_TARGET_BITRATE -+#define BITRATE_MAX 50000 /* Hardware limit. */ -+ -+/* Initial (hardware reset) AT73C213 register values. */ -+static u8 snd_at73c213_original_image[18] = -+{ -+ 0x00, /* 00 - CTRL */ -+ 0x05, /* 01 - LLIG */ -+ 0x05, /* 02 - RLIG */ -+ 0x08, /* 03 - LPMG */ -+ 0x08, /* 04 - RPMG */ -+ 0x00, /* 05 - LLOG */ -+ 0x00, /* 06 - RLOG */ -+ 0x22, /* 07 - OLC */ -+ 0x09, /* 08 - MC */ -+ 0x00, /* 09 - CSFC */ -+ 0x00, /* 0A - MISC */ -+ 0x00, /* 0B - */ -+ 0x00, /* 0C - PRECH */ -+ 0x05, /* 0D - AUXG */ -+ 0x00, /* 0E - */ -+ 0x00, /* 0F - */ -+ 0x00, /* 10 - RST */ -+ 0x00, /* 11 - PA_CTRL */ -+}; -+ -+struct snd_at73c213 { -+ struct snd_card *card; -+ struct snd_pcm *pcm; -+ struct snd_pcm_substream *substream; -+ struct at73c213_board_info *board; -+ int irq; -+ int period; -+ unsigned long bitrate; -+ struct clk *bitclk; -+ struct ssc_device *ssc; -+ struct spi_device *spi; -+ u8 spi_wbuffer[2]; -+ u8 spi_rbuffer[2]; -+ /* Image of the SPI registers in AT73C213. */ -+ u8 reg_image[18]; -+ /* Protect registers against concurrent access. */ -+ spinlock_t lock; -+}; -+ -+#define get_chip(card) ((struct snd_at73c213 *)card->private_data) -+ -+static int -+snd_at73c213_write_reg(struct snd_at73c213 *chip, u8 reg, u8 val) -+{ -+ struct spi_message msg; -+ struct spi_transfer msg_xfer = { -+ .len = 2, -+ .cs_change = 0, -+ }; -+ int retval; -+ -+ spi_message_init(&msg); -+ -+ chip->spi_wbuffer[0] = reg; -+ chip->spi_wbuffer[1] = val; -+ -+ msg_xfer.tx_buf = chip->spi_wbuffer; -+ msg_xfer.rx_buf = chip->spi_rbuffer; -+ spi_message_add_tail(&msg_xfer, &msg); -+ -+ retval = spi_sync(chip->spi, &msg); -+ -+ if (!retval) -+ chip->reg_image[reg] = val; -+ -+ return retval; -+} -+ -+static struct snd_pcm_hardware snd_at73c213_playback_hw = { -+ .info = SNDRV_PCM_INFO_INTERLEAVED | -+ SNDRV_PCM_INFO_BLOCK_TRANSFER, -+ .formats = SNDRV_PCM_FMTBIT_S16_BE, -+ .rates = SNDRV_PCM_RATE_CONTINUOUS, -+ .rate_min = 8000, /* Replaced by chip->bitrate later. */ -+ .rate_max = 50000, /* Replaced by chip->bitrate later. */ -+ .channels_min = 2, -+ .channels_max = 2, -+ .buffer_bytes_max = 64 * 1024 - 1, -+ .period_bytes_min = 512, -+ .period_bytes_max = 64 * 1024 - 1, -+ .periods_min = 4, -+ .periods_max = 1024, -+}; -+ -+/* -+ * Calculate and set bitrate and divisions. -+ */ -+static int snd_at73c213_set_bitrate(struct snd_at73c213 *chip) -+{ -+ unsigned long ssc_rate = clk_get_rate(chip->ssc->clk); -+ unsigned long dac_rate_new, ssc_div, status; -+ unsigned long ssc_div_max, ssc_div_min; -+ int max_tries; -+ -+ /* -+ * We connect two clocks here, picking divisors so the I2S clocks -+ * out data at the same rate the DAC clocks it in ... and as close -+ * as practical to the desired target rate. -+ * -+ * The DAC master clock (MCLK) is programmable, and is either 256 -+ * or (not here) 384 times the I2S output clock (BCLK). -+ */ -+ -+ /* SSC clock / (bitrate * stereo * 16-bit). */ -+ ssc_div = ssc_rate / (BITRATE_TARGET * 2 * 16); -+ ssc_div_min = ssc_rate / (BITRATE_MAX * 2 * 16); -+ ssc_div_max = ssc_rate / (BITRATE_MIN * 2 * 16); -+ max_tries = (ssc_div_max - ssc_div_min) / 2; -+ -+ if (max_tries < 1) -+ max_tries = 1; -+ -+ /* ssc_div must be a power of 2. */ -+ ssc_div = (ssc_div + 1) & ~1UL; -+ -+ if ((ssc_rate / (ssc_div * 2 * 16)) < BITRATE_MIN) { -+ ssc_div -= 2; -+ if ((ssc_rate / (ssc_div * 2 * 16)) > BITRATE_MAX) -+ return -ENXIO; -+ } -+ -+ /* Search for a possible bitrate. */ -+ do { -+ /* SSC clock / (ssc divider * 16-bit * stereo). */ -+ if ((ssc_rate / (ssc_div * 2 * 16)) < BITRATE_MIN) -+ return -ENXIO; -+ -+ /* 256 / (2 * 16) = 8 */ -+ dac_rate_new = 8 * (ssc_rate / ssc_div); -+ -+ status = clk_round_rate(chip->board->dac_clk, dac_rate_new); -+ if (status < 0) -+ return status; -+ -+ /* Ignore difference smaller than 256 Hz. */ -+ if ((status/256) == (dac_rate_new/256)) -+ goto set_rate; -+ -+ ssc_div += 2; -+ } while (--max_tries); -+ -+ /* Not able to find a valid bitrate. */ -+ return -ENXIO; -+ -+set_rate: -+ status = clk_set_rate(chip->board->dac_clk, status); -+ if (status < 0) -+ return status; -+ -+ /* Set divider in SSC device. */ -+ ssc_writel(chip->ssc->regs, CMR, ssc_div/2); -+ -+ /* SSC clock / (ssc divider * 16-bit * stereo). */ -+ chip->bitrate = ssc_rate / (ssc_div * 16 * 2); -+ -+ dev_info(&chip->spi->dev, -+ "at73c213: supported bitrate is %lu (%lu divider)\n", -+ chip->bitrate, ssc_div); -+ -+ return 0; -+} -+ -+static int snd_at73c213_pcm_open(struct snd_pcm_substream *substream) -+{ -+ struct snd_at73c213 *chip = snd_pcm_substream_chip(substream); -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ -+ snd_at73c213_playback_hw.rate_min = chip->bitrate; -+ snd_at73c213_playback_hw.rate_max = chip->bitrate; -+ runtime->hw = snd_at73c213_playback_hw; -+ chip->substream = substream; -+ -+ return 0; -+} -+ -+static int snd_at73c213_pcm_close(struct snd_pcm_substream *substream) -+{ -+ struct snd_at73c213 *chip = snd_pcm_substream_chip(substream); -+ chip->substream = NULL; -+ return 0; -+} -+ -+static int snd_at73c213_pcm_hw_params(struct snd_pcm_substream *substream, -+ struct snd_pcm_hw_params *hw_params) -+{ -+ return snd_pcm_lib_malloc_pages(substream, -+ params_buffer_bytes(hw_params)); -+} -+ -+static int snd_at73c213_pcm_hw_free(struct snd_pcm_substream *substream) -+{ -+ return snd_pcm_lib_free_pages(substream); -+} -+ -+static int snd_at73c213_pcm_prepare(struct snd_pcm_substream *substream) -+{ -+ struct snd_at73c213 *chip = snd_pcm_substream_chip(substream); -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ int block_size; -+ -+ block_size = frames_to_bytes(runtime, runtime->period_size); -+ -+ chip->period = 0; -+ -+ ssc_writel(chip->ssc->regs, PDC_TPR, -+ (long)runtime->dma_addr); -+ ssc_writel(chip->ssc->regs, PDC_TCR, runtime->period_size * 2); -+ ssc_writel(chip->ssc->regs, PDC_TNPR, -+ (long)runtime->dma_addr + block_size); -+ ssc_writel(chip->ssc->regs, PDC_TNCR, runtime->period_size * 2); -+ -+ return 0; -+} -+ -+static int snd_at73c213_pcm_trigger(struct snd_pcm_substream *substream, -+ int cmd) -+{ -+ struct snd_at73c213 *chip = snd_pcm_substream_chip(substream); -+ int retval = 0; -+ -+ spin_lock(&chip->lock); -+ -+ switch (cmd) { -+ case SNDRV_PCM_TRIGGER_START: -+ ssc_writel(chip->ssc->regs, IER, SSC_BIT(IER_ENDTX)); -+ ssc_writel(chip->ssc->regs, PDC_PTCR, SSC_BIT(PDC_PTCR_TXTEN)); -+ break; -+ case SNDRV_PCM_TRIGGER_STOP: -+ ssc_writel(chip->ssc->regs, PDC_PTCR, SSC_BIT(PDC_PTCR_TXTDIS)); -+ ssc_writel(chip->ssc->regs, IDR, SSC_BIT(IDR_ENDTX)); -+ break; -+ default: -+ dev_dbg(&chip->spi->dev, "spurious command %x\n", cmd); -+ retval = -EINVAL; -+ break; -+ } -+ -+ spin_unlock(&chip->lock); -+ -+ return retval; -+} -+ -+static snd_pcm_uframes_t -+snd_at73c213_pcm_pointer(struct snd_pcm_substream *substream) -+{ -+ struct snd_at73c213 *chip = snd_pcm_substream_chip(substream); -+ struct snd_pcm_runtime *runtime = substream->runtime; -+ snd_pcm_uframes_t pos; -+ unsigned long bytes; -+ -+ bytes = ssc_readl(chip->ssc->regs, PDC_TPR) -+ - (unsigned long)runtime->dma_addr; -+ -+ pos = bytes_to_frames(runtime, bytes); -+ if (pos >= runtime->buffer_size) -+ pos -= runtime->buffer_size; -+ -+ return pos; -+} -+ -+static struct snd_pcm_ops at73c213_playback_ops = { -+ .open = snd_at73c213_pcm_open, -+ .close = snd_at73c213_pcm_close, -+ .ioctl = snd_pcm_lib_ioctl, -+ .hw_params = snd_at73c213_pcm_hw_params, -+ .hw_free = snd_at73c213_pcm_hw_free, -+ .prepare = snd_at73c213_pcm_prepare, -+ .trigger = snd_at73c213_pcm_trigger, -+ .pointer = snd_at73c213_pcm_pointer, -+}; -+ -+static void snd_at73c213_pcm_free(struct snd_pcm *pcm) -+{ -+ struct snd_at73c213 *chip = snd_pcm_chip(pcm); -+ if (chip->pcm) { -+ snd_pcm_lib_preallocate_free_for_all(chip->pcm); -+ chip->pcm = NULL; -+ } -+} -+ -+static int __devinit snd_at73c213_pcm_new(struct snd_at73c213 *chip, int device) -+{ -+ struct snd_pcm *pcm; -+ int retval; -+ -+ retval = snd_pcm_new(chip->card, chip->card->shortname, -+ device, 1, 0, &pcm); -+ if (retval < 0) -+ goto out; -+ -+ pcm->private_data = chip; -+ pcm->private_free = snd_at73c213_pcm_free; -+ pcm->info_flags = SNDRV_PCM_INFO_BLOCK_TRANSFER; -+ strcpy(pcm->name, "at73c213"); -+ chip->pcm = pcm; -+ -+ snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &at73c213_playback_ops); -+ -+ retval = snd_pcm_lib_preallocate_pages_for_all(chip->pcm, -+ SNDRV_DMA_TYPE_DEV, &chip->ssc->pdev->dev, -+ 64 * 1024, 64 * 1024); -+out: -+ return retval; -+} -+ -+static irqreturn_t snd_at73c213_interrupt(int irq, void *dev_id) -+{ -+ struct snd_at73c213 *chip = dev_id; -+ struct snd_pcm_runtime *runtime = chip->substream->runtime; -+ u32 status; -+ int offset; -+ int block_size; -+ int next_period; -+ int retval = IRQ_NONE; -+ -+ spin_lock(&chip->lock); -+ -+ block_size = frames_to_bytes(runtime, runtime->period_size); -+ status = ssc_readl(chip->ssc->regs, IMR); -+ -+ if (status & SSC_BIT(IMR_ENDTX)) { -+ chip->period++; -+ if (chip->period == runtime->periods) -+ chip->period = 0; -+ next_period = chip->period + 1; -+ if (next_period == runtime->periods) -+ next_period = 0; -+ -+ offset = block_size * next_period; -+ -+ ssc_writel(chip->ssc->regs, PDC_TNPR, -+ (long)runtime->dma_addr + offset); -+ ssc_writel(chip->ssc->regs, PDC_TNCR, runtime->period_size * 2); -+ retval = IRQ_HANDLED; -+ } -+ -+ ssc_readl(chip->ssc->regs, IMR); -+ spin_unlock(&chip->lock); -+ -+ if (status & SSC_BIT(IMR_ENDTX)) -+ snd_pcm_period_elapsed(chip->substream); -+ -+ return retval; -+} -+ -+/* -+ * Mixer functions. -+ */ -+static int snd_at73c213_mono_get(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_value *ucontrol) -+{ -+ struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol); -+ int reg = kcontrol->private_value & 0xff; -+ int shift = (kcontrol->private_value >> 8) & 0xff; -+ int mask = (kcontrol->private_value >> 16) & 0xff; -+ int invert = (kcontrol->private_value >> 24) & 0xff; -+ -+ spin_lock_irq(&chip->lock); -+ -+ ucontrol->value.integer.value[0] = (chip->reg_image[reg] >> shift) & mask; -+ -+ if (invert) -+ ucontrol->value.integer.value[0] = -+ (mask - ucontrol->value.integer.value[0]); -+ -+ spin_unlock_irq(&chip->lock); -+ -+ return 0; -+} -+ -+static int snd_at73c213_mono_put(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_value *ucontrol) -+{ -+ struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol); -+ int reg = kcontrol->private_value & 0xff; -+ int shift = (kcontrol->private_value >> 8) & 0xff; -+ int mask = (kcontrol->private_value >> 16) & 0xff; -+ int invert = (kcontrol->private_value >> 24) & 0xff; -+ int change, retval; -+ unsigned short val; -+ -+ val = (ucontrol->value.integer.value[0] & mask); -+ if (invert) -+ val = mask - val; -+ val <<= shift; -+ -+ spin_lock_irq(&chip->lock); -+ -+ val = (chip->reg_image[reg] & ~(mask << shift)) | val; -+ change = val != chip->reg_image[reg]; -+ retval = snd_at73c213_write_reg(chip, reg, val); -+ -+ spin_unlock_irq(&chip->lock); -+ -+ if (retval) -+ return retval; -+ -+ return change; -+} -+ -+static int snd_at73c213_stereo_info(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_info *uinfo) -+{ -+ int mask = (kcontrol->private_value >> 24) & 0xff; -+ -+ if (mask == 1) -+ uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; -+ else -+ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; -+ -+ uinfo->count = 2; -+ uinfo->value.integer.min = 0; -+ uinfo->value.integer.max = mask; -+ -+ return 0; -+} -+ -+static int snd_at73c213_stereo_get(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_value *ucontrol) -+{ -+ struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol); -+ int left_reg = kcontrol->private_value & 0xff; -+ int right_reg = (kcontrol->private_value >> 8) & 0xff; -+ int shift_left = (kcontrol->private_value >> 16) & 0x07; -+ int shift_right = (kcontrol->private_value >> 19) & 0x07; -+ int mask = (kcontrol->private_value >> 24) & 0xff; -+ int invert = (kcontrol->private_value >> 22) & 1; -+ -+ spin_lock_irq(&chip->lock); -+ -+ ucontrol->value.integer.value[0] = -+ (chip->reg_image[left_reg] >> shift_left) & mask; -+ ucontrol->value.integer.value[1] = -+ (chip->reg_image[right_reg] >> shift_right) & mask; -+ -+ if (invert) { -+ ucontrol->value.integer.value[0] = -+ (mask - ucontrol->value.integer.value[0]); -+ ucontrol->value.integer.value[1] = -+ (mask - ucontrol->value.integer.value[1]); -+ } -+ -+ spin_unlock_irq(&chip->lock); -+ -+ return 0; -+} -+ -+static int snd_at73c213_stereo_put(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_value *ucontrol) -+{ -+ struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol); -+ int left_reg = kcontrol->private_value & 0xff; -+ int right_reg = (kcontrol->private_value >> 8) & 0xff; -+ int shift_left = (kcontrol->private_value >> 16) & 0x07; -+ int shift_right = (kcontrol->private_value >> 19) & 0x07; -+ int mask = (kcontrol->private_value >> 24) & 0xff; -+ int invert = (kcontrol->private_value >> 22) & 1; -+ int change, retval; -+ unsigned short val1, val2; -+ -+ val1 = ucontrol->value.integer.value[0] & mask; -+ val2 = ucontrol->value.integer.value[1] & mask; -+ if (invert) { -+ val1 = mask - val1; -+ val2 = mask - val2; -+ } -+ val1 <<= shift_left; -+ val2 <<= shift_right; -+ -+ spin_lock_irq(&chip->lock); -+ -+ val1 = (chip->reg_image[left_reg] & ~(mask << shift_left)) | val1; -+ val2 = (chip->reg_image[right_reg] & ~(mask << shift_right)) | val2; -+ change = val1 != chip->reg_image[left_reg] -+ || val2 != chip->reg_image[right_reg]; -+ retval = snd_at73c213_write_reg(chip, left_reg, val1); -+ if (retval) { -+ spin_unlock_irq(&chip->lock); -+ goto out; -+ } -+ retval = snd_at73c213_write_reg(chip, right_reg, val2); -+ if (retval) { -+ spin_unlock_irq(&chip->lock); -+ goto out; -+ } -+ -+ spin_unlock_irq(&chip->lock); -+ -+ return change; -+ -+out: -+ return retval; -+} -+ -+static int snd_at73c213_mono_switch_info(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_info *uinfo) -+{ -+ uinfo->type = SNDRV_CTL_ELEM_TYPE_BOOLEAN; -+ uinfo->count = 1; -+ uinfo->value.integer.min = 0; -+ uinfo->value.integer.max = 1; -+ -+ return 0; -+} -+ -+static int snd_at73c213_mono_switch_get(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_value *ucontrol) -+{ -+ struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol); -+ int reg = kcontrol->private_value & 0xff; -+ int shift = (kcontrol->private_value >> 8) & 0xff; -+ int invert = (kcontrol->private_value >> 24) & 0xff; -+ -+ spin_lock_irq(&chip->lock); -+ -+ ucontrol->value.integer.value[0] = (chip->reg_image[reg] >> shift) & 0x01; -+ -+ if (invert) -+ ucontrol->value.integer.value[0] = -+ (0x01 - ucontrol->value.integer.value[0]); -+ -+ spin_unlock_irq(&chip->lock); -+ -+ return 0; -+} -+ -+static int snd_at73c213_mono_switch_put(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_value *ucontrol) -+{ -+ struct snd_at73c213 *chip = snd_kcontrol_chip(kcontrol); -+ int reg = kcontrol->private_value & 0xff; -+ int shift = (kcontrol->private_value >> 8) & 0xff; -+ int mask = (kcontrol->private_value >> 16) & 0xff; -+ int invert = (kcontrol->private_value >> 24) & 0xff; -+ int change, retval; -+ unsigned short val; -+ -+ if (ucontrol->value.integer.value[0]) -+ val = mask; -+ else -+ val = 0; -+ -+ if (invert) -+ val = mask - val; -+ val <<= shift; -+ -+ spin_lock_irq(&chip->lock); -+ -+ val |= (chip->reg_image[reg] & ~(mask << shift)); -+ change = val != chip->reg_image[reg]; -+ -+ retval = snd_at73c213_write_reg(chip, reg, val); -+ -+ spin_unlock_irq(&chip->lock); -+ -+ if (retval) -+ return retval; -+ -+ return change; -+} -+ -+static int snd_at73c213_pa_volume_info(struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_info *uinfo) -+{ -+ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; -+ uinfo->count = 1; -+ uinfo->value.integer.min = 0; -+ uinfo->value.integer.max = ((kcontrol->private_value >> 16) & 0xff) - 1; -+ -+ return 0; -+} -+ -+static int snd_at73c213_line_capture_volume_info( -+ struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_info *uinfo) -+{ -+ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; -+ uinfo->count = 2; -+ /* When inverted will give values 0x10001 => 0. */ -+ uinfo->value.integer.min = 14; -+ uinfo->value.integer.max = 31; -+ -+ return 0; -+} -+ -+static int snd_at73c213_aux_capture_volume_info( -+ struct snd_kcontrol *kcontrol, -+ struct snd_ctl_elem_info *uinfo) -+{ -+ uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; -+ uinfo->count = 1; -+ /* When inverted will give values 0x10001 => 0. */ -+ uinfo->value.integer.min = 14; -+ uinfo->value.integer.max = 31; -+ -+ return 0; -+} -+ -+#define AT73C213_MONO_SWITCH(xname, xindex, reg, shift, mask, invert) \ -+{ \ -+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ -+ .name = xname, \ -+ .index = xindex, \ -+ .info = snd_at73c213_mono_switch_info, \ -+ .get = snd_at73c213_mono_switch_get, \ -+ .put = snd_at73c213_mono_switch_put, \ -+ .private_value = (reg | (shift << 8) | (mask << 16) | (invert << 24)) \ -+} -+ -+#define AT73C213_STEREO(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \ -+{ \ -+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ -+ .name = xname, \ -+ .index = xindex, \ -+ .info = snd_at73c213_stereo_info, \ -+ .get = snd_at73c213_stereo_get, \ -+ .put = snd_at73c213_stereo_put, \ -+ .private_value = (left_reg | (right_reg << 8) \ -+ | (shift_left << 16) | (shift_right << 19) \ -+ | (mask << 24) | (invert << 22)) \ -+} -+ -+static struct snd_kcontrol_new snd_at73c213_controls[] __devinitdata = { -+AT73C213_STEREO("Master Playback Volume", 0, DAC_LMPG, DAC_RMPG, 0, 0, 0x1f, 1), -+AT73C213_STEREO("Master Playback Switch", 0, DAC_LMPG, DAC_RMPG, 5, 5, 1, 1), -+AT73C213_STEREO("PCM Playback Volume", 0, DAC_LLOG, DAC_RLOG, 0, 0, 0x1f, 1), -+AT73C213_STEREO("PCM Playback Switch", 0, DAC_LLOG, DAC_RLOG, 5, 5, 1, 1), -+AT73C213_MONO_SWITCH("Mono PA Playback Switch", 0, DAC_CTRL, DAC_CTRL_ONPADRV, 0x01, 0), -+{ -+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, -+ .name = "PA Playback Volume", -+ .index = 0, -+ .info = snd_at73c213_pa_volume_info, -+ .get = snd_at73c213_mono_get, -+ .put = snd_at73c213_mono_put, -+ .private_value = PA_CTRL | (PA_CTRL_APAGAIN << 8) | (0x0f << 16) | (1 << 24), -+}, -+AT73C213_MONO_SWITCH("PA High Gain Playback Switch", 0, PA_CTRL, PA_CTRL_APALP, 0x01, 1), -+AT73C213_MONO_SWITCH("PA Playback Switch", 0, PA_CTRL, PA_CTRL_APAON, 0x01, 0), -+{ -+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, -+ .name = "Aux Capture Volume", -+ .index = 0, -+ .info = snd_at73c213_aux_capture_volume_info, -+ .get = snd_at73c213_mono_get, -+ .put = snd_at73c213_mono_put, -+ .private_value = DAC_AUXG | (0 << 8) | (0x1f << 16) | (1 << 24), -+}, -+AT73C213_MONO_SWITCH("Aux Capture Switch", 0, DAC_CTRL, DAC_CTRL_ONAUXIN, 0x01, 0), -+{ -+ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, -+ .name = "Line Capture Volume", -+ .index = 0, -+ .info = snd_at73c213_line_capture_volume_info, -+ .get = snd_at73c213_stereo_get, -+ .put = snd_at73c213_stereo_put, -+ .private_value = DAC_LLIG | (DAC_RLIG << 8) | (0 << 16) | (0 << 19) -+ | (0x1f << 24) | (1 << 22), -+}, -+AT73C213_MONO_SWITCH("Line Capture Switch", 0, DAC_CTRL, 0, 0x03, 0), -+}; -+ -+static int __devinit snd_at73c213_mixer(struct snd_at73c213 *chip) -+{ -+ struct snd_card *card; -+ int errval, idx; -+ -+ if (chip == NULL || chip->pcm == NULL) -+ return -EINVAL; -+ -+ card = chip->card; -+ -+ strcpy(card->mixername, chip->pcm->name); -+ -+ for (idx = 0; idx < ARRAY_SIZE(snd_at73c213_controls); idx++) { -+ errval = snd_ctl_add(card, -+ snd_ctl_new1(&snd_at73c213_controls[idx], -+ chip)); -+ if (errval < 0) -+ goto cleanup; -+ } -+ -+ return 0; -+ -+cleanup: -+ for (idx = 1; idx < ARRAY_SIZE(snd_at73c213_controls) + 1; idx++) { -+ struct snd_kcontrol *kctl; -+ kctl = snd_ctl_find_numid(card, idx); -+ if (kctl) -+ snd_ctl_remove(card, kctl); -+ } -+ return errval; -+} -+ -+/* -+ * Device functions -+ */ -+static int snd_at73c213_ssc_init(struct snd_at73c213 *chip) -+{ -+ /* -+ * Continuous clock output. -+ * Starts on falling TF. -+ * Delay 1 cycle (1 bit). -+ * Periode is 16 bit (16 - 1). -+ */ -+ ssc_writel(chip->ssc->regs, TCMR, -+ SSC_BF(TCMR_CKO, 1) -+ | SSC_BF(TCMR_START, 4) -+ | SSC_BF(TCMR_STTDLY, 1) -+ | SSC_BF(TCMR_PERIOD, 16 - 1)); -+ /* -+ * Data length is 16 bit (16 - 1). -+ * Transmit MSB first. -+ * Transmit 2 words each transfer. -+ * Frame sync length is 16 bit (16 - 1). -+ * Frame starts on negative pulse. -+ */ -+ ssc_writel(chip->ssc->regs, TFMR, -+ SSC_BF(TFMR_DATLEN, 16 - 1) -+ | SSC_BIT(TFMR_MSBF) -+ | SSC_BF(TFMR_DATNB, 1) -+ | SSC_BF(TFMR_FSLEN, 16 - 1) -+ | SSC_BF(TFMR_FSOS, 1)); -+ -+ return 0; -+} -+ -+static int snd_at73c213_chip_init(struct snd_at73c213 *chip) -+{ -+ int retval; -+ unsigned char dac_ctrl = 0; -+ -+ retval = snd_at73c213_set_bitrate(chip); -+ if (retval) -+ goto out; -+ -+ /* Enable DAC master clock. */ -+ clk_enable(chip->board->dac_clk); -+ -+ /* Initialize at73c213 on SPI bus. */ -+ retval = snd_at73c213_write_reg(chip, DAC_RST, 0x04); -+ if (retval) -+ goto out_clk; -+ msleep(1); -+ retval = snd_at73c213_write_reg(chip, DAC_RST, 0x03); -+ if (retval) -+ goto out_clk; -+ -+ /* Precharge everything. */ -+ retval = snd_at73c213_write_reg(chip, DAC_PRECH, 0xff); -+ if (retval) -+ goto out_clk; -+ retval = snd_at73c213_write_reg(chip, PA_CTRL, (1<<PA_CTRL_APAPRECH)); -+ if (retval) -+ goto out_clk; -+ retval = snd_at73c213_write_reg(chip, DAC_CTRL, -+ (1<<DAC_CTRL_ONLNOL) | (1<<DAC_CTRL_ONLNOR)); -+ if (retval) -+ goto out_clk; -+ -+ msleep(50); -+ -+ /* Stop precharging PA. */ -+ retval = snd_at73c213_write_reg(chip, PA_CTRL, -+ (1<<PA_CTRL_APALP) | 0x0f); -+ if (retval) -+ goto out_clk; -+ -+ msleep(450); -+ -+ /* Stop precharging DAC, turn on master power. */ -+ retval = snd_at73c213_write_reg(chip, DAC_PRECH, (1<<DAC_PRECH_ONMSTR)); -+ if (retval) -+ goto out_clk; -+ -+ msleep(1); -+ -+ /* Turn on DAC. */ -+ dac_ctrl = (1<<DAC_CTRL_ONDACL) | (1<<DAC_CTRL_ONDACR) -+ | (1<<DAC_CTRL_ONLNOL) | (1<<DAC_CTRL_ONLNOR); -+ -+ retval = snd_at73c213_write_reg(chip, DAC_CTRL, dac_ctrl); -+ if (retval) -+ goto out_clk; -+ -+ /* Mute sound. */ -+ retval = snd_at73c213_write_reg(chip, DAC_LMPG, 0x3f); -+ if (retval) -+ goto out_clk; -+ retval = snd_at73c213_write_reg(chip, DAC_RMPG, 0x3f); -+ if (retval) -+ goto out_clk; -+ retval = snd_at73c213_write_reg(chip, DAC_LLOG, 0x3f); -+ if (retval) -+ goto out_clk; -+ retval = snd_at73c213_write_reg(chip, DAC_RLOG, 0x3f); -+ if (retval) -+ goto out_clk; -+ retval = snd_at73c213_write_reg(chip, DAC_LLIG, 0x11); -+ if (retval) -+ goto out_clk; -+ retval = snd_at73c213_write_reg(chip, DAC_RLIG, 0x11); -+ if (retval) -+ goto out_clk; -+ retval = snd_at73c213_write_reg(chip, DAC_AUXG, 0x11); -+ if (retval) -+ goto out_clk; -+ -+ /* Enable I2S device, i.e. clock output. */ -+ ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXEN)); -+ -+ goto out; -+ -+out_clk: -+ clk_disable(chip->board->dac_clk); -+out: -+ return retval; -+} -+ -+static int snd_at73c213_dev_free(struct snd_device *device) -+{ -+ struct snd_at73c213 *chip = device->device_data; -+ -+ ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXDIS)); -+ if (chip->irq >= 0) { -+ free_irq(chip->irq, chip); -+ chip->irq = -1; -+ } -+ -+ return 0; -+} -+ -+static int __devinit snd_at73c213_dev_init(struct snd_card *card, -+ struct spi_device *spi) -+{ -+ static struct snd_device_ops ops = { -+ .dev_free = snd_at73c213_dev_free, -+ }; -+ struct snd_at73c213 *chip = get_chip(card); -+ int irq, retval; -+ -+ irq = chip->ssc->irq; -+ if (irq < 0) -+ return irq; -+ -+ spin_lock_init(&chip->lock); -+ chip->card = card; -+ chip->irq = -1; -+ -+ retval = request_irq(irq, snd_at73c213_interrupt, 0, "at73c213", chip); -+ if (retval) { -+ dev_dbg(&chip->spi->dev, "unable to request irq %d\n", irq); -+ goto out; -+ } -+ chip->irq = irq; -+ -+ memcpy(&chip->reg_image, &snd_at73c213_original_image, -+ sizeof(snd_at73c213_original_image)); -+ -+ retval = snd_at73c213_ssc_init(chip); -+ if (retval) -+ goto out_irq; -+ -+ retval = snd_at73c213_chip_init(chip); -+ if (retval) -+ goto out_irq; -+ -+ retval = snd_at73c213_pcm_new(chip, 0); -+ if (retval) -+ goto out_irq; -+ -+ retval = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops); -+ if (retval) -+ goto out_irq; -+ -+ retval = snd_at73c213_mixer(chip); -+ if (retval) -+ goto out_snd_dev; -+ -+ snd_card_set_dev(card, &spi->dev); -+ -+ goto out; -+ -+out_snd_dev: -+ snd_device_free(card, chip); -+out_irq: -+ free_irq(chip->irq, chip); -+ chip->irq = -1; -+out: -+ return retval; -+} -+ -+static int snd_at73c213_probe(struct spi_device *spi) -+{ -+ struct snd_card *card; -+ struct snd_at73c213 *chip; -+ struct at73c213_board_info *board; -+ int retval; -+ char id[16]; -+ -+ board = spi->dev.platform_data; -+ if (!board) { -+ dev_dbg(&spi->dev, "no platform_data\n"); -+ return -ENXIO; -+ } -+ -+ if (!board->dac_clk) { -+ dev_dbg(&spi->dev, "no DAC clk\n"); -+ return -ENXIO; -+ } -+ -+ if (IS_ERR(board->dac_clk)) { -+ dev_dbg(&spi->dev, "no DAC clk\n"); -+ return PTR_ERR(board->dac_clk); -+ } -+ -+ retval = -ENOMEM; -+ -+ /* Allocate "card" using some unused identifiers. */ -+ snprintf(id, sizeof id, "at73c213_%d", board->ssc_id); -+ card = snd_card_new(-1, id, THIS_MODULE, sizeof(struct snd_at73c213)); -+ if (!card) -+ goto out; -+ -+ chip = card->private_data; -+ chip->spi = spi; -+ chip->board = board; -+ -+ chip->ssc = ssc_request(board->ssc_id); -+ if (IS_ERR(chip->ssc)) { -+ dev_dbg(&spi->dev, "could not get ssc%d device\n", -+ board->ssc_id); -+ retval = PTR_ERR(chip->ssc); -+ goto out_card; -+ } -+ -+ retval = snd_at73c213_dev_init(card, spi); -+ if (retval) -+ goto out_ssc; -+ -+ strcpy(card->driver, "at73c213"); -+ strcpy(card->shortname, board->shortname); -+ sprintf(card->longname, "%s on irq %d", card->shortname, chip->irq); -+ -+ retval = snd_card_register(card); -+ if (retval) -+ goto out_ssc; -+ -+ dev_set_drvdata(&spi->dev, card); -+ -+ goto out; -+ -+out_ssc: -+ ssc_free(chip->ssc); -+out_card: -+ snd_card_free(card); -+out: -+ return retval; -+} -+ -+static int __devexit snd_at73c213_remove(struct spi_device *spi) -+{ -+ struct snd_card *card = dev_get_drvdata(&spi->dev); -+ struct snd_at73c213 *chip = card->private_data; -+ int retval; -+ -+ /* Stop playback. */ -+ ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXDIS)); -+ -+ /* Mute sound. */ -+ retval = snd_at73c213_write_reg(chip, DAC_LMPG, 0x3f); -+ if (retval) -+ goto out; -+ retval = snd_at73c213_write_reg(chip, DAC_RMPG, 0x3f); -+ if (retval) -+ goto out; -+ retval = snd_at73c213_write_reg(chip, DAC_LLOG, 0x3f); -+ if (retval) -+ goto out; -+ retval = snd_at73c213_write_reg(chip, DAC_RLOG, 0x3f); -+ if (retval) -+ goto out; -+ retval = snd_at73c213_write_reg(chip, DAC_LLIG, 0x11); -+ if (retval) -+ goto out; -+ retval = snd_at73c213_write_reg(chip, DAC_RLIG, 0x11); -+ if (retval) -+ goto out; -+ retval = snd_at73c213_write_reg(chip, DAC_AUXG, 0x11); -+ if (retval) -+ goto out; -+ -+ /* Turn off PA. */ -+ retval = snd_at73c213_write_reg(chip, PA_CTRL, (chip->reg_image[PA_CTRL]|0x0f)); -+ if (retval) -+ goto out; -+ msleep(10); -+ retval = snd_at73c213_write_reg(chip, PA_CTRL, (1<<PA_CTRL_APALP)|0x0f); -+ if (retval) -+ goto out; -+ -+ /* Turn off external DAC. */ -+ retval = snd_at73c213_write_reg(chip, DAC_CTRL, 0x0c); -+ if (retval) -+ goto out; -+ msleep(2); -+ retval = snd_at73c213_write_reg(chip, DAC_CTRL, 0x00); -+ if (retval) -+ goto out; -+ -+ /* Turn off master power. */ -+ retval = snd_at73c213_write_reg(chip, DAC_PRECH, 0x00); -+ if (retval) -+ goto out; -+ -+out: -+ /* Stop DAC master clock. */ -+ clk_disable(chip->board->dac_clk); -+ -+ ssc_free(chip->ssc); -+ snd_card_free(card); -+ dev_set_drvdata(&spi->dev, NULL); -+ -+ return 0; -+} -+ -+#ifdef CONFIG_PM -+static int snd_at73c213_suspend(struct spi_device *spi, pm_message_t msg) -+{ -+ struct snd_card *card = dev_get_drvdata(&spi->dev); -+ struct snd_at73c213 *chip = card->private_data; -+ -+ ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXDIS)); -+ clk_disable(chip->board->dac_clk); -+ -+ return 0; -+} -+ -+static int snd_at73c213_resume(struct spi_device *spi) -+{ -+ struct snd_card *card = dev_get_drvdata(&spi->dev); -+ struct snd_at73c213 *chip = card->private_data; -+ -+ clk_enable(chip->board->dac_clk); -+ ssc_writel(chip->ssc->regs, CR, SSC_BIT(CR_TXEN)); -+ -+ return 0; -+} -+#else -+#define snd_at73c213_suspend NULL -+#define snd_at73c213_resume NULL -+#endif -+ -+static struct spi_driver at73c213_driver = { -+ .driver = { -+ .name = "at73c213", -+ }, -+ .probe = snd_at73c213_probe, -+ .suspend = snd_at73c213_suspend, -+ .resume = snd_at73c213_resume, -+ .remove = __devexit_p(snd_at73c213_remove), -+}; -+ -+static int __init at73c213_init(void) -+{ -+ return spi_register_driver(&at73c213_driver); -+} -+module_init(at73c213_init); -+ -+static void __exit at73c213_exit(void) -+{ -+ spi_unregister_driver(&at73c213_driver); -+} -+module_exit(at73c213_exit); -+ -+MODULE_AUTHOR("Hans-Christian Egtvedt <hcegtvedt@atmel.com>"); -+MODULE_DESCRIPTION("Sound driver for AT73C213 with Atmel SSC"); -+MODULE_LICENSE("GPL"); -diff --git a/sound/spi/at73c213.h b/sound/spi/at73c213.h -new file mode 100644 -index 0000000..fd8b372 ---- /dev/null -+++ b/sound/spi/at73c213.h -@@ -0,0 +1,119 @@ -+/* -+ * Driver for the AT73C213 16-bit stereo DAC on Atmel ATSTK1000 -+ * -+ * Copyright (C) 2006 - 2007 Atmel Corporation -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License as -+ * published by the Free Software Foundation; either version 2 of the -+ * License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, but -+ * WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU -+ * General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA -+ * 02111-1307, USA. -+ * -+ * The full GNU General Public License is included in this -+ * distribution in the file called COPYING. -+ */ -+ -+#ifndef _SND_AT73C213_H -+#define _SND_AT73C213_H -+ -+/* DAC control register */ -+#define DAC_CTRL 0x00 -+#define DAC_CTRL_ONPADRV 7 -+#define DAC_CTRL_ONAUXIN 6 -+#define DAC_CTRL_ONDACR 5 -+#define DAC_CTRL_ONDACL 4 -+#define DAC_CTRL_ONLNOR 3 -+#define DAC_CTRL_ONLNOL 2 -+#define DAC_CTRL_ONLNIR 1 -+#define DAC_CTRL_ONLNIL 0 -+ -+/* DAC left line in gain register */ -+#define DAC_LLIG 0x01 -+#define DAC_LLIG_LLIG 0 -+ -+/* DAC right line in gain register */ -+#define DAC_RLIG 0x02 -+#define DAC_RLIG_RLIG 0 -+ -+/* DAC Left Master Playback Gain Register */ -+#define DAC_LMPG 0x03 -+#define DAC_LMPG_LMPG 0 -+ -+/* DAC Right Master Playback Gain Register */ -+#define DAC_RMPG 0x04 -+#define DAC_RMPG_RMPG 0 -+ -+/* DAC Left Line Out Gain Register */ -+#define DAC_LLOG 0x05 -+#define DAC_LLOG_LLOG 0 -+ -+/* DAC Right Line Out Gain Register */ -+#define DAC_RLOG 0x06 -+#define DAC_RLOG_RLOG 0 -+ -+/* DAC Output Level Control Register */ -+#define DAC_OLC 0x07 -+#define DAC_OLC_RSHORT 7 -+#define DAC_OLC_ROLC 4 -+#define DAC_OLC_LSHORT 3 -+#define DAC_OLC_LOLC 0 -+ -+/* DAC Mixer Control Register */ -+#define DAC_MC 0x08 -+#define DAC_MC_INVR 5 -+#define DAC_MC_INVL 4 -+#define DAC_MC_RMSMIN2 3 -+#define DAC_MC_RMSMIN1 2 -+#define DAC_MC_LMSMIN2 1 -+#define DAC_MC_LMSMIN1 0 -+ -+/* DAC Clock and Sampling Frequency Control Register */ -+#define DAC_CSFC 0x09 -+#define DAC_CSFC_OVRSEL 4 -+ -+/* DAC Miscellaneous Register */ -+#define DAC_MISC 0x0A -+#define DAC_MISC_VCMCAPSEL 7 -+#define DAC_MISC_DINTSEL 4 -+#define DAC_MISC_DITHEN 3 -+#define DAC_MISC_DEEMPEN 2 -+#define DAC_MISC_NBITS 0 -+ -+/* DAC Precharge Control Register */ -+#define DAC_PRECH 0x0C -+#define DAC_PRECH_PRCHGPDRV 7 -+#define DAC_PRECH_PRCHGAUX1 6 -+#define DAC_PRECH_PRCHGLNOR 5 -+#define DAC_PRECH_PRCHGLNOL 4 -+#define DAC_PRECH_PRCHGLNIR 3 -+#define DAC_PRECH_PRCHGLNIL 2 -+#define DAC_PRECH_PRCHG 1 -+#define DAC_PRECH_ONMSTR 0 -+ -+/* DAC Auxiliary Input Gain Control Register */ -+#define DAC_AUXG 0x0D -+#define DAC_AUXG_AUXG 0 -+ -+/* DAC Reset Register */ -+#define DAC_RST 0x10 -+#define DAC_RST_RESMASK 2 -+#define DAC_RST_RESFILZ 1 -+#define DAC_RST_RSTZ 0 -+ -+/* Power Amplifier Control Register */ -+#define PA_CTRL 0x11 -+#define PA_CTRL_APAON 6 -+#define PA_CTRL_APAPRECH 5 -+#define PA_CTRL_APALP 4 -+#define PA_CTRL_APAGAIN 0 -+ -+#endif /* _SND_AT73C213_H */ |