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-rw-r--r--target/linux/sunxi/patches-3.12/137-3-dt-sun5i-a10s-add-hstimer.patch38
1 files changed, 38 insertions, 0 deletions
diff --git a/target/linux/sunxi/patches-3.12/137-3-dt-sun5i-a10s-add-hstimer.patch b/target/linux/sunxi/patches-3.12/137-3-dt-sun5i-a10s-add-hstimer.patch
new file mode 100644
index 0000000000..afdaa5a248
--- /dev/null
+++ b/target/linux/sunxi/patches-3.12/137-3-dt-sun5i-a10s-add-hstimer.patch
@@ -0,0 +1,38 @@
+From 5ace5467690055b1772dcac69dd1377735b8a34b Mon Sep 17 00:00:00 2001
+From: Maxime Ripard <maxime.ripard@free-electrons.com>
+Date: Thu, 7 Nov 2013 12:01:48 +0100
+Subject: [PATCH] ARM: sun5i: a10s: Add support for the High Speed Timers
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+The Allwinner A10s has support for two high speed timers. Now that we
+have a driver to support it, we can enable them in the device tree.
+
+Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
+Tested-by: Emilio López <emilio@elopez.com.ar>
+Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
+---
+ arch/arm/boot/dts/sun5i-a10s.dtsi | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi
+index b4764be..924a2c1 100644
+--- a/arch/arm/boot/dts/sun5i-a10s.dtsi
++++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
+@@ -336,5 +336,12 @@
+ clock-frequency = <100000>;
+ status = "disabled";
+ };
++
++ timer@01c60000 {
++ compatible = "allwinner,sun5i-a13-hstimer";
++ reg = <0x01c60000 0x1000>;
++ interrupts = <82>, <83>;
++ clocks = <&ahb_gates 28>;
++ };
+ };
+ };
+--
+1.8.5.1
+