summaryrefslogtreecommitdiff
path: root/target/linux/ramips/patches-3.8/0123-MIPS-ralink-add-memory-definition-for-RT305x.patch
diff options
context:
space:
mode:
Diffstat (limited to 'target/linux/ramips/patches-3.8/0123-MIPS-ralink-add-memory-definition-for-RT305x.patch')
-rw-r--r--target/linux/ramips/patches-3.8/0123-MIPS-ralink-add-memory-definition-for-RT305x.patch89
1 files changed, 89 insertions, 0 deletions
diff --git a/target/linux/ramips/patches-3.8/0123-MIPS-ralink-add-memory-definition-for-RT305x.patch b/target/linux/ramips/patches-3.8/0123-MIPS-ralink-add-memory-definition-for-RT305x.patch
new file mode 100644
index 0000000000..877e442b62
--- /dev/null
+++ b/target/linux/ramips/patches-3.8/0123-MIPS-ralink-add-memory-definition-for-RT305x.patch
@@ -0,0 +1,89 @@
+From 016f1f659cf70cc78e72e12a2130d8f3e1a6e0d3 Mon Sep 17 00:00:00 2001
+From: John Crispin <blogic@openwrt.org>
+Date: Sat, 13 Apr 2013 15:13:40 +0200
+Subject: [PATCH 123/137] MIPS: ralink: add memory definition for RT305x
+
+Populate struct soc_info with the data that describes our RAM window.
+
+As memory detection fails on RT5350 we read the amount of available memory
+from the system controller.
+
+Signed-off-by: John Crispin <blogic@openwrt.org>
+Patchwork: http://patchwork.linux-mips.org/patch/5180/
+---
+ arch/mips/include/asm/mach-ralink/rt305x.h | 6 ++++
+ arch/mips/ralink/rt305x.c | 45 ++++++++++++++++++++++++++++
+ 2 files changed, 51 insertions(+)
+
+--- a/arch/mips/include/asm/mach-ralink/rt305x.h
++++ b/arch/mips/include/asm/mach-ralink/rt305x.h
+@@ -157,4 +157,10 @@ static inline int soc_is_rt5350(void)
+ #define RT3352_RSTCTRL_UDEV BIT(25)
+ #define RT3352_SYSCFG1_USB0_HOST_MODE BIT(10)
+
++#define RT305X_SDRAM_BASE 0x00000000
++#define RT305X_MEM_SIZE_MIN 2
++#define RT305X_MEM_SIZE_MAX 64
++#define RT3352_MEM_SIZE_MIN 2
++#define RT3352_MEM_SIZE_MAX 256
++
+ #endif
+--- a/arch/mips/ralink/rt305x.c
++++ b/arch/mips/ralink/rt305x.c
+@@ -122,6 +122,40 @@ struct ralink_pinmux rt_gpio_pinmux = {
+ .wdt_reset = rt305x_wdt_reset,
+ };
+
++static unsigned long rt5350_get_mem_size(void)
++{
++ void __iomem *sysc = (void __iomem *) KSEG1ADDR(RT305X_SYSC_BASE);
++ unsigned long ret;
++ u32 t;
++
++ t = __raw_readl(sysc + SYSC_REG_SYSTEM_CONFIG);
++ t = (t >> RT5350_SYSCFG0_DRAM_SIZE_SHIFT) &
++ RT5350_SYSCFG0_DRAM_SIZE_MASK;
++
++ switch (t) {
++ case RT5350_SYSCFG0_DRAM_SIZE_2M:
++ ret = 2;
++ break;
++ case RT5350_SYSCFG0_DRAM_SIZE_8M:
++ ret = 8;
++ break;
++ case RT5350_SYSCFG0_DRAM_SIZE_16M:
++ ret = 16;
++ break;
++ case RT5350_SYSCFG0_DRAM_SIZE_32M:
++ ret = 32;
++ break;
++ case RT5350_SYSCFG0_DRAM_SIZE_64M:
++ ret = 64;
++ break;
++ default:
++ panic("rt5350: invalid DRAM size: %u", t);
++ break;
++ }
++
++ return ret;
++}
++
+ void __init ralink_clk_init(void)
+ {
+ unsigned long cpu_rate, sys_rate, wdt_rate, uart_rate;
+@@ -252,4 +286,15 @@ void prom_soc_init(struct ralink_soc_inf
+ name,
+ (id >> CHIP_ID_ID_SHIFT) & CHIP_ID_ID_MASK,
+ (id & CHIP_ID_REV_MASK));
++
++ soc_info->mem_base = RT305X_SDRAM_BASE;
++ if (soc_is_rt5350()) {
++ soc_info->mem_size = rt5350_get_mem_size();
++ } else if (soc_is_rt305x() || soc_is_rt3350()) {
++ soc_info->mem_size_min = RT305X_MEM_SIZE_MIN;
++ soc_info->mem_size_max = RT305X_MEM_SIZE_MAX;
++ } else if (soc_is_rt3352()) {
++ soc_info->mem_size_min = RT3352_MEM_SIZE_MIN;
++ soc_info->mem_size_max = RT3352_MEM_SIZE_MAX;
++ }
+ }