diff options
Diffstat (limited to 'target/linux/lantiq/patches-3.3')
| -rw-r--r-- | target/linux/lantiq/patches-3.3/201-owrt-mtd_split.patch | 15 | ||||
| -rw-r--r-- | target/linux/lantiq/patches-3.3/207-devices.patch | 34 |
2 files changed, 23 insertions, 26 deletions
diff --git a/target/linux/lantiq/patches-3.3/201-owrt-mtd_split.patch b/target/linux/lantiq/patches-3.3/201-owrt-mtd_split.patch index 5883d2a639..91069da81f 100644 --- a/target/linux/lantiq/patches-3.3/201-owrt-mtd_split.patch +++ b/target/linux/lantiq/patches-3.3/201-owrt-mtd_split.patch @@ -13,11 +13,10 @@ ---help--- --- a/drivers/mtd/mtdpart.c +++ b/drivers/mtd/mtdpart.c -@@ -867,6 +867,169 @@ static int refresh_rootfs_split(struct m +@@ -867,6 +867,168 @@ static int refresh_rootfs_split(struct m } #endif /* CONFIG_MTD_ROOTFS_SPLIT */ -+ +#ifdef CONFIG_MTD_UIMAGE_SPLIT +static unsigned long find_uimage_size(struct mtd_info *mtd, + unsigned long offset) @@ -98,7 +97,7 @@ +} + +static unsigned long find_brnimage_size(struct mtd_info *mtd, -+ unsigned long offset) ++ unsigned long offset) +{ + unsigned long buf[4]; + // Assume at most 2MB of kernel image @@ -183,7 +182,7 @@ /* * This function, given a master MTD object and a partition table, creates * and registers slave MTD objects which are bound to the master according to -@@ -883,7 +1046,7 @@ int add_mtd_partitions(struct mtd_info * +@@ -883,7 +1045,7 @@ int add_mtd_partitions(struct mtd_info * struct mtd_part *slave; uint64_t cur_offset = 0; int i; @@ -192,7 +191,7 @@ int ret; #endif -@@ -900,6 +1063,17 @@ int add_mtd_partitions(struct mtd_info * +@@ -900,6 +1062,15 @@ int add_mtd_partitions(struct mtd_info * add_mtd_device(&slave->mtd); @@ -200,10 +199,8 @@ + if (!strcmp(parts[i].name, "linux")) { + ret = split_uimage(master, &parts[i]); + -+ if (ret) { -+ printk(KERN_WARNING -+ "Can't split linux partition\n"); -+ } ++ if (ret) ++ printk(KERN_WARNING "Can't split linux partition\n"); + } +#endif + diff --git a/target/linux/lantiq/patches-3.3/207-devices.patch b/target/linux/lantiq/patches-3.3/207-devices.patch index f0bc99e91b..693e361f4a 100644 --- a/target/linux/lantiq/patches-3.3/207-devices.patch +++ b/target/linux/lantiq/patches-3.3/207-devices.patch @@ -24,7 +24,7 @@ +void __init +ltq_register_tapi(void) +{ -+#define CP1_SIZE (1 << 20) ++#define CP1_SIZE (1 << 20) + dma_addr_t dma; + cp1_base = + (void*)CPHYSADDR(dma_alloc_coherent(NULL, CP1_SIZE, &dma, GFP_ATOMIC)); @@ -67,17 +67,17 @@ +/* ebu */ +static struct resource ltq_ebu_resource = +{ -+ .name = "gpio_ebu", -+ .start = LTQ_EBU_GPIO_START, -+ .end = LTQ_EBU_GPIO_START + LTQ_EBU_GPIO_SIZE - 1, -+ .flags = IORESOURCE_MEM, ++ .name = "gpio_ebu", ++ .start = LTQ_EBU_GPIO_START, ++ .end = LTQ_EBU_GPIO_START + LTQ_EBU_GPIO_SIZE - 1, ++ .flags = IORESOURCE_MEM, +}; + +static struct platform_device ltq_ebu = +{ -+ .name = "ltq_ebu", -+ .resource = <q_ebu_resource, -+ .num_resources = 1, ++ .name = "ltq_ebu", ++ .resource = <q_ebu_resource, ++ .num_resources = 1, +}; + +void __init @@ -109,9 +109,9 @@ + +static struct resource ltq_spi_resources[] = { + { -+ .start = LTQ_SSC_BASE_ADDR, -+ .end = LTQ_SSC_BASE_ADDR + LTQ_SSC_SIZE - 1, -+ .flags = IORESOURCE_MEM, ++ .start = LTQ_SSC_BASE_ADDR, ++ .end = LTQ_SSC_BASE_ADDR + LTQ_SSC_SIZE - 1, ++ .flags = IORESOURCE_MEM, + }, + IRQ_RES(spi_tx, LTQ_SSC_TIR), + IRQ_RES(spi_rx, LTQ_SSC_RIR), @@ -120,9 +120,9 @@ + +static struct resource ltq_spi_resources_ar9[] = { + { -+ .start = LTQ_SSC_BASE_ADDR, -+ .end = LTQ_SSC_BASE_ADDR + LTQ_SSC_SIZE - 1, -+ .flags = IORESOURCE_MEM, ++ .start = LTQ_SSC_BASE_ADDR, ++ .end = LTQ_SSC_BASE_ADDR + LTQ_SSC_SIZE - 1, ++ .flags = IORESOURCE_MEM, + }, + IRQ_RES(spi_tx, LTQ_SSC_TIR_AR9), + IRQ_RES(spi_rx, LTQ_SSC_RIR_AR9), @@ -131,9 +131,9 @@ + +static struct resource ltq_spi_resources_ase[] = { + { -+ .start = LTQ_SSC_BASE_ADDR, -+ .end = LTQ_SSC_BASE_ADDR + LTQ_SSC_SIZE - 1, -+ .flags = IORESOURCE_MEM, ++ .start = LTQ_SSC_BASE_ADDR, ++ .end = LTQ_SSC_BASE_ADDR + LTQ_SSC_SIZE - 1, ++ .flags = IORESOURCE_MEM, + }, + IRQ_RES(spi_tx, LTQ_SSC_TIR_ASE), + IRQ_RES(spi_rx, LTQ_SSC_RIR_ASE), |