diff options
Diffstat (limited to 'target/linux/lantiq/patches-3.2/0037-MIPS-lantiq-add-additional-soc-ids.patch')
| -rw-r--r-- | target/linux/lantiq/patches-3.2/0037-MIPS-lantiq-add-additional-soc-ids.patch | 149 |
1 files changed, 0 insertions, 149 deletions
diff --git a/target/linux/lantiq/patches-3.2/0037-MIPS-lantiq-add-additional-soc-ids.patch b/target/linux/lantiq/patches-3.2/0037-MIPS-lantiq-add-additional-soc-ids.patch deleted file mode 100644 index 03e0cf31c1..0000000000 --- a/target/linux/lantiq/patches-3.2/0037-MIPS-lantiq-add-additional-soc-ids.patch +++ /dev/null @@ -1,149 +0,0 @@ -From 5585147ea9462778decc7146667ac54413acd91f Mon Sep 17 00:00:00 2001 -From: John Crispin <blogic@openwrt.org> -Date: Mon, 12 Mar 2012 15:23:39 +0100 -Subject: [PATCH 37/73] MIPS: lantiq: add additional soc ids - ---- - .../mips/include/asm/mach-lantiq/xway/lantiq_soc.h | 38 +++++++++++++++---- - arch/mips/lantiq/xway/prom.c | 35 ++++++++++++++++-- - 2 files changed, 61 insertions(+), 12 deletions(-) - ---- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h -+++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h -@@ -17,20 +17,32 @@ - #define SOC_ID_DANUBE1 0x129 - #define SOC_ID_DANUBE2 0x12B - #define SOC_ID_TWINPASS 0x12D --#define SOC_ID_AMAZON_SE 0x152 -+#define SOC_ID_AMAZON_SE_1 0x152 /* 50601 */ -+#define SOC_ID_AMAZON_SE_2 0x153 /* 50600 */ - #define SOC_ID_ARX188 0x16C --#define SOC_ID_ARX168 0x16D -+#define SOC_ID_ARX168_1 0x16D -+#define SOC_ID_ARX168_2 0x16E - #define SOC_ID_ARX182 0x16F --#define SOC_ID_VRX288 0x1C0 /* VRX288 v1.1 */ --#define SOC_ID_VRX268 0x1C2 /* VRX268 v1.1 */ --#define SOC_ID_GRX288 0x1C9 /* GRX288 v1.1 */ -+#define SOC_ID_GRX188 0x170 -+#define SOC_ID_GRX168 0x171 -+ -+#define SOC_ID_VRX288 0x1C0 /* v1.1 */ -+#define SOC_ID_VRX282 0x1C1 /* v1.1 */ -+#define SOC_ID_VRX268 0x1C2 /* v1.1 */ -+#define SOC_ID_GRX268 0x1C8 /* v1.1 */ -+#define SOC_ID_GRX288 0x1C9 /* v1.1 */ -+#define SOC_ID_VRX288_2 0x00B /* v1.2 */ -+#define SOC_ID_VRX268_2 0x00C /* v1.2 */ -+#define SOC_ID_GRX288_2 0x00D /* v1.2 */ -+#define SOC_ID_GRX282_2 0x00E /* v1.2 */ - - /* SoC Types */ - #define SOC_TYPE_DANUBE 0x01 - #define SOC_TYPE_TWINPASS 0x02 - #define SOC_TYPE_AR9 0x03 --#define SOC_TYPE_VR9 0x04 --#define SOC_TYPE_AMAZON_SE 0x05 -+#define SOC_TYPE_VR9_1 0x04 /* v1.1 */ -+#define SOC_TYPE_VR9_2 0x05 /* v1.2 */ -+#define SOC_TYPE_AMAZON_SE 0x06 - - /* ASC0/1 - serial port */ - #define LTQ_ASC0_BASE_ADDR 0x1E100400 -@@ -149,9 +161,19 @@ static inline int ltq_is_ar9(void) - return (ltq_get_soc_type() == SOC_TYPE_AR9); - } - -+static inline int ltq_is_vr9_1(void) -+{ -+ return (ltq_get_soc_type() == SOC_TYPE_VR9_1); -+} -+ -+static inline int ltq_is_vr9_2(void) -+{ -+ return (ltq_get_soc_type() == SOC_TYPE_VR9_2); -+} -+ - static inline int ltq_is_vr9(void) - { -- return (ltq_get_soc_type() == SOC_TYPE_VR9); -+ return (ltq_is_vr9_1() || ltq_is_vr9_2()); - } - - static inline int ltq_is_falcon(void) ---- a/arch/mips/lantiq/xway/prom.c -+++ b/arch/mips/lantiq/xway/prom.c -@@ -18,7 +18,9 @@ - - #define SOC_DANUBE "Danube" - #define SOC_TWINPASS "Twinpass" -+#define SOC_AMAZON_SE "Amazon_SE" - #define SOC_AR9 "AR9" -+#define SOC_GR9 "GR9" - #define SOC_VR9 "VR9" - - #define PART_SHIFT 12 -@@ -26,7 +28,6 @@ - #define REV_SHIFT 28 - #define REV_MASK 0xF0000000 - --#define SOC_AMAZON_SE "Amazon_SE" - - void __init ltq_soc_detect(struct ltq_soc_info *i) - { -@@ -46,13 +47,21 @@ void __init ltq_soc_detect(struct ltq_so - break; - - case SOC_ID_ARX188: -- case SOC_ID_ARX168: -+ case SOC_ID_ARX168_1: -+ case SOC_ID_ARX168_2: - case SOC_ID_ARX182: - i->name = SOC_AR9; - i->type = SOC_TYPE_AR9; - break; - -- case SOC_ID_AMAZON_SE: -+ case SOC_ID_GRX188: -+ case SOC_ID_GRX168: -+ i->name = SOC_GR9; -+ i->type = SOC_TYPE_AR9; -+ break; -+ -+ case SOC_ID_AMAZON_SE_1: -+ case SOC_ID_AMAZON_SE_2: - i->name = SOC_AMAZON_SE; - i->type = SOC_TYPE_AMAZON_SE; - #ifdef CONFIG_PCI -@@ -60,12 +69,30 @@ void __init ltq_soc_detect(struct ltq_so - #endif - break; - -+ case SOC_ID_VRX282: - case SOC_ID_VRX268: - case SOC_ID_VRX288: - i->name = SOC_VR9; -- i->type = SOC_TYPE_VR9; -+ i->type = SOC_TYPE_VR9_1; - break; - -+ case SOC_ID_GRX268: -+ case SOC_ID_GRX288: -+ i->name = SOC_GR9; -+ i->type = SOC_TYPE_VR9_1; -+ break; -+ -+ case SOC_ID_VRX268_2: -+ case SOC_ID_VRX288_2: -+ i->name = SOC_VR9; -+ i->type = SOC_TYPE_VR9_2; -+ break; -+ -+ case SOC_ID_GRX282_2: -+ case SOC_ID_GRX288_2: -+ i->name = SOC_GR9; -+ i->type = SOC_TYPE_VR9_2; -+ - default: - unreachable(); - break; |