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Diffstat (limited to 'target/linux/lantiq/patches-3.2/0011-MIPS-lantiq-fix-early-printk.patch')
-rw-r--r--target/linux/lantiq/patches-3.2/0011-MIPS-lantiq-fix-early-printk.patch61
1 files changed, 0 insertions, 61 deletions
diff --git a/target/linux/lantiq/patches-3.2/0011-MIPS-lantiq-fix-early-printk.patch b/target/linux/lantiq/patches-3.2/0011-MIPS-lantiq-fix-early-printk.patch
deleted file mode 100644
index d8284c781d..0000000000
--- a/target/linux/lantiq/patches-3.2/0011-MIPS-lantiq-fix-early-printk.patch
+++ /dev/null
@@ -1,61 +0,0 @@
-From 993160b530efe9b0d3f0bc4551954a4c3344beeb Mon Sep 17 00:00:00 2001
-From: John Crispin <blogic@openwrt.org>
-Date: Sat, 20 Aug 2011 18:55:13 +0200
-Subject: [PATCH 11/73] MIPS: lantiq: fix early printk
-
-The code was using a 32bit write operations in the early_printk code. This
-resulted in 3 zero bytes also being written to the serial port. This patch
-changes the memory access to 8bit.
-
-Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
-Signed-off-by: John Crispin <blogic@openwrt.org>
----
- .../mips/include/asm/mach-lantiq/xway/lantiq_soc.h | 6 ++++++
- arch/mips/lantiq/early_printk.c | 14 ++++++++------
- 2 files changed, 14 insertions(+), 6 deletions(-)
-
---- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
-+++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
-@@ -34,6 +34,12 @@
- #define LTQ_ASC1_BASE_ADDR 0x1E100C00
- #define LTQ_ASC_SIZE 0x400
-
-+/*
-+ * during early_printk no ioremap is possible
-+ * lets use KSEG1 instead
-+ */
-+#define LTQ_EARLY_ASC KSEG1ADDR(LTQ_ASC1_BASE_ADDR)
-+
- /* RCU - reset control unit */
- #define LTQ_RCU_BASE_ADDR 0x1F203000
- #define LTQ_RCU_SIZE 0x1000
---- a/arch/mips/lantiq/early_printk.c
-+++ b/arch/mips/lantiq/early_printk.c
-@@ -12,11 +12,13 @@
- #include <lantiq.h>
- #include <lantiq_soc.h>
-
--/* no ioremap possible at this early stage, lets use KSEG1 instead */
--#define LTQ_ASC_BASE KSEG1ADDR(LTQ_ASC1_BASE_ADDR)
- #define ASC_BUF 1024
--#define LTQ_ASC_FSTAT ((u32 *)(LTQ_ASC_BASE + 0x0048))
--#define LTQ_ASC_TBUF ((u32 *)(LTQ_ASC_BASE + 0x0020))
-+#define LTQ_ASC_FSTAT ((u32 *)(LTQ_EARLY_ASC + 0x0048))
-+#ifdef __BIG_ENDIAN
-+#define LTQ_ASC_TBUF ((u32 *)(LTQ_EARLY_ASC + 0x0020 + 3))
-+#else
-+#define LTQ_ASC_TBUF ((u32 *)(LTQ_EARLY_ASC + 0x0020))
-+#endif
- #define TXMASK 0x3F00
- #define TXOFFSET 8
-
-@@ -27,7 +29,7 @@ void prom_putchar(char c)
- local_irq_save(flags);
- do { } while ((ltq_r32(LTQ_ASC_FSTAT) & TXMASK) >> TXOFFSET);
- if (c == '\n')
-- ltq_w32('\r', LTQ_ASC_TBUF);
-- ltq_w32(c, LTQ_ASC_TBUF);
-+ ltq_w8('\r', LTQ_ASC_TBUF);
-+ ltq_w8(c, LTQ_ASC_TBUF);
- local_irq_restore(flags);
- }