diff options
Diffstat (limited to 'target/linux/generic/patches-3.8')
3 files changed, 395 insertions, 189 deletions
diff --git a/target/linux/generic/patches-3.8/020-ssb_update.patch b/target/linux/generic/patches-3.8/020-ssb_update.patch index 22dae59498..95a224600b 100644 --- a/target/linux/generic/patches-3.8/020-ssb_update.patch +++ b/target/linux/generic/patches-3.8/020-ssb_update.patch @@ -6,7 +6,7 @@ +config SSB_SFLASH + bool "SSB serial flash support" -+ depends on SSB_DRIVER_MIPS && BROKEN ++ depends on SSB_DRIVER_MIPS + default y + # Assumption: We are on embedded, if we compile the MIPS core. @@ -179,7 +179,7 @@ "Unknown spuravoidance settings for chip 0x%04X, not changing PLL\n", --- /dev/null +++ b/drivers/ssb/driver_chipcommon_sflash.c -@@ -0,0 +1,166 @@ +@@ -0,0 +1,164 @@ +/* + * Sonics Silicon Backplane + * ChipCommon serial flash interface @@ -333,8 +333,8 @@ + sflash->size = sflash->blocksize * sflash->numblocks; + sflash->present = true; + -+ pr_info("Found %s serial flash (blocksize: 0x%X, blocks: %d)\n", -+ e->name, e->blocksize, e->numblocks); ++ pr_info("Found %s serial flash (size: %dKiB, blocksize: 0x%X, blocks: %d)\n", ++ e->name, sflash->size / 1024, e->blocksize, e->numblocks); + + /* Prepare platform device, but don't register it yet. It's too early, + * malloc (required by device_private_init) is not available yet. */ @@ -342,9 +342,7 @@ + sflash->size; + ssb_sflash_dev.dev.platform_data = sflash; + -+ pr_err("Serial flash support is not implemented yet!\n"); -+ -+ return -ENOTSUPP; ++ return 0; +} --- a/drivers/ssb/driver_gpio.c +++ b/drivers/ssb/driver_gpio.c diff --git a/target/linux/generic/patches-3.8/025-bcma_backport.patch b/target/linux/generic/patches-3.8/025-bcma_backport.patch index 7373c0281e..2764474890 100644 --- a/target/linux/generic/patches-3.8/025-bcma_backport.patch +++ b/target/linux/generic/patches-3.8/025-bcma_backport.patch @@ -19,6 +19,23 @@ config BCMA_DRIVER_PCI_HOSTMODE bool "Driver for PCI core working in hostmode" +@@ -34,8 +35,14 @@ config BCMA_DRIVER_PCI_HOSTMODE + PCI core hostmode operation (external PCI bus). + + config BCMA_HOST_SOC +- bool +- depends on BCMA_DRIVER_MIPS ++ bool "Support for BCMA in a SoC" ++ depends on BCMA ++ help ++ Host interface for a Broadcom AIX bus directly mapped into ++ the memory. This only works with the Broadcom SoCs from the ++ BCM47XX line. ++ ++ If unsure, say N + + config BCMA_DRIVER_MIPS + bool "BCMA Broadcom MIPS core driver" --- a/drivers/bcma/bcma_private.h +++ b/drivers/bcma/bcma_private.h @@ -22,6 +22,8 @@ @@ -985,7 +1002,15 @@ /* Enable PCI bridge BAR0 memory & master access */ tmp = PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY; bcma_extpci_write_config(pc, 0, 0, PCI_COMMAND, &tmp, sizeof(tmp)); -@@ -576,7 +592,7 @@ int bcma_core_pci_plat_dev_init(struct p +@@ -565,6 +581,7 @@ DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI + int bcma_core_pci_plat_dev_init(struct pci_dev *dev) + { + struct bcma_drv_pci_host *pc_host; ++ int readrq; + + if (dev->bus->ops->read != bcma_core_pci_hostmode_read_config) { + /* This is not a device on the PCI-core bridge. */ +@@ -576,9 +593,14 @@ int bcma_core_pci_plat_dev_init(struct p pr_info("PCI: Fixing up device %s\n", pci_name(dev)); /* Fix up interrupt lines */ @@ -993,8 +1018,15 @@ + dev->irq = bcma_core_irq(pc_host->pdev->core); pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq); ++ readrq = pcie_get_readrq(dev); ++ if (readrq > 128) { ++ pr_info("change PCIe max read request size from %i to 128\n", readrq); ++ pcie_set_readrq(dev, 128); ++ } return 0; -@@ -595,6 +611,6 @@ int bcma_core_pci_pcibios_map_irq(const + } + EXPORT_SYMBOL(bcma_core_pci_plat_dev_init); +@@ -595,6 +617,6 @@ int bcma_core_pci_pcibios_map_irq(const pc_host = container_of(dev->bus->ops, struct bcma_drv_pci_host, pci_ops); @@ -1078,9 +1110,37 @@ #ifdef CONFIG_BCMA_SFLASH if (bus->drv_cc.sflash.present) { err = platform_device_register(&bcma_sflash_dev); +@@ -205,7 +237,7 @@ int bcma_bus_register(struct bcma_bus *b + err = bcma_bus_scan(bus); + if (err) { + bcma_err(bus, "Failed to scan: %d\n", err); +- return -1; ++ return err; + } + + /* Early init CC core */ --- a/drivers/bcma/scan.c +++ b/drivers/bcma/scan.c -@@ -84,6 +84,8 @@ static const struct bcma_device_id_name +@@ -32,6 +32,18 @@ static const struct bcma_device_id_name + { BCMA_CORE_4706_CHIPCOMMON, "BCM4706 ChipCommon" }, + { BCMA_CORE_4706_SOC_RAM, "BCM4706 SOC RAM" }, + { BCMA_CORE_4706_MAC_GBIT, "BCM4706 GBit MAC" }, ++ { BCMA_CORE_PCIEG2, "PCIe Gen 2" }, ++ { BCMA_CORE_DMA, "DMA" }, ++ { BCMA_CORE_SDIO3, "SDIO3" }, ++ { BCMA_CORE_USB20, "USB 2.0" }, ++ { BCMA_CORE_USB30, "USB 3.0" }, ++ { BCMA_CORE_A9JTAG, "ARM Cortex A9 JTAG" }, ++ { BCMA_CORE_DDR23, "Denali DDR2/DDR3 memory controller" }, ++ { BCMA_CORE_ROM, "ROM" }, ++ { BCMA_CORE_NAND, "NAND flash controller" }, ++ { BCMA_CORE_QSPI, "SPI flash controller" }, ++ { BCMA_CORE_CHIPCOMMON_B, "Chipcommon B" }, ++ { BCMA_CORE_ARMCA9, "ARM Cortex A9 core (ihost)" }, + { BCMA_CORE_AMEMC, "AMEMC (DDR)" }, + { BCMA_CORE_ALTA, "ALTA (I2S)" }, + { BCMA_CORE_INVALID, "Invalid" }, +@@ -84,6 +96,8 @@ static const struct bcma_device_id_name { BCMA_CORE_I2S, "I2S" }, { BCMA_CORE_SDR_DDR1_MEM_CTL, "SDR/DDR1 Memory Controller" }, { BCMA_CORE_SHIM, "SHIM" }, @@ -1089,7 +1149,7 @@ { BCMA_CORE_DEFAULT, "Default" }, }; -@@ -137,19 +139,19 @@ static void bcma_scan_switch_core(struct +@@ -137,19 +151,19 @@ static void bcma_scan_switch_core(struct addr); } @@ -1112,7 +1172,7 @@ { u32 ent = bcma_erom_get_ent(bus, eromptr); if (!(ent & SCAN_ER_VALID)) -@@ -159,14 +161,14 @@ static s32 bcma_erom_get_ci(struct bcma_ +@@ -159,14 +173,14 @@ static s32 bcma_erom_get_ci(struct bcma_ return ent; } @@ -1129,7 +1189,7 @@ { u32 ent = bcma_erom_get_ent(bus, eromptr); bcma_erom_push_ent(eromptr); -@@ -175,7 +177,7 @@ static bool bcma_erom_is_bridge(struct b +@@ -175,7 +189,7 @@ static bool bcma_erom_is_bridge(struct b ((ent & SCAN_ADDR_TYPE) == SCAN_ADDR_TYPE_BRIDGE)); } @@ -1138,7 +1198,7 @@ { u32 ent; while (1) { -@@ -189,7 +191,7 @@ static void bcma_erom_skip_component(str +@@ -189,7 +203,7 @@ static void bcma_erom_skip_component(str bcma_erom_push_ent(eromptr); } @@ -1147,15 +1207,80 @@ { u32 ent = bcma_erom_get_ent(bus, eromptr); if (!(ent & SCAN_ER_VALID)) -@@ -199,7 +201,7 @@ static s32 bcma_erom_get_mst_port(struct +@@ -199,7 +213,7 @@ static s32 bcma_erom_get_mst_port(struct return ent; } -static s32 bcma_erom_get_addr_desc(struct bcma_bus *bus, u32 **eromptr, -+static s32 bcma_erom_get_addr_desc(struct bcma_bus *bus, u32 __iomem **eromptr, ++static u32 bcma_erom_get_addr_desc(struct bcma_bus *bus, u32 __iomem **eromptr, u32 type, u8 port) { u32 addrl, addrh, sizel, sizeh = 0; +@@ -211,7 +225,7 @@ static s32 bcma_erom_get_addr_desc(struc + ((ent & SCAN_ADDR_TYPE) != type) || + (((ent & SCAN_ADDR_PORT) >> SCAN_ADDR_PORT_SHIFT) != port)) { + bcma_erom_push_ent(eromptr); +- return -EINVAL; ++ return (u32)-EINVAL; + } + + addrl = ent & SCAN_ADDR_ADDR; +@@ -255,11 +269,13 @@ static struct bcma_device *bcma_find_cor + return NULL; + } + ++#define IS_ERR_VALUE_U32(x) ((x) >= (u32)-MAX_ERRNO) ++ + static int bcma_get_next_core(struct bcma_bus *bus, u32 __iomem **eromptr, + struct bcma_device_id *match, int core_num, + struct bcma_device *core) + { +- s32 tmp; ++ u32 tmp; + u8 i, j; + s32 cia, cib; + u8 ports[2], wrappers[2]; +@@ -337,11 +353,11 @@ static int bcma_get_next_core(struct bcm + * the main register space for the core + */ + tmp = bcma_erom_get_addr_desc(bus, eromptr, SCAN_ADDR_TYPE_SLAVE, 0); +- if (tmp <= 0) { ++ if (tmp == 0 || IS_ERR_VALUE_U32(tmp)) { + /* Try again to see if it is a bridge */ + tmp = bcma_erom_get_addr_desc(bus, eromptr, + SCAN_ADDR_TYPE_BRIDGE, 0); +- if (tmp <= 0) { ++ if (tmp == 0 || IS_ERR_VALUE_U32(tmp)) { + return -EILSEQ; + } else { + bcma_info(bus, "Bridge found\n"); +@@ -355,7 +371,7 @@ static int bcma_get_next_core(struct bcm + for (j = 0; ; j++) { + tmp = bcma_erom_get_addr_desc(bus, eromptr, + SCAN_ADDR_TYPE_SLAVE, i); +- if (tmp < 0) { ++ if (IS_ERR_VALUE_U32(tmp)) { + /* no more entries for port _i_ */ + /* pr_debug("erom: slave port %d " + * "has %d descriptors\n", i, j); */ +@@ -372,7 +388,7 @@ static int bcma_get_next_core(struct bcm + for (j = 0; ; j++) { + tmp = bcma_erom_get_addr_desc(bus, eromptr, + SCAN_ADDR_TYPE_MWRAP, i); +- if (tmp < 0) { ++ if (IS_ERR_VALUE_U32(tmp)) { + /* no more entries for port _i_ */ + /* pr_debug("erom: master wrapper %d " + * "has %d descriptors\n", i, j); */ +@@ -390,7 +406,7 @@ static int bcma_get_next_core(struct bcm + for (j = 0; ; j++) { + tmp = bcma_erom_get_addr_desc(bus, eromptr, + SCAN_ADDR_TYPE_SWRAP, i + hack); +- if (tmp < 0) { ++ if (IS_ERR_VALUE_U32(tmp)) { + /* no more entries for port _i_ */ + /* pr_debug("erom: master wrapper %d " + * has %d descriptors\n", i, j); */ --- a/drivers/bcma/sprom.c +++ b/drivers/bcma/sprom.c @@ -72,12 +72,12 @@ fail: @@ -1331,7 +1456,27 @@ } --- a/include/linux/bcma/bcma.h +++ b/include/linux/bcma/bcma.h -@@ -134,12 +134,17 @@ struct bcma_host_ops { +@@ -72,7 +72,19 @@ struct bcma_host_ops { + /* Core-ID values. */ + #define BCMA_CORE_OOB_ROUTER 0x367 /* Out of band */ + #define BCMA_CORE_4706_CHIPCOMMON 0x500 ++#define BCMA_CORE_PCIEG2 0x501 ++#define BCMA_CORE_DMA 0x502 ++#define BCMA_CORE_SDIO3 0x503 ++#define BCMA_CORE_USB20 0x504 ++#define BCMA_CORE_USB30 0x505 ++#define BCMA_CORE_A9JTAG 0x506 ++#define BCMA_CORE_DDR23 0x507 ++#define BCMA_CORE_ROM 0x508 ++#define BCMA_CORE_NAND 0x509 ++#define BCMA_CORE_QSPI 0x50A ++#define BCMA_CORE_CHIPCOMMON_B 0x50B + #define BCMA_CORE_4706_SOC_RAM 0x50E ++#define BCMA_CORE_ARMCA9 0x510 + #define BCMA_CORE_4706_MAC_GBIT 0x52D + #define BCMA_CORE_AMEMC 0x52E /* DDR1/2 memory controller core */ + #define BCMA_CORE_ALTA 0x534 /* I2S core */ +@@ -134,12 +146,17 @@ struct bcma_host_ops { #define BCMA_CORE_I2S 0x834 #define BCMA_CORE_SDR_DDR1_MEM_CTL 0x835 /* SDR/DDR1 memory controller core */ #define BCMA_CORE_SHIM 0x837 /* SHIM component in ubus/6362 */ @@ -1349,10 +1494,16 @@ #define BCMA_CHIP_ID_BCM43224 43224 #define BCMA_PKG_ID_BCM43224_FAB_CSM 0x8 #define BCMA_PKG_ID_BCM43224_FAB_SMIC 0xa -@@ -173,6 +178,60 @@ struct bcma_host_ops { +@@ -172,6 +189,65 @@ struct bcma_host_ops { + #define BCMA_PKG_ID_BCM5357 11 #define BCMA_CHIP_ID_BCM53572 53572 #define BCMA_PKG_ID_BCM47188 9 - ++#define BCMA_CHIP_ID_BCM4707 53010 ++#define BCMA_PKG_ID_BCM4707 1 ++#define BCMA_PKG_ID_BCM4708 2 ++#define BCMA_PKG_ID_BCM4709 0 ++#define BCMA_CHIP_ID_BCM53018 53018 ++ +/* Board types (on PCI usually equals to the subsystem dev id) */ +/* BCM4313 */ +#define BCMA_BOARD_TYPE_BCM94313BU 0X050F @@ -1406,10 +1557,9 @@ +#define BCMA_BOARD_TYPE_BCM953572SDRNR2 0X0590 +/* BCM43142 */ +#define BCMA_BOARD_TYPE_BCM943142HM 0X05E0 -+ + struct bcma_device { struct bcma_bus *bus; - struct bcma_device_id id; --- a/include/linux/bcma/bcma_driver_chipcommon.h +++ b/include/linux/bcma/bcma_driver_chipcommon.h @@ -27,7 +27,7 @@ @@ -1585,15 +1735,50 @@ #endif /* LINUX_BCMA_DRIVER_MIPS_H_ */ --- a/include/linux/bcma/bcma_driver_pci.h +++ b/include/linux/bcma/bcma_driver_pci.h -@@ -179,6 +179,8 @@ struct pci_dev; +@@ -179,10 +179,33 @@ struct pci_dev; #define BCMA_CORE_PCI_CFG_FUN_MASK 7 /* Function mask */ #define BCMA_CORE_PCI_CFG_OFF_MASK 0xfff /* Register mask */ +#define BCMA_CORE_PCI_CFG_DEVCTRL 0xd8 + ++#define BCMA_CORE_PCI_ ++ ++/* MDIO devices (SERDES modules) */ ++#define BCMA_CORE_PCI_MDIO_IEEE0 0x000 ++#define BCMA_CORE_PCI_MDIO_IEEE1 0x001 ++#define BCMA_CORE_PCI_MDIO_BLK0 0x800 ++#define BCMA_CORE_PCI_MDIO_BLK1 0x801 ++#define BCMA_CORE_PCI_MDIO_BLK1_MGMT0 0x16 ++#define BCMA_CORE_PCI_MDIO_BLK1_MGMT1 0x17 ++#define BCMA_CORE_PCI_MDIO_BLK1_MGMT2 0x18 ++#define BCMA_CORE_PCI_MDIO_BLK1_MGMT3 0x19 ++#define BCMA_CORE_PCI_MDIO_BLK1_MGMT4 0x1A ++#define BCMA_CORE_PCI_MDIO_BLK2 0x802 ++#define BCMA_CORE_PCI_MDIO_BLK3 0x803 ++#define BCMA_CORE_PCI_MDIO_BLK4 0x804 ++#define BCMA_CORE_PCI_MDIO_TXPLL 0x808 /* TXPLL register block idx */ ++#define BCMA_CORE_PCI_MDIO_TXCTRL0 0x820 ++#define BCMA_CORE_PCI_MDIO_SERDESID 0x831 ++#define BCMA_CORE_PCI_MDIO_RXCTRL0 0x840 ++ /* PCIE Root Capability Register bits (Host mode only) */ #define BCMA_CORE_PCI_RC_CRS_VISIBILITY 0x0001 + struct bcma_drv_pci; ++struct bcma_bus; + + #ifdef CONFIG_BCMA_DRIVER_PCI_HOSTMODE + struct bcma_drv_pci_host { +@@ -217,7 +240,8 @@ struct bcma_drv_pci { + extern void bcma_core_pci_init(struct bcma_drv_pci *pc); + extern int bcma_core_pci_irq_ctl(struct bcma_drv_pci *pc, + struct bcma_device *core, bool enable); +-extern void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend); ++extern void bcma_core_pci_up(struct bcma_bus *bus); ++extern void bcma_core_pci_down(struct bcma_bus *bus); + + extern int bcma_core_pci_pcibios_map_irq(const struct pci_dev *dev); + extern int bcma_core_pci_plat_dev_init(struct pci_dev *dev); --- a/include/linux/bcma/bcma_regs.h +++ b/include/linux/bcma/bcma_regs.h @@ -37,6 +37,7 @@ @@ -1604,3 +1789,193 @@ /* BCMA PCI config space registers. */ #define BCMA_PCI_PMCSR 0x44 +--- a/drivers/bcma/driver_pci.c ++++ b/drivers/bcma/driver_pci.c +@@ -31,7 +31,7 @@ static void bcma_pcie_write(struct bcma_ + pcicore_write32(pc, BCMA_CORE_PCI_PCIEIND_DATA, data); + } + +-static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u8 phy) ++static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u16 phy) + { + u32 v; + int i; +@@ -55,7 +55,7 @@ static void bcma_pcie_mdio_set_phy(struc + } + } + +-static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u8 device, u8 address) ++static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u16 device, u8 address) + { + int max_retries = 10; + u16 ret = 0; +@@ -98,7 +98,7 @@ static u16 bcma_pcie_mdio_read(struct bc + return ret; + } + +-static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u8 device, ++static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u16 device, + u8 address, u16 data) + { + int max_retries = 10; +@@ -137,6 +137,13 @@ static void bcma_pcie_mdio_write(struct + pcicore_write32(pc, BCMA_CORE_PCI_MDIO_CONTROL, 0); + } + ++static u16 bcma_pcie_mdio_writeread(struct bcma_drv_pci *pc, u16 device, ++ u8 address, u16 data) ++{ ++ bcma_pcie_mdio_write(pc, device, address, data); ++ return bcma_pcie_mdio_read(pc, device, address); ++} ++ + /************************************************** + * Workarounds. + **************************************************/ +@@ -203,6 +210,25 @@ static void bcma_core_pci_config_fixup(s + } + } + ++static void bcma_core_pci_power_save(struct bcma_drv_pci *pc, bool up) ++{ ++ u16 data; ++ ++ if (pc->core->id.rev >= 15 && pc->core->id.rev <= 20) { ++ data = up ? 0x74 : 0x7C; ++ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1, ++ BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7F64); ++ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1, ++ BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data); ++ } else if (pc->core->id.rev >= 21 && pc->core->id.rev <= 22) { ++ data = up ? 0x75 : 0x7D; ++ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1, ++ BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7E65); ++ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1, ++ BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data); ++ } ++} ++ + /************************************************** + * Init. + **************************************************/ +@@ -262,7 +288,7 @@ out: + } + EXPORT_SYMBOL_GPL(bcma_core_pci_irq_ctl); + +-void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend) ++static void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend) + { + u32 w; + +@@ -274,4 +300,33 @@ void bcma_core_pci_extend_L1timer(struct + bcma_pcie_write(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG, w); + bcma_pcie_read(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG); + } +-EXPORT_SYMBOL_GPL(bcma_core_pci_extend_L1timer); ++ ++void bcma_core_pci_up(struct bcma_bus *bus) ++{ ++ struct bcma_drv_pci *pc; ++ ++ if (bus->hosttype != BCMA_HOSTTYPE_PCI) ++ return; ++ ++ pc = &bus->drv_pci[0]; ++ ++ bcma_core_pci_power_save(pc, true); ++ ++ bcma_core_pci_extend_L1timer(pc, true); ++} ++EXPORT_SYMBOL_GPL(bcma_core_pci_up); ++ ++void bcma_core_pci_down(struct bcma_bus *bus) ++{ ++ struct bcma_drv_pci *pc; ++ ++ if (bus->hosttype != BCMA_HOSTTYPE_PCI) ++ return; ++ ++ pc = &bus->drv_pci[0]; ++ ++ bcma_core_pci_extend_L1timer(pc, false); ++ ++ bcma_core_pci_power_save(pc, false); ++} ++EXPORT_SYMBOL_GPL(bcma_core_pci_down); +--- a/drivers/net/wireless/brcm80211/brcmsmac/aiutils.c ++++ b/drivers/net/wireless/brcm80211/brcmsmac/aiutils.c +@@ -685,27 +685,6 @@ bool ai_clkctl_cc(struct si_pub *sih, en + return mode == BCMA_CLKMODE_FAST; + } + +-void ai_pci_up(struct si_pub *sih) +-{ +- struct si_info *sii; +- +- sii = container_of(sih, struct si_info, pub); +- +- if (sii->icbus->hosttype == BCMA_HOSTTYPE_PCI) +- bcma_core_pci_extend_L1timer(&sii->icbus->drv_pci[0], true); +-} +- +-/* Unconfigure and/or apply various WARs when going down */ +-void ai_pci_down(struct si_pub *sih) +-{ +- struct si_info *sii; +- +- sii = container_of(sih, struct si_info, pub); +- +- if (sii->icbus->hosttype == BCMA_HOSTTYPE_PCI) +- bcma_core_pci_extend_L1timer(&sii->icbus->drv_pci[0], false); +-} +- + /* Enable BT-COEX & Ex-PA for 4313 */ + void ai_epa_4313war(struct si_pub *sih) + { +--- a/drivers/net/wireless/brcm80211/brcmsmac/aiutils.h ++++ b/drivers/net/wireless/brcm80211/brcmsmac/aiutils.h +@@ -183,9 +183,6 @@ extern u16 ai_clkctl_fast_pwrup_delay(st + extern bool ai_clkctl_cc(struct si_pub *sih, enum bcma_clkmode mode); + extern bool ai_deviceremoved(struct si_pub *sih); + +-extern void ai_pci_down(struct si_pub *sih); +-extern void ai_pci_up(struct si_pub *sih); +- + /* Enable Ex-PA for 4313 */ + extern void ai_epa_4313war(struct si_pub *sih); + +--- a/drivers/net/wireless/brcm80211/brcmsmac/main.c ++++ b/drivers/net/wireless/brcm80211/brcmsmac/main.c +@@ -4648,7 +4648,7 @@ static int brcms_b_attach(struct brcms_c + brcms_c_coredisable(wlc_hw); + + /* Match driver "down" state */ +- ai_pci_down(wlc_hw->sih); ++ bcma_core_pci_down(wlc_hw->d11core->bus); + + /* turn off pll and xtal to match driver "down" state */ + brcms_b_xtal(wlc_hw, OFF); +@@ -4991,12 +4991,12 @@ static int brcms_b_up_prep(struct brcms_ + */ + if (brcms_b_radio_read_hwdisabled(wlc_hw)) { + /* put SB PCI in down state again */ +- ai_pci_down(wlc_hw->sih); ++ bcma_core_pci_down(wlc_hw->d11core->bus); + brcms_b_xtal(wlc_hw, OFF); + return -ENOMEDIUM; + } + +- ai_pci_up(wlc_hw->sih); ++ bcma_core_pci_up(wlc_hw->d11core->bus); + + /* reset the d11 core */ + brcms_b_corereset(wlc_hw, BRCMS_USE_COREFLAGS); +@@ -5193,7 +5193,7 @@ static int brcms_b_down_finish(struct br + + /* turn off primary xtal and pll */ + if (!wlc_hw->noreset) { +- ai_pci_down(wlc_hw->sih); ++ bcma_core_pci_down(wlc_hw->d11core->bus); + brcms_b_xtal(wlc_hw, OFF); + } + } diff --git a/target/linux/generic/patches-3.8/026-bcma_pcie_up_down.patch b/target/linux/generic/patches-3.8/026-bcma_pcie_up_down.patch deleted file mode 100644 index 4dbf685b94..0000000000 --- a/target/linux/generic/patches-3.8/026-bcma_pcie_up_down.patch +++ /dev/null @@ -1,167 +0,0 @@ -bcma patch adding bcma_core_pci_up() and bcma_core_pci_down(), this gets -called by b43 and brcmsmac - -Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> - ---- a/drivers/bcma/driver_pci.c -+++ b/drivers/bcma/driver_pci.c -@@ -31,7 +31,7 @@ static void bcma_pcie_write(struct bcma_ - pcicore_write32(pc, BCMA_CORE_PCI_PCIEIND_DATA, data); - } - --static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u8 phy) -+static void bcma_pcie_mdio_set_phy(struct bcma_drv_pci *pc, u16 phy) - { - u32 v; - int i; -@@ -55,7 +55,7 @@ static void bcma_pcie_mdio_set_phy(struc - } - } - --static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u8 device, u8 address) -+static u16 bcma_pcie_mdio_read(struct bcma_drv_pci *pc, u16 device, u8 address) - { - int max_retries = 10; - u16 ret = 0; -@@ -98,7 +98,7 @@ static u16 bcma_pcie_mdio_read(struct bc - return ret; - } - --static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u8 device, -+static void bcma_pcie_mdio_write(struct bcma_drv_pci *pc, u16 device, - u8 address, u16 data) - { - int max_retries = 10; -@@ -137,6 +137,13 @@ static void bcma_pcie_mdio_write(struct - pcicore_write32(pc, BCMA_CORE_PCI_MDIO_CONTROL, 0); - } - -+static u16 bcma_pcie_mdio_writeread(struct bcma_drv_pci *pc, u16 device, -+ u8 address, u16 data) -+{ -+ bcma_pcie_mdio_write(pc, device, address, data); -+ return bcma_pcie_mdio_read(pc, device, address); -+} -+ - /************************************************** - * Workarounds. - **************************************************/ -@@ -203,6 +210,25 @@ static void bcma_core_pci_config_fixup(s - } - } - -+static void bcma_core_pci_power_save(struct bcma_drv_pci *pc, bool up) -+{ -+ u16 data; -+ -+ if (pc->core->id.rev >= 15 && pc->core->id.rev <= 20) { -+ data = up ? 0x74 : 0x7C; -+ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1, -+ BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7F64); -+ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1, -+ BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data); -+ } else if (pc->core->id.rev >= 21 && pc->core->id.rev <= 22) { -+ data = up ? 0x75 : 0x7D; -+ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1, -+ BCMA_CORE_PCI_MDIO_BLK1_MGMT1, 0x7E65); -+ bcma_pcie_mdio_writeread(pc, BCMA_CORE_PCI_MDIO_BLK1, -+ BCMA_CORE_PCI_MDIO_BLK1_MGMT3, data); -+ } -+} -+ - /************************************************** - * Init. - **************************************************/ -@@ -262,7 +288,7 @@ out: - } - EXPORT_SYMBOL_GPL(bcma_core_pci_irq_ctl); - --void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend) -+static void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend) - { - u32 w; - -@@ -274,4 +300,38 @@ void bcma_core_pci_extend_L1timer(struct - bcma_pcie_write(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG, w); - bcma_pcie_read(pc, BCMA_CORE_PCI_DLLP_PMTHRESHREG); - } --EXPORT_SYMBOL_GPL(bcma_core_pci_extend_L1timer); -+ -+void bcma_core_pci_up(struct bcma_bus *bus) -+{ -+ struct bcma_drv_pci *pc; -+ -+ if (bus->hosttype != BCMA_HOSTTYPE_PCI) -+ return; -+ -+ pc = &bus->drv_pci[0]; -+ -+ bcma_core_pci_power_save(pc, true); -+ -+ bcma_core_pci_extend_L1timer(pc, true); -+ -+ if ((pc->core->id.rev == 18 || pc->core->id.rev == 19) && -+ bus->boardinfo.vendor != PCI_VENDOR_ID_APPLE) { -+ pcie_set_readrq(bus->host_pci, 128); -+ } -+} -+EXPORT_SYMBOL_GPL(bcma_core_pci_up); -+ -+void bcma_core_pci_down(struct bcma_bus *bus) -+{ -+ struct bcma_drv_pci *pc; -+ -+ if (bus->hosttype != BCMA_HOSTTYPE_PCI) -+ return; -+ -+ pc = &bus->drv_pci[0]; -+ -+ bcma_core_pci_extend_L1timer(pc, false); -+ -+ bcma_core_pci_power_save(pc, false); -+} -+EXPORT_SYMBOL_GPL(bcma_core_pci_down); ---- a/include/linux/bcma/bcma_driver_pci.h -+++ b/include/linux/bcma/bcma_driver_pci.h -@@ -181,10 +181,31 @@ struct pci_dev; - - #define BCMA_CORE_PCI_CFG_DEVCTRL 0xd8 - -+#define BCMA_CORE_PCI_ -+ -+/* MDIO devices (SERDES modules) */ -+#define BCMA_CORE_PCI_MDIO_IEEE0 0x000 -+#define BCMA_CORE_PCI_MDIO_IEEE1 0x001 -+#define BCMA_CORE_PCI_MDIO_BLK0 0x800 -+#define BCMA_CORE_PCI_MDIO_BLK1 0x801 -+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT0 0x16 -+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT1 0x17 -+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT2 0x18 -+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT3 0x19 -+#define BCMA_CORE_PCI_MDIO_BLK1_MGMT4 0x1A -+#define BCMA_CORE_PCI_MDIO_BLK2 0x802 -+#define BCMA_CORE_PCI_MDIO_BLK3 0x803 -+#define BCMA_CORE_PCI_MDIO_BLK4 0x804 -+#define BCMA_CORE_PCI_MDIO_TXPLL 0x808 /* TXPLL register block idx */ -+#define BCMA_CORE_PCI_MDIO_TXCTRL0 0x820 -+#define BCMA_CORE_PCI_MDIO_SERDESID 0x831 -+#define BCMA_CORE_PCI_MDIO_RXCTRL0 0x840 -+ - /* PCIE Root Capability Register bits (Host mode only) */ - #define BCMA_CORE_PCI_RC_CRS_VISIBILITY 0x0001 - - struct bcma_drv_pci; -+struct bcma_bus; - - #ifdef CONFIG_BCMA_DRIVER_PCI_HOSTMODE - struct bcma_drv_pci_host { -@@ -219,7 +240,8 @@ struct bcma_drv_pci { - extern void bcma_core_pci_init(struct bcma_drv_pci *pc); - extern int bcma_core_pci_irq_ctl(struct bcma_drv_pci *pc, - struct bcma_device *core, bool enable); --extern void bcma_core_pci_extend_L1timer(struct bcma_drv_pci *pc, bool extend); -+extern void bcma_core_pci_up(struct bcma_bus *bus); -+extern void bcma_core_pci_down(struct bcma_bus *bus); - - extern int bcma_core_pci_pcibios_map_irq(const struct pci_dev *dev); - extern int bcma_core_pci_plat_dev_init(struct pci_dev *dev); |