diff options
Diffstat (limited to 'target/linux/generic/patches-2.6.39/020-ssb_update.patch')
| -rw-r--r-- | target/linux/generic/patches-2.6.39/020-ssb_update.patch | 409 |
1 files changed, 372 insertions, 37 deletions
diff --git a/target/linux/generic/patches-2.6.39/020-ssb_update.patch b/target/linux/generic/patches-2.6.39/020-ssb_update.patch index f566288375..be7071b93f 100644 --- a/target/linux/generic/patches-2.6.39/020-ssb_update.patch +++ b/target/linux/generic/patches-2.6.39/020-ssb_update.patch @@ -1,5 +1,14 @@ --- a/drivers/ssb/driver_chipcommon.c +++ b/drivers/ssb/driver_chipcommon.c +@@ -3,7 +3,7 @@ + * Broadcom ChipCommon core driver + * + * Copyright 2005, Broadcom Corporation +- * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de> ++ * Copyright 2006, 2007, Michael Buesch <m@bues.ch> + * + * Licensed under the GNU/GPL. See COPYING for details. + */ @@ -46,40 +46,66 @@ void ssb_chipco_set_clockmode(struct ssb if (!ccdev) return; @@ -100,6 +109,15 @@ ssb_chipco_set_clockmode(cc, SSB_CLKMODE_FAST); --- a/drivers/ssb/driver_chipcommon_pmu.c +++ b/drivers/ssb/driver_chipcommon_pmu.c +@@ -2,7 +2,7 @@ + * Sonics Silicon Backplane + * Broadcom ChipCommon Power Management Unit driver + * +- * Copyright 2009, Michael Buesch <mb@bu3sch.de> ++ * Copyright 2009, Michael Buesch <m@bues.ch> + * Copyright 2007, Broadcom Corporation + * + * Licensed under the GNU/GPL. See COPYING for details. @@ -417,12 +417,14 @@ static void ssb_pmu_resources_init(struc u32 min_msk = 0, max_msk = 0; unsigned int i; @@ -119,6 +137,15 @@ * min_msk = 0xCBB --- a/drivers/ssb/driver_gige.c +++ b/drivers/ssb/driver_gige.c +@@ -3,7 +3,7 @@ + * Broadcom Gigabit Ethernet core driver + * + * Copyright 2008, Broadcom Corporation +- * Copyright 2008, Michael Buesch <mb@bu3sch.de> ++ * Copyright 2008, Michael Buesch <m@bues.ch> + * + * Licensed under the GNU/GPL. See COPYING for details. + */ @@ -106,8 +106,9 @@ void gige_pcicfg_write32(struct ssb_gige gige_write32(dev, SSB_GIGE_PCICFG + offset, value); } @@ -155,6 +182,15 @@ u32 base, tmslow, tmshigh; --- a/drivers/ssb/driver_pcicore.c +++ b/drivers/ssb/driver_pcicore.c +@@ -3,7 +3,7 @@ + * Broadcom PCI-core driver + * + * Copyright 2005, Broadcom Corporation +- * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de> ++ * Copyright 2006, 2007, Michael Buesch <m@bues.ch> + * + * Licensed under the GNU/GPL. See COPYING for details. + */ @@ -15,6 +15,11 @@ #include "ssb_private.h" @@ -185,7 +221,7 @@ { struct ssb_bus *bus = pc->dev->bus; u16 chipid_top; -@@ -403,25 +408,133 @@ static int pcicore_is_in_hostmode(struct +@@ -403,25 +408,137 @@ static int pcicore_is_in_hostmode(struct } #endif /* CONFIG_SSB_PCICORE_HOSTMODE */ @@ -298,10 +334,15 @@ -static void ssb_pcicore_init_clientmode(struct ssb_pcicore *pc) +static void __devinit ssb_pcicore_init_clientmode(struct ssb_pcicore *pc) { -+ ssb_pcicore_fix_sprom_core_index(pc); ++ struct ssb_device *pdev = pc->dev; ++ struct ssb_bus *bus = pdev->bus; ++ ++ if (bus->bustype == SSB_BUSTYPE_PCI) ++ ssb_pcicore_fix_sprom_core_index(pc); + /* Disable PCI interrupts. */ - ssb_write32(pc->dev, SSB_INTVEC, 0); +- ssb_write32(pc->dev, SSB_INTVEC, 0); ++ ssb_write32(pdev, SSB_INTVEC, 0); + + /* Additional PCIe always once-executed workarounds */ + if (pc->dev->id.coreid == SSB_DEV_PCIE) { @@ -323,7 +364,7 @@ if (!ssb_device_is_enabled(dev)) ssb_device_enable(dev, 0); -@@ -446,11 +559,35 @@ static void ssb_pcie_write(struct ssb_pc +@@ -446,11 +563,35 @@ static void ssb_pcie_write(struct ssb_pc pcicore_write32(pc, 0x134, data); } @@ -361,7 +402,7 @@ u32 v; int i; -@@ -458,46 +595,68 @@ static void ssb_pcie_mdio_write(struct s +@@ -458,46 +599,68 @@ static void ssb_pcie_mdio_write(struct s v |= 0x2; /* MDIO Clock Divisor */ pcicore_write32(pc, mdio_control, v); @@ -453,7 +494,7 @@ } int ssb_pcicore_dev_irqvecs_enable(struct ssb_pcicore *pc, -@@ -550,48 +709,10 @@ int ssb_pcicore_dev_irqvecs_enable(struc +@@ -550,48 +713,10 @@ int ssb_pcicore_dev_irqvecs_enable(struc if (pc->setup_done) goto out; if (pdev->id.coreid == SSB_DEV_PCI) { @@ -506,7 +547,24 @@ out: --- a/drivers/ssb/main.c +++ b/drivers/ssb/main.c -@@ -557,7 +557,7 @@ error: +@@ -3,7 +3,7 @@ + * Subsystem core + * + * Copyright 2005, Broadcom Corporation +- * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de> ++ * Copyright 2006, 2007, Michael Buesch <m@bues.ch> + * + * Licensed under the GNU/GPL. See COPYING for details. + */ +@@ -12,6 +12,7 @@ + + #include <linux/delay.h> + #include <linux/io.h> ++#include <linux/module.h> + #include <linux/ssb/ssb.h> + #include <linux/ssb/ssb_regs.h> + #include <linux/ssb/ssb_driver_gige.h> +@@ -557,7 +558,7 @@ error: } /* Needs ssb_buses_lock() */ @@ -515,7 +573,7 @@ { struct ssb_bus *bus, *n; int err = 0; -@@ -768,9 +768,9 @@ out: +@@ -768,9 +769,9 @@ out: return err; } @@ -528,7 +586,7 @@ { int err; -@@ -851,8 +851,8 @@ err_disable_xtal: +@@ -851,8 +852,8 @@ err_disable_xtal: } #ifdef CONFIG_SSB_PCIHOST @@ -539,7 +597,7 @@ { int err; -@@ -875,9 +875,9 @@ EXPORT_SYMBOL(ssb_bus_pcibus_register); +@@ -875,9 +876,9 @@ EXPORT_SYMBOL(ssb_bus_pcibus_register); #endif /* CONFIG_SSB_PCIHOST */ #ifdef CONFIG_SSB_PCMCIAHOST @@ -552,7 +610,7 @@ { int err; -@@ -897,8 +897,9 @@ EXPORT_SYMBOL(ssb_bus_pcmciabus_register +@@ -897,8 +898,9 @@ EXPORT_SYMBOL(ssb_bus_pcmciabus_register #endif /* CONFIG_SSB_PCMCIAHOST */ #ifdef CONFIG_SSB_SDIOHOST @@ -564,7 +622,7 @@ { int err; -@@ -918,9 +919,9 @@ int ssb_bus_sdiobus_register(struct ssb_ +@@ -918,9 +920,9 @@ int ssb_bus_sdiobus_register(struct ssb_ EXPORT_SYMBOL(ssb_bus_sdiobus_register); #endif /* CONFIG_SSB_PCMCIAHOST */ @@ -577,7 +635,7 @@ { int err; -@@ -1001,8 +1002,8 @@ u32 ssb_calc_clock_rate(u32 plltype, u32 +@@ -1001,8 +1003,8 @@ u32 ssb_calc_clock_rate(u32 plltype, u32 switch (plltype) { case SSB_PLLTYPE_6: /* 100/200 or 120/240 only */ if (m & SSB_CHIPCO_CLK_T6_MMASK) @@ -588,7 +646,7 @@ case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */ case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */ case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */ -@@ -1117,23 +1118,22 @@ static u32 ssb_tmslow_reject_bitmask(str +@@ -1117,23 +1119,22 @@ static u32 ssb_tmslow_reject_bitmask(str { u32 rev = ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_SSBREV; @@ -619,19 +677,43 @@ } int ssb_device_is_enabled(struct ssb_device *dev) -@@ -1266,7 +1266,10 @@ u32 ssb_dma_translation(struct ssb_devic +@@ -1260,13 +1261,34 @@ void ssb_device_disable(struct ssb_devic + } + EXPORT_SYMBOL(ssb_device_disable); + ++/* Some chipsets need routing known for PCIe and 64-bit DMA */ ++static bool ssb_dma_translation_special_bit(struct ssb_device *dev) ++{ ++ u16 chip_id = dev->bus->chip_id; ++ ++ if (dev->id.coreid == SSB_DEV_80211) { ++ return (chip_id == 0x4322 || chip_id == 43221 || ++ chip_id == 43231 || chip_id == 43222); ++ } ++ ++ return 0; ++} ++ + u32 ssb_dma_translation(struct ssb_device *dev) + { + switch (dev->bus->bustype) { case SSB_BUSTYPE_SSB: return 0; case SSB_BUSTYPE_PCI: - return SSB_PCI_DMA; -+ if (ssb_read32(dev, SSB_TMSHIGH) & SSB_TMSHIGH_DMA64) ++ if (pci_is_pcie(dev->bus->host_pci) && ++ ssb_read32(dev, SSB_TMSHIGH) & SSB_TMSHIGH_DMA64) { + return SSB_PCIE_DMA_H32; -+ else -+ return SSB_PCI_DMA; ++ } else { ++ if (ssb_dma_translation_special_bit(dev)) ++ return SSB_PCIE_DMA_H32; ++ else ++ return SSB_PCI_DMA; ++ } default: __ssb_dma_not_implemented(dev); } -@@ -1309,20 +1312,20 @@ EXPORT_SYMBOL(ssb_bus_may_powerdown); +@@ -1309,20 +1331,20 @@ EXPORT_SYMBOL(ssb_bus_may_powerdown); int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl) { @@ -656,7 +738,7 @@ return 0; error: ssb_printk(KERN_ERR PFX "Bus powerup failed\n"); -@@ -1330,6 +1333,37 @@ error: +@@ -1330,6 +1352,37 @@ error: } EXPORT_SYMBOL(ssb_bus_powerup); @@ -696,7 +778,46 @@ u32 base = 0; --- a/drivers/ssb/pci.c +++ b/drivers/ssb/pci.c -@@ -662,7 +662,6 @@ static int sprom_extract(struct ssb_bus +@@ -1,7 +1,7 @@ + /* + * Sonics Silicon Backplane PCI-Hostbus related functions. + * +- * Copyright (C) 2005-2006 Michael Buesch <mb@bu3sch.de> ++ * Copyright (C) 2005-2006 Michael Buesch <m@bues.ch> + * Copyright (C) 2005 Martin Langer <martin-langer@gmx.de> + * Copyright (C) 2005 Stefano Brivio <st3@riseup.net> + * Copyright (C) 2005 Danny van Dyk <kugelfang@gentoo.org> +@@ -607,6 +607,29 @@ static void sprom_extract_r8(struct ssb_ + memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24, + sizeof(out->antenna_gain.ghz5)); + ++ /* Extract FEM info */ ++ SPEX(fem.ghz2.tssipos, SSB_SPROM8_FEM2G, ++ SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT); ++ SPEX(fem.ghz2.extpa_gain, SSB_SPROM8_FEM2G, ++ SSB_SROM8_FEM_EXTPA_GAIN, SSB_SROM8_FEM_EXTPA_GAIN_SHIFT); ++ SPEX(fem.ghz2.pdet_range, SSB_SPROM8_FEM2G, ++ SSB_SROM8_FEM_PDET_RANGE, SSB_SROM8_FEM_PDET_RANGE_SHIFT); ++ SPEX(fem.ghz2.tr_iso, SSB_SPROM8_FEM2G, ++ SSB_SROM8_FEM_TR_ISO, SSB_SROM8_FEM_TR_ISO_SHIFT); ++ SPEX(fem.ghz2.antswlut, SSB_SPROM8_FEM2G, ++ SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT); ++ ++ SPEX(fem.ghz5.tssipos, SSB_SPROM8_FEM5G, ++ SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT); ++ SPEX(fem.ghz5.extpa_gain, SSB_SPROM8_FEM5G, ++ SSB_SROM8_FEM_EXTPA_GAIN, SSB_SROM8_FEM_EXTPA_GAIN_SHIFT); ++ SPEX(fem.ghz5.pdet_range, SSB_SPROM8_FEM5G, ++ SSB_SROM8_FEM_PDET_RANGE, SSB_SROM8_FEM_PDET_RANGE_SHIFT); ++ SPEX(fem.ghz5.tr_iso, SSB_SPROM8_FEM5G, ++ SSB_SROM8_FEM_TR_ISO, SSB_SROM8_FEM_TR_ISO_SHIFT); ++ SPEX(fem.ghz5.antswlut, SSB_SPROM8_FEM5G, ++ SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT); ++ + sprom_extract_r458(out, in); + + /* TODO - get remaining rev 8 stuff needed */ +@@ -662,7 +685,6 @@ static int sprom_extract(struct ssb_bus static int ssb_pci_sprom_get(struct ssb_bus *bus, struct ssb_sprom *sprom) { @@ -704,7 +825,7 @@ int err; u16 *buf; -@@ -707,10 +706,17 @@ static int ssb_pci_sprom_get(struct ssb_ +@@ -707,10 +729,17 @@ static int ssb_pci_sprom_get(struct ssb_ if (err) { /* All CRC attempts failed. * Maybe there is no SPROM on the device? @@ -726,7 +847,7 @@ err = 0; goto out_free; } -@@ -728,12 +734,9 @@ out_free: +@@ -728,12 +757,9 @@ out_free: static void ssb_pci_get_boardinfo(struct ssb_bus *bus, struct ssb_boardinfo *bi) { @@ -744,6 +865,15 @@ int ssb_pci_get_invariants(struct ssb_bus *bus, --- a/drivers/ssb/pcihost_wrapper.c +++ b/drivers/ssb/pcihost_wrapper.c +@@ -6,7 +6,7 @@ + * Copyright (c) 2005 Stefano Brivio <st3@riseup.net> + * Copyright (c) 2005 Danny van Dyk <kugelfang@gentoo.org> + * Copyright (c) 2005 Andreas Jaggi <andreas.jaggi@waterwave.ch> +- * Copyright (c) 2005-2007 Michael Buesch <mbuesch@freenet.de> ++ * Copyright (c) 2005-2007 Michael Buesch <m@bues.ch> + * + * Licensed under the GNU/GPL. See COPYING for details. + */ @@ -53,8 +53,8 @@ static int ssb_pcihost_resume(struct pci # define ssb_pcihost_resume NULL #endif /* CONFIG_PM */ @@ -766,6 +896,15 @@ driver->remove = ssb_pcihost_remove; --- a/drivers/ssb/scan.c +++ b/drivers/ssb/scan.c +@@ -2,7 +2,7 @@ + * Sonics Silicon Backplane + * Bus scanning + * +- * Copyright (C) 2005-2007 Michael Buesch <mb@bu3sch.de> ++ * Copyright (C) 2005-2007 Michael Buesch <m@bues.ch> + * Copyright (C) 2005 Martin Langer <martin-langer@gmx.de> + * Copyright (C) 2005 Stefano Brivio <st3@riseup.net> + * Copyright (C) 2005 Danny van Dyk <kugelfang@gentoo.org> @@ -258,7 +258,10 @@ static int we_support_multiple_80211_cor #ifdef CONFIG_SSB_PCIHOST if (bus->bustype == SSB_BUSTYPE_PCI) { @@ -790,6 +929,15 @@ bus->chip_id = 0x4710; --- a/drivers/ssb/sprom.c +++ b/drivers/ssb/sprom.c +@@ -2,7 +2,7 @@ + * Sonics Silicon Backplane + * Common SPROM support routines + * +- * Copyright (C) 2005-2008 Michael Buesch <mb@bu3sch.de> ++ * Copyright (C) 2005-2008 Michael Buesch <m@bues.ch> + * Copyright (C) 2005 Martin Langer <martin-langer@gmx.de> + * Copyright (C) 2005 Stefano Brivio <st3@riseup.net> + * Copyright (C) 2005 Danny van Dyk <kugelfang@gentoo.org> @@ -17,7 +17,7 @@ #include <linux/slab.h> @@ -817,21 +965,23 @@ + * callback handler which fills the SPROM data structure. The fallback is + * only used for PCI based SSB devices, where no valid SPROM can be found + * in the shadow registers. - * -- * This function is useful for weird architectures that have a half-assed SSB device -- * hardwired to their PCI bus. ++ * + * This function is useful for weird architectures that have a half-assed + * SSB device hardwired to their PCI bus. - * -- * Note that it does only work with PCI attached SSB devices. PCMCIA devices currently -- * don't use this fallback. -- * Architectures must provide the SPROM for native SSB devices anyway, -- * so the fallback also isn't used for native devices. ++ * + * Note that it does only work with PCI attached SSB devices. PCMCIA + * devices currently don't use this fallback. + * Architectures must provide the SPROM for native SSB devices anyway, so + * the fallback also isn't used for native devices. * +- * This function is useful for weird architectures that have a half-assed SSB device +- * hardwired to their PCI bus. +- * +- * Note that it does only work with PCI attached SSB devices. PCMCIA devices currently +- * don't use this fallback. +- * Architectures must provide the SPROM for native SSB devices anyway, +- * so the fallback also isn't used for native devices. +- * - * This function is available for architecture code, only. So it is not exported. + * This function is available for architecture code, only. So it is not + * exported. @@ -874,16 +1024,35 @@ /* core.c */ --- a/include/linux/ssb/ssb.h +++ b/include/linux/ssb/ssb.h -@@ -27,6 +27,8 @@ struct ssb_sprom { +@@ -25,8 +25,10 @@ struct ssb_sprom { + u8 et1phyaddr; /* MII address for enet1 */ + u8 et0mdcport; /* MDIO for enet0 */ u8 et1mdcport; /* MDIO for enet1 */ - u8 board_rev; /* Board revision number from SPROM. */ +- u8 board_rev; /* Board revision number from SPROM. */ ++ u16 board_rev; /* Board revision number from SPROM. */ u8 country_code; /* Country Code */ + u16 leddc_on_time; /* LED Powersave Duty Cycle On Count */ + u16 leddc_off_time; /* LED Powersave Duty Cycle Off Count */ u8 ant_available_a; /* 2GHz antenna available bits (up to 4) */ u8 ant_available_bg; /* 5GHz antenna available bits (up to 4) */ u16 pa0b0; -@@ -99,7 +101,7 @@ struct ssb_sprom { +@@ -92,6 +94,15 @@ struct ssb_sprom { + } ghz5; /* 5GHz band */ + } antenna_gain; + ++ struct { ++ struct { ++ u8 tssipos, extpa_gain, pdet_range, tr_iso, antswlut; ++ } ghz2; ++ struct { ++ u8 tssipos, extpa_gain, pdet_range, tr_iso, antswlut; ++ } ghz5; ++ } fem; ++ + /* TODO - add any parameters needed from rev 2, 3, 4, 5 or 8 SPROMs */ + }; + +@@ -99,7 +110,7 @@ struct ssb_sprom { struct ssb_boardinfo { u16 vendor; u16 type; @@ -892,7 +1061,21 @@ }; -@@ -308,7 +310,7 @@ struct ssb_bus { +@@ -229,10 +240,9 @@ struct ssb_driver { + #define drv_to_ssb_drv(_drv) container_of(_drv, struct ssb_driver, drv) + + extern int __ssb_driver_register(struct ssb_driver *drv, struct module *owner); +-static inline int ssb_driver_register(struct ssb_driver *drv) +-{ +- return __ssb_driver_register(drv, THIS_MODULE); +-} ++#define ssb_driver_register(drv) \ ++ __ssb_driver_register(drv, THIS_MODULE) ++ + extern void ssb_driver_unregister(struct ssb_driver *drv); + + +@@ -308,7 +318,7 @@ struct ssb_bus { /* ID information about the Chip. */ u16 chip_id; @@ -901,7 +1084,7 @@ u16 sprom_offset; u16 sprom_size; /* number of words in sprom */ u8 chip_package; -@@ -404,7 +406,9 @@ extern bool ssb_is_sprom_available(struc +@@ -404,7 +414,9 @@ extern bool ssb_is_sprom_available(struc /* Set a fallback SPROM. * See kdoc at the function definition for complete documentation. */ @@ -912,7 +1095,7 @@ /* Suspend a SSB bus. * Call this from the parent bus suspend routine. */ -@@ -518,6 +522,7 @@ extern int ssb_bus_may_powerdown(struct +@@ -518,6 +530,7 @@ extern int ssb_bus_may_powerdown(struct * Otherwise static always-on powercontrol will be used. */ extern int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl); @@ -922,6 +1105,15 @@ extern u32 ssb_admatch_base(u32 adm); --- a/include/linux/ssb/ssb_driver_chipcommon.h +++ b/include/linux/ssb/ssb_driver_chipcommon.h +@@ -8,7 +8,7 @@ + * gpio interface, extbus, and support for serial and parallel flashes. + * + * Copyright 2005, Broadcom Corporation +- * Copyright 2006, Michael Buesch <mb@bu3sch.de> ++ * Copyright 2006, Michael Buesch <m@bues.ch> + * + * Licensed under the GPL version 2. See COPYING for details. + */ @@ -123,6 +123,8 @@ #define SSB_CHIPCO_FLASHDATA 0x0048 #define SSB_CHIPCO_BCAST_ADDR 0x0050 @@ -965,3 +1157,146 @@ #define SSB_TMSLOW_REJECT_23 0x00000004 /* Reject (Backplane rev 2.3) */ #define SSB_TMSLOW_CLOCK 0x00010000 /* Clock Enable */ #define SSB_TMSLOW_FGC 0x00020000 /* Force Gated Clocks On */ +@@ -432,6 +432,23 @@ + #define SSB_SPROM8_RXPO2G 0x00FF /* 2GHz RX power offset */ + #define SSB_SPROM8_RXPO5G 0xFF00 /* 5GHz RX power offset */ + #define SSB_SPROM8_RXPO5G_SHIFT 8 ++#define SSB_SPROM8_FEM2G 0x00AE ++#define SSB_SPROM8_FEM5G 0x00B0 ++#define SSB_SROM8_FEM_TSSIPOS 0x0001 ++#define SSB_SROM8_FEM_TSSIPOS_SHIFT 0 ++#define SSB_SROM8_FEM_EXTPA_GAIN 0x0006 ++#define SSB_SROM8_FEM_EXTPA_GAIN_SHIFT 1 ++#define SSB_SROM8_FEM_PDET_RANGE 0x00F8 ++#define SSB_SROM8_FEM_PDET_RANGE_SHIFT 3 ++#define SSB_SROM8_FEM_TR_ISO 0x0700 ++#define SSB_SROM8_FEM_TR_ISO_SHIFT 8 ++#define SSB_SROM8_FEM_ANTSWLUT 0xF800 ++#define SSB_SROM8_FEM_ANTSWLUT_SHIFT 11 ++#define SSB_SPROM8_THERMAL 0x00B2 ++#define SSB_SPROM8_MPWR_RAWTS 0x00B4 ++#define SSB_SPROM8_TS_SLP_OPT_CORRX 0x00B6 ++#define SSB_SPROM8_FOC_HWIQ_IQSWP 0x00B8 ++#define SSB_SPROM8_PHYCAL_TEMPDELTA 0x00BA + #define SSB_SPROM8_MAXP_BG 0x00C0 /* Max Power 2GHz in path 1 */ + #define SSB_SPROM8_MAXP_BG_MASK 0x00FF /* Mask for Max Power 2GHz */ + #define SSB_SPROM8_ITSSI_BG 0xFF00 /* Mask for path 1 itssi_bg */ +@@ -462,6 +479,46 @@ + #define SSB_SPROM8_OFDM5GLPO 0x014A /* 5.2GHz OFDM power offset */ + #define SSB_SPROM8_OFDM5GHPO 0x014E /* 5.8GHz OFDM power offset */ + ++/* Values for boardflags_lo read from SPROM */ ++#define SSB_BFL_BTCOEXIST 0x0001 /* implements Bluetooth coexistance */ ++#define SSB_BFL_PACTRL 0x0002 /* GPIO 9 controlling the PA */ ++#define SSB_BFL_AIRLINEMODE 0x0004 /* implements GPIO 13 radio disable indication */ ++#define SSB_BFL_RSSI 0x0008 /* software calculates nrssi slope. */ ++#define SSB_BFL_ENETSPI 0x0010 /* has ephy roboswitch spi */ ++#define SSB_BFL_XTAL_NOSLOW 0x0020 /* no slow clock available */ ++#define SSB_BFL_CCKHIPWR 0x0040 /* can do high power CCK transmission */ ++#define SSB_BFL_ENETADM 0x0080 /* has ADMtek switch */ ++#define SSB_BFL_ENETVLAN 0x0100 /* can do vlan */ ++#define SSB_BFL_AFTERBURNER 0x0200 /* supports Afterburner mode */ ++#define SSB_BFL_NOPCI 0x0400 /* board leaves PCI floating */ ++#define SSB_BFL_FEM 0x0800 /* supports the Front End Module */ ++#define SSB_BFL_EXTLNA 0x1000 /* has an external LNA */ ++#define SSB_BFL_HGPA 0x2000 /* had high gain PA */ ++#define SSB_BFL_BTCMOD 0x4000 /* BFL_BTCOEXIST is given in alternate GPIOs */ ++#define SSB_BFL_ALTIQ 0x8000 /* alternate I/Q settings */ ++ ++/* Values for boardflags_hi read from SPROM */ ++#define SSB_BFH_NOPA 0x0001 /* has no PA */ ++#define SSB_BFH_RSSIINV 0x0002 /* RSSI uses positive slope (not TSSI) */ ++#define SSB_BFH_PAREF 0x0004 /* uses the PARef LDO */ ++#define SSB_BFH_3TSWITCH 0x0008 /* uses a triple throw switch shared with bluetooth */ ++#define SSB_BFH_PHASESHIFT 0x0010 /* can support phase shifter */ ++#define SSB_BFH_BUCKBOOST 0x0020 /* has buck/booster */ ++#define SSB_BFH_FEM_BT 0x0040 /* has FEM and switch to share antenna with bluetooth */ ++ ++/* Values for boardflags2_lo read from SPROM */ ++#define SSB_BFL2_RXBB_INT_REG_DIS 0x0001 /* external RX BB regulator present */ ++#define SSB_BFL2_APLL_WAR 0x0002 /* alternative A-band PLL settings implemented */ ++#define SSB_BFL2_TXPWRCTRL_EN 0x0004 /* permits enabling TX Power Control */ ++#define SSB_BFL2_2X4_DIV 0x0008 /* 2x4 diversity switch */ ++#define SSB_BFL2_5G_PWRGAIN 0x0010 /* supports 5G band power gain */ ++#define SSB_BFL2_PCIEWAR_OVR 0x0020 /* overrides ASPM and Clkreq settings */ ++#define SSB_BFL2_CAESERS_BRD 0x0040 /* is Caesers board (unused) */ ++#define SSB_BFL2_BTC3WIRE 0x0080 /* used 3-wire bluetooth coexist */ ++#define SSB_BFL2_SKWRKFEM_BRD 0x0100 /* 4321mcm93 uses Skyworks FEM */ ++#define SSB_BFL2_SPUR_WAR 0x0200 /* has a workaround for clock-harmonic spurs */ ++#define SSB_BFL2_GPLL_WAR 0x0400 /* altenative G-band PLL settings implemented */ ++ + /* Values for SSB_SPROM1_BINF_CCODE */ + enum { + SSB_SPROM1CCODE_WORLD = 0, +--- a/drivers/ssb/b43_pci_bridge.c ++++ b/drivers/ssb/b43_pci_bridge.c +@@ -5,12 +5,13 @@ + * because of its small size we include it in the SSB core + * instead of creating a standalone module. + * +- * Copyright 2007 Michael Buesch <mb@bu3sch.de> ++ * Copyright 2007 Michael Buesch <m@bues.ch> + * + * Licensed under the GNU/GPL. See COPYING for details. + */ + + #include <linux/pci.h> ++#include <linux/module.h> + #include <linux/ssb/ssb.h> + + #include "ssb_private.h" +--- a/drivers/ssb/driver_extif.c ++++ b/drivers/ssb/driver_extif.c +@@ -3,7 +3,7 @@ + * Broadcom EXTIF core driver + * + * Copyright 2005, Broadcom Corporation +- * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de> ++ * Copyright 2006, 2007, Michael Buesch <m@bues.ch> + * Copyright 2006, 2007, Felix Fietkau <nbd@openwrt.org> + * Copyright 2007, Aurelien Jarno <aurelien@aurel32.net> + * +--- a/drivers/ssb/driver_mipscore.c ++++ b/drivers/ssb/driver_mipscore.c +@@ -3,7 +3,7 @@ + * Broadcom MIPS core driver + * + * Copyright 2005, Broadcom Corporation +- * Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de> ++ * Copyright 2006, 2007, Michael Buesch <m@bues.ch> + * + * Licensed under the GNU/GPL. See COPYING for details. + */ +--- a/drivers/ssb/embedded.c ++++ b/drivers/ssb/embedded.c +@@ -3,7 +3,7 @@ + * Embedded systems support code + * + * Copyright 2005-2008, Broadcom Corporation +- * Copyright 2006-2008, Michael Buesch <mb@bu3sch.de> ++ * Copyright 2006-2008, Michael Buesch <m@bues.ch> + * + * Licensed under the GNU/GPL. See COPYING for details. + */ +--- a/drivers/ssb/pcmcia.c ++++ b/drivers/ssb/pcmcia.c +@@ -3,7 +3,7 @@ + * PCMCIA-Hostbus related functions + * + * Copyright 2006 Johannes Berg <johannes@sipsolutions.net> +- * Copyright 2007-2008 Michael Buesch <mb@bu3sch.de> ++ * Copyright 2007-2008 Michael Buesch <m@bues.ch> + * + * Licensed under the GNU/GPL. See COPYING for details. + */ +--- a/drivers/ssb/sdio.c ++++ b/drivers/ssb/sdio.c +@@ -6,7 +6,7 @@ + * + * Based on drivers/ssb/pcmcia.c + * Copyright 2006 Johannes Berg <johannes@sipsolutions.net> +- * Copyright 2007-2008 Michael Buesch <mb@bu3sch.de> ++ * Copyright 2007-2008 Michael Buesch <m@bues.ch> + * + * Licensed under the GNU/GPL. See COPYING for details. + * |