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Diffstat (limited to 'target/linux/generic/files/drivers/net')
-rw-r--r--target/linux/generic/files/drivers/net/phy/ar8216.c23
-rw-r--r--target/linux/generic/files/drivers/net/phy/ar8216.h2
2 files changed, 24 insertions, 1 deletions
diff --git a/target/linux/generic/files/drivers/net/phy/ar8216.c b/target/linux/generic/files/drivers/net/phy/ar8216.c
index 97ce04720c..698d92dd7d 100644
--- a/target/linux/generic/files/drivers/net/phy/ar8216.c
+++ b/target/linux/generic/files/drivers/net/phy/ar8216.c
@@ -733,6 +733,8 @@ static int
ar8327_hw_init(struct ar8216_priv *priv)
{
struct ar8327_platform_data *pdata;
+ struct ar8327_led_cfg *led_cfg;
+ u32 pos, new_pos;
u32 t;
int i;
@@ -747,7 +749,26 @@ ar8327_hw_init(struct ar8216_priv *priv)
t = ar8327_get_pad_cfg(pdata->pad6_cfg);
priv->write(priv, AR8327_REG_PAD6_MODE, t);
- priv->write(priv, AR8327_REG_POWER_ON_STRIP, 0x40000000);
+ pos = priv->read(priv, AR8327_REG_POWER_ON_STRIP);
+ new_pos = pos;
+
+ led_cfg = pdata->led_cfg;
+ if (led_cfg) {
+ if (led_cfg->open_drain)
+ new_pos |= AR8327_POWER_ON_STRIP_LED_OPEN_EN;
+ else
+ new_pos &= ~AR8327_POWER_ON_STRIP_LED_OPEN_EN;
+
+ priv->write(priv, AR8327_REG_LED_CTRL0, led_cfg->led_ctrl0);
+ priv->write(priv, AR8327_REG_LED_CTRL1, led_cfg->led_ctrl1);
+ priv->write(priv, AR8327_REG_LED_CTRL2, led_cfg->led_ctrl2);
+ priv->write(priv, AR8327_REG_LED_CTRL3, led_cfg->led_ctrl3);
+ }
+
+ if (new_pos != pos) {
+ new_pos |= AR8327_POWER_ON_STRIP_POWER_ON_SEL;
+ priv->write(priv, AR8327_REG_POWER_ON_STRIP, new_pos);
+ }
for (i = 0; i < AR8327_NUM_PHYS; i++)
ar8327_phy_fixup(priv, i);
diff --git a/target/linux/generic/files/drivers/net/phy/ar8216.h b/target/linux/generic/files/drivers/net/phy/ar8216.h
index c9b5e9f579..8948c52054 100644
--- a/target/linux/generic/files/drivers/net/phy/ar8216.h
+++ b/target/linux/generic/files/drivers/net/phy/ar8216.h
@@ -198,6 +198,8 @@
#define AR8327_PAD_RGMII_EN BIT(26)
#define AR8327_REG_POWER_ON_STRIP 0x010
+#define AR8327_POWER_ON_STRIP_POWER_ON_SEL BIT(31)
+#define AR8327_POWER_ON_STRIP_LED_OPEN_EN BIT(24)
#define AR8327_REG_INT_STATUS0 0x020
#define AR8327_INT0_VT_DONE BIT(20)