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-rw-r--r--target/linux/ar71xx/patches-3.2/001-MIPS-ath79-Change-number-of-available-IRQs.patch32
1 files changed, 32 insertions, 0 deletions
diff --git a/target/linux/ar71xx/patches-3.2/001-MIPS-ath79-Change-number-of-available-IRQs.patch b/target/linux/ar71xx/patches-3.2/001-MIPS-ath79-Change-number-of-available-IRQs.patch
new file mode 100644
index 0000000000..1313eea8fd
--- /dev/null
+++ b/target/linux/ar71xx/patches-3.2/001-MIPS-ath79-Change-number-of-available-IRQs.patch
@@ -0,0 +1,32 @@
+From 781c5ae32a2e8aede2e1756dfbea1abb3cf09ffc Mon Sep 17 00:00:00 2001
+From: Gabor Juhos <juhosg@openwrt.org>
+Date: Sun, 5 Jun 2011 23:38:44 +0200
+Subject: [PATCH 01/27] MIPS: ath79: Change number of available IRQs
+
+The status register of the miscellaneous interrupt controller is 32 bits
+wide, but the actual value of NR_IRQS covers only 8 of them. Change
+NR_IRQS in order to make all of those interrupt lines usable.
+
+Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
+Cc: linux-mips@linux-mips.org
+Patchwork: https://patchwork.linux-mips.org/patch/2441/
+Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
+---
+ arch/mips/include/asm/mach-ath79/irq.h | 4 ++--
+ 1 files changed, 2 insertions(+), 2 deletions(-)
+
+--- a/arch/mips/include/asm/mach-ath79/irq.h
++++ b/arch/mips/include/asm/mach-ath79/irq.h
+@@ -10,10 +10,10 @@
+ #define __ASM_MACH_ATH79_IRQ_H
+
+ #define MIPS_CPU_IRQ_BASE 0
+-#define NR_IRQS 16
++#define NR_IRQS 40
+
+ #define ATH79_MISC_IRQ_BASE 8
+-#define ATH79_MISC_IRQ_COUNT 8
++#define ATH79_MISC_IRQ_COUNT 32
+
+ #define ATH79_CPU_IRQ_IP2 (MIPS_CPU_IRQ_BASE + 2)
+ #define ATH79_CPU_IRQ_USB (MIPS_CPU_IRQ_BASE + 3)