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Diffstat (limited to 'package/mac80211/patches/572-ath9k_cleanup_eeprom_code.patch')
-rw-r--r--package/mac80211/patches/572-ath9k_cleanup_eeprom_code.patch274
1 files changed, 0 insertions, 274 deletions
diff --git a/package/mac80211/patches/572-ath9k_cleanup_eeprom_code.patch b/package/mac80211/patches/572-ath9k_cleanup_eeprom_code.patch
deleted file mode 100644
index 91ac531f27..0000000000
--- a/package/mac80211/patches/572-ath9k_cleanup_eeprom_code.patch
+++ /dev/null
@@ -1,274 +0,0 @@
---- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
-+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
-@@ -2971,14 +2971,6 @@ static u32 ath9k_hw_ar9300_get_eeprom(st
- return (pBase->txrxMask >> 4) & 0xf;
- case EEP_RX_MASK:
- return pBase->txrxMask & 0xf;
-- case EEP_DRIVE_STRENGTH:
--#define AR9300_EEP_BASE_DRIV_STRENGTH 0x1
-- return pBase->miscConfiguration & AR9300_EEP_BASE_DRIV_STRENGTH;
-- case EEP_INTERNAL_REGULATOR:
-- /* Bit 4 is internal regulator flag */
-- return (pBase->featureEnable & 0x10) >> 4;
-- case EEP_SWREG:
-- return le32_to_cpu(pBase->swreg);
- case EEP_PAPRD:
- return !!(pBase->featureEnable & BIT(5));
- case EEP_CHAIN_MASK_REDUCE:
-@@ -2989,8 +2981,6 @@ static u32 ath9k_hw_ar9300_get_eeprom(st
- return eep->modalHeader5G.antennaGain;
- case EEP_ANTENNA_GAIN_2G:
- return eep->modalHeader2G.antennaGain;
-- case EEP_QUICK_DROP:
-- return pBase->miscConfiguration & BIT(1);
- default:
- return 0;
- }
-@@ -3503,19 +3493,20 @@ static int ath9k_hw_ar9300_get_eeprom_re
- return 0;
- }
-
--static s32 ar9003_hw_xpa_bias_level_get(struct ath_hw *ah, bool is2ghz)
-+static struct ar9300_modal_eep_header *ar9003_modal_header(struct ath_hw *ah,
-+ bool is2ghz)
- {
- struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
-
- if (is2ghz)
-- return eep->modalHeader2G.xpaBiasLvl;
-+ return &eep->modalHeader2G;
- else
-- return eep->modalHeader5G.xpaBiasLvl;
-+ return &eep->modalHeader5G;
- }
-
- static void ar9003_hw_xpa_bias_level_apply(struct ath_hw *ah, bool is2ghz)
- {
-- int bias = ar9003_hw_xpa_bias_level_get(ah, is2ghz);
-+ int bias = ar9003_modal_header(ah, is2ghz)->xpaBiasLvl;
-
- if (AR_SREV_9485(ah) || AR_SREV_9330(ah) || AR_SREV_9340(ah))
- REG_RMW_FIELD(ah, AR_CH0_TOP2, AR_CH0_TOP2_XPABIASLVL, bias);
-@@ -3531,57 +3522,26 @@ static void ar9003_hw_xpa_bias_level_app
- }
- }
-
--static u16 ar9003_switch_com_spdt_get(struct ath_hw *ah, bool is_2ghz)
-+static u16 ar9003_switch_com_spdt_get(struct ath_hw *ah, bool is2ghz)
- {
-- struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
-- __le16 val;
--
-- if (is_2ghz)
-- val = eep->modalHeader2G.switchcomspdt;
-- else
-- val = eep->modalHeader5G.switchcomspdt;
-- return le16_to_cpu(val);
-+ return le16_to_cpu(ar9003_modal_header(ah, is2ghz)->switchcomspdt);
- }
-
-
- static u32 ar9003_hw_ant_ctrl_common_get(struct ath_hw *ah, bool is2ghz)
- {
-- struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
-- __le32 val;
--
-- if (is2ghz)
-- val = eep->modalHeader2G.antCtrlCommon;
-- else
-- val = eep->modalHeader5G.antCtrlCommon;
-- return le32_to_cpu(val);
-+ return le32_to_cpu(ar9003_modal_header(ah, is2ghz)->antCtrlCommon);
- }
-
- static u32 ar9003_hw_ant_ctrl_common_2_get(struct ath_hw *ah, bool is2ghz)
- {
-- struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
-- __le32 val;
--
-- if (is2ghz)
-- val = eep->modalHeader2G.antCtrlCommon2;
-- else
-- val = eep->modalHeader5G.antCtrlCommon2;
-- return le32_to_cpu(val);
-+ return le32_to_cpu(ar9003_modal_header(ah, is2ghz)->antCtrlCommon2);
- }
-
--static u16 ar9003_hw_ant_ctrl_chain_get(struct ath_hw *ah,
-- int chain,
-+static u16 ar9003_hw_ant_ctrl_chain_get(struct ath_hw *ah, int chain,
- bool is2ghz)
- {
-- struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
-- __le16 val = 0;
--
-- if (chain >= 0 && chain < AR9300_MAX_CHAINS) {
-- if (is2ghz)
-- val = eep->modalHeader2G.antCtrlChain[chain];
-- else
-- val = eep->modalHeader5G.antCtrlChain[chain];
-- }
--
-+ __le16 val = ar9003_modal_header(ah, is2ghz)->antCtrlChain[chain];
- return le16_to_cpu(val);
- }
-
-@@ -3691,11 +3651,12 @@ static void ar9003_hw_ant_ctrl_apply(str
-
- static void ar9003_hw_drive_strength_apply(struct ath_hw *ah)
- {
-+ struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
-+ struct ar9300_base_eep_hdr *pBase = &eep->baseEepHeader;
- int drive_strength;
- unsigned long reg;
-
-- drive_strength = ath9k_hw_ar9300_get_eeprom(ah, EEP_DRIVE_STRENGTH);
--
-+ drive_strength = pBase->miscConfiguration & BIT(0);
- if (!drive_strength)
- return;
-
-@@ -3825,11 +3786,11 @@ static bool is_pmu_set(struct ath_hw *ah
-
- void ar9003_hw_internal_regulator_apply(struct ath_hw *ah)
- {
-- int internal_regulator =
-- ath9k_hw_ar9300_get_eeprom(ah, EEP_INTERNAL_REGULATOR);
-+ struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
-+ struct ar9300_base_eep_hdr *pBase = &eep->baseEepHeader;
- u32 reg_val;
-
-- if (internal_regulator) {
-+ if (pBase->featureEnable & BIT(4)) {
- if (AR_SREV_9330(ah) || AR_SREV_9485(ah)) {
- int reg_pmu_set;
-
-@@ -3873,11 +3834,11 @@ void ar9003_hw_internal_regulator_apply(
- if (!is_pmu_set(ah, AR_PHY_PMU2, reg_pmu_set))
- return;
- } else if (AR_SREV_9462(ah)) {
-- reg_val = ath9k_hw_ar9300_get_eeprom(ah, EEP_SWREG);
-+ reg_val = le32_to_cpu(pBase->swreg);
- REG_WRITE(ah, AR_PHY_PMU1, reg_val);
- } else {
- /* Internal regulator is ON. Write swreg register. */
-- reg_val = ath9k_hw_ar9300_get_eeprom(ah, EEP_SWREG);
-+ reg_val = le32_to_cpu(pBase->swreg);
- REG_WRITE(ah, AR_RTC_REG_CONTROL1,
- REG_READ(ah, AR_RTC_REG_CONTROL1) &
- (~AR_RTC_REG_CONTROL1_SWREG_PROGRAM));
-@@ -3931,10 +3892,11 @@ static void ar9003_hw_apply_tuning_caps(
- static void ar9003_hw_quick_drop_apply(struct ath_hw *ah, u16 freq)
- {
- struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
-- int quick_drop = ath9k_hw_ar9300_get_eeprom(ah, EEP_QUICK_DROP);
-+ struct ar9300_base_eep_hdr *pBase = &eep->baseEepHeader;
-+ int quick_drop;
- s32 t[3], f[3] = {5180, 5500, 5785};
-
-- if (!quick_drop)
-+ if (!(pBase->miscConfiguration & BIT(1)))
- return;
-
- if (freq < 4000)
-@@ -3948,13 +3910,11 @@ static void ar9003_hw_quick_drop_apply(s
- REG_RMW_FIELD(ah, AR_PHY_AGC, AR_PHY_AGC_QUICK_DROP, quick_drop);
- }
-
--static void ar9003_hw_txend_to_xpa_off_apply(struct ath_hw *ah, u16 freq)
-+static void ar9003_hw_txend_to_xpa_off_apply(struct ath_hw *ah, bool is2ghz)
- {
-- struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
- u32 value;
-
-- value = (freq < 4000) ? eep->modalHeader2G.txEndToXpaOff :
-- eep->modalHeader5G.txEndToXpaOff;
-+ value = ar9003_modal_header(ah, is2ghz)->txEndToXpaOff;
-
- REG_RMW_FIELD(ah, AR_PHY_XPA_TIMING_CTL,
- AR_PHY_XPA_TIMING_CTL_TX_END_XPAB_OFF, value);
-@@ -3962,7 +3922,7 @@ static void ar9003_hw_txend_to_xpa_off_a
- AR_PHY_XPA_TIMING_CTL_TX_END_XPAA_OFF, value);
- }
-
--static void ar9003_hw_xpa_timing_control_apply(struct ath_hw *ah, bool is_2ghz)
-+static void ar9003_hw_xpa_timing_control_apply(struct ath_hw *ah, bool is2ghz)
- {
- struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
- u8 xpa_ctl;
-@@ -3973,23 +3933,22 @@ static void ar9003_hw_xpa_timing_control
- if (!AR_SREV_9300(ah) && !AR_SREV_9340(ah) && !AR_SREV_9580(ah))
- return;
-
-- if (is_2ghz) {
-- xpa_ctl = eep->modalHeader2G.txFrameToXpaOn;
-+ xpa_ctl = ar9003_modal_header(ah, is2ghz)->txFrameToXpaOn;
-+ if (is2ghz)
- REG_RMW_FIELD(ah, AR_PHY_XPA_TIMING_CTL,
- AR_PHY_XPA_TIMING_CTL_FRAME_XPAB_ON, xpa_ctl);
-- } else {
-- xpa_ctl = eep->modalHeader5G.txFrameToXpaOn;
-+ else
- REG_RMW_FIELD(ah, AR_PHY_XPA_TIMING_CTL,
- AR_PHY_XPA_TIMING_CTL_FRAME_XPAA_ON, xpa_ctl);
-- }
- }
-
- static void ath9k_hw_ar9300_set_board_values(struct ath_hw *ah,
- struct ath9k_channel *chan)
- {
-- ar9003_hw_xpa_timing_control_apply(ah, IS_CHAN_2GHZ(chan));
-- ar9003_hw_xpa_bias_level_apply(ah, IS_CHAN_2GHZ(chan));
-- ar9003_hw_ant_ctrl_apply(ah, IS_CHAN_2GHZ(chan));
-+ bool is2ghz = IS_CHAN_2GHZ(chan);
-+ ar9003_hw_xpa_timing_control_apply(ah, is2ghz);
-+ ar9003_hw_xpa_bias_level_apply(ah, is2ghz);
-+ ar9003_hw_ant_ctrl_apply(ah, is2ghz);
- ar9003_hw_drive_strength_apply(ah);
- ar9003_hw_atten_apply(ah, chan);
- ar9003_hw_quick_drop_apply(ah, chan->channel);
-@@ -3997,7 +3956,7 @@ static void ath9k_hw_ar9300_set_board_va
- ar9003_hw_internal_regulator_apply(ah);
- if (AR_SREV_9485(ah) || AR_SREV_9330(ah) || AR_SREV_9340(ah))
- ar9003_hw_apply_tuning_caps(ah);
-- ar9003_hw_txend_to_xpa_off_apply(ah, chan->channel);
-+ ar9003_hw_txend_to_xpa_off_apply(ah, is2ghz);
- }
-
- static void ath9k_hw_ar9300_set_addac(struct ath_hw *ah,
-@@ -5133,14 +5092,9 @@ s32 ar9003_hw_get_rx_gain_idx(struct ath
- return (eep->baseEepHeader.txrxgain) & 0xf; /* bits 3:0 */
- }
-
--u8 *ar9003_get_spur_chan_ptr(struct ath_hw *ah, bool is_2ghz)
-+u8 *ar9003_get_spur_chan_ptr(struct ath_hw *ah, bool is2ghz)
- {
-- struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
--
-- if (is_2ghz)
-- return eep->modalHeader2G.spurChans;
-- else
-- return eep->modalHeader5G.spurChans;
-+ return ar9003_modal_header(ah, is2ghz)->spurChans;
- }
-
- unsigned int ar9003_get_paprd_scale_factor(struct ath_hw *ah,
---- a/drivers/net/wireless/ath/ath9k/eeprom.h
-+++ b/drivers/net/wireless/ath/ath9k/eeprom.h
-@@ -241,16 +241,12 @@ enum eeprom_param {
- EEP_TEMPSENSE_SLOPE,
- EEP_TEMPSENSE_SLOPE_PAL_ON,
- EEP_PWR_TABLE_OFFSET,
-- EEP_DRIVE_STRENGTH,
-- EEP_INTERNAL_REGULATOR,
-- EEP_SWREG,
- EEP_PAPRD,
- EEP_MODAL_VER,
- EEP_ANT_DIV_CTL1,
- EEP_CHAIN_MASK_REDUCE,
- EEP_ANTENNA_GAIN_2G,
- EEP_ANTENNA_GAIN_5G,
-- EEP_QUICK_DROP
- };
-
- enum ar5416_rates {
generated by cgit v1.2.3 (git 2.46.0) at 2025-01-05 01:56:37 +0000