diff options
Diffstat (limited to 'package/mac80211/patches/550-ath9k_cleanup_regwrite_buffer.patch')
-rw-r--r-- | package/mac80211/patches/550-ath9k_cleanup_regwrite_buffer.patch | 410 |
1 files changed, 410 insertions, 0 deletions
diff --git a/package/mac80211/patches/550-ath9k_cleanup_regwrite_buffer.patch b/package/mac80211/patches/550-ath9k_cleanup_regwrite_buffer.patch new file mode 100644 index 0000000000..a0ef55562b --- /dev/null +++ b/package/mac80211/patches/550-ath9k_cleanup_regwrite_buffer.patch @@ -0,0 +1,410 @@ +--- a/drivers/net/wireless/ath/ath.h ++++ b/drivers/net/wireless/ath/ath.h +@@ -102,14 +102,12 @@ enum ath_cipher { + * @read: Register read + * @write: Register write + * @enable_write_buffer: Enable multiple register writes +- * @disable_write_buffer: Disable multiple register writes +- * @write_flush: Flush buffered register writes ++ * @write_flush: flush buffered register writes and disable buffering + */ + struct ath_ops { + unsigned int (*read)(void *, u32 reg_offset); + void (*write)(void *, u32 val, u32 reg_offset); + void (*enable_write_buffer)(void *); +- void (*disable_write_buffer)(void *); + void (*write_flush) (void *); + }; + +--- a/drivers/net/wireless/ath/ath9k/htc_drv_init.c ++++ b/drivers/net/wireless/ath/ath9k/htc_drv_init.c +@@ -380,15 +380,6 @@ static void ath9k_enable_regwrite_buffer + atomic_inc(&priv->wmi->mwrite_cnt); + } + +-static void ath9k_disable_regwrite_buffer(void *hw_priv) +-{ +- struct ath_hw *ah = (struct ath_hw *) hw_priv; +- struct ath_common *common = ath9k_hw_common(ah); +- struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) common->priv; +- +- atomic_dec(&priv->wmi->mwrite_cnt); +-} +- + static void ath9k_regwrite_flush(void *hw_priv) + { + struct ath_hw *ah = (struct ath_hw *) hw_priv; +@@ -397,6 +388,9 @@ static void ath9k_regwrite_flush(void *h + u32 rsp_status; + int r; + ++ if (!atomic_dec_and_test(&priv->wmi->mwrite_cnt)) ++ return; ++ + mutex_lock(&priv->wmi->multi_write_mutex); + + if (priv->wmi->multi_write_idx) { +@@ -420,7 +414,6 @@ static const struct ath_ops ath9k_common + .read = ath9k_regread, + .write = ath9k_regwrite, + .enable_write_buffer = ath9k_enable_regwrite_buffer, +- .disable_write_buffer = ath9k_disable_regwrite_buffer, + .write_flush = ath9k_regwrite_flush, + }; + +--- a/drivers/net/wireless/ath/ath9k/hw.h ++++ b/drivers/net/wireless/ath/ath9k/hw.h +@@ -70,19 +70,13 @@ + + #define ENABLE_REGWRITE_BUFFER(_ah) \ + do { \ +- if (AR_SREV_9271(_ah)) \ ++ if (ath9k_hw_common(_ah)->ops->enable_write_buffer) \ + ath9k_hw_common(_ah)->ops->enable_write_buffer((_ah)); \ + } while (0) + +-#define DISABLE_REGWRITE_BUFFER(_ah) \ +- do { \ +- if (AR_SREV_9271(_ah)) \ +- ath9k_hw_common(_ah)->ops->disable_write_buffer((_ah)); \ +- } while (0) +- + #define REGWRITE_BUFFER_FLUSH(_ah) \ + do { \ +- if (AR_SREV_9271(_ah)) \ ++ if (ath9k_hw_common(_ah)->ops->write_flush) \ + ath9k_hw_common(_ah)->ops->write_flush((_ah)); \ + } while (0) + +--- a/drivers/net/wireless/ath/ath9k/ani.c ++++ b/drivers/net/wireless/ath/ath9k/ani.c +@@ -180,7 +180,6 @@ static void ath9k_ani_restart_old(struct + REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING); + + REGWRITE_BUFFER_FLUSH(ah); +- DISABLE_REGWRITE_BUFFER(ah); + + ath9k_hw_update_mibstats(ah, &ah->ah_mibStats); + +@@ -215,7 +214,6 @@ static void ath9k_ani_restart_new(struct + REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING); + + REGWRITE_BUFFER_FLUSH(ah); +- DISABLE_REGWRITE_BUFFER(ah); + + ath9k_hw_update_mibstats(ah, &ah->ah_mibStats); + +@@ -643,7 +641,6 @@ static void ath9k_ani_reset_old(struct a + REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING); + + REGWRITE_BUFFER_FLUSH(ah); +- DISABLE_REGWRITE_BUFFER(ah); + } + + /* +@@ -737,7 +734,6 @@ static void ath9k_ani_reset_new(struct a + REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING); + + REGWRITE_BUFFER_FLUSH(ah); +- DISABLE_REGWRITE_BUFFER(ah); + } + + static void ath9k_hw_ani_monitor_old(struct ath_hw *ah, +@@ -991,7 +987,6 @@ void ath9k_enable_mib_counters(struct at + REG_WRITE(ah, AR_PHY_ERR_MASK_2, AR_PHY_ERR_CCK_TIMING); + + REGWRITE_BUFFER_FLUSH(ah); +- DISABLE_REGWRITE_BUFFER(ah); + } + + /* Freeze the MIB counters, get the stats and then clear them */ +@@ -1261,7 +1256,6 @@ void ath9k_hw_ani_init(struct ath_hw *ah + REG_WRITE(ah, AR_PHY_ERR_2, ah->ani[0].cckPhyErrBase); + + REGWRITE_BUFFER_FLUSH(ah); +- DISABLE_REGWRITE_BUFFER(ah); + + ath9k_enable_mib_counters(ah); + +--- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c ++++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c +@@ -615,14 +615,11 @@ static void ar5008_hw_init_chain_masks(s + rx_chainmask = ah->rxchainmask; + tx_chainmask = ah->txchainmask; + +- ENABLE_REGWRITE_BUFFER(ah); + + switch (rx_chainmask) { + case 0x5: +- DISABLE_REGWRITE_BUFFER(ah); + REG_SET_BIT(ah, AR_PHY_ANALOG_SWAP, + AR_PHY_SWAP_ALT_CHAIN); +- ENABLE_REGWRITE_BUFFER(ah); + case 0x3: + if (ah->hw_version.macVersion == AR_SREV_REVISION_5416_10) { + REG_WRITE(ah, AR_PHY_RX_CHAINMASK, 0x7); +@@ -632,17 +629,18 @@ static void ar5008_hw_init_chain_masks(s + case 0x1: + case 0x2: + case 0x7: ++ ENABLE_REGWRITE_BUFFER(ah); + REG_WRITE(ah, AR_PHY_RX_CHAINMASK, rx_chainmask); + REG_WRITE(ah, AR_PHY_CAL_CHAINMASK, rx_chainmask); + break; + default: ++ ENABLE_REGWRITE_BUFFER(ah); + break; + } + + REG_WRITE(ah, AR_SELFGEN_MASK, tx_chainmask); + + REGWRITE_BUFFER_FLUSH(ah); +- DISABLE_REGWRITE_BUFFER(ah); + + if (tx_chainmask == 0x5) { + REG_SET_BIT(ah, AR_PHY_ANALOG_SWAP, +@@ -728,7 +726,6 @@ static void ar5008_hw_set_channel_regs(s + REG_WRITE(ah, AR_CST, 0xF << AR_CST_TIMEOUT_LIMIT_S); + + REGWRITE_BUFFER_FLUSH(ah); +- DISABLE_REGWRITE_BUFFER(ah); + } + + +@@ -820,7 +817,6 @@ static int ar5008_hw_process_ini(struct + } + + REGWRITE_BUFFER_FLUSH(ah); +- DISABLE_REGWRITE_BUFFER(ah); + + if (AR_SREV_9280(ah) || AR_SREV_9287_11_OR_LATER(ah)) + REG_WRITE_ARRAY(&ah->iniModesRxGain, modesIndex, regWrites); +@@ -851,7 +847,6 @@ static int ar5008_hw_process_ini(struct + } + + REGWRITE_BUFFER_FLUSH(ah); +- DISABLE_REGWRITE_BUFFER(ah); + + if (AR_SREV_9271(ah)) { + if (ah->eep_ops->get_eeprom(ah, EEP_TXGAIN_TYPE) == 1) +--- a/drivers/net/wireless/ath/ath9k/ar9002_calib.c ++++ b/drivers/net/wireless/ath/ath9k/ar9002_calib.c +@@ -522,7 +522,6 @@ static void ar9271_hw_pa_cal(struct ath_ + REG_WRITE(ah, regList[i][0], regList[i][1]); + + REGWRITE_BUFFER_FLUSH(ah); +- DISABLE_REGWRITE_BUFFER(ah); + } + + static inline void ar9285_hw_pa_cal(struct ath_hw *ah, bool is_reset) +--- a/drivers/net/wireless/ath/ath9k/ar9002_hw.c ++++ b/drivers/net/wireless/ath/ath9k/ar9002_hw.c +@@ -371,7 +371,6 @@ static void ar9002_hw_configpcipowersave + REG_WRITE(ah, AR_PCIE_SERDES2, 0x00000000); + + REGWRITE_BUFFER_FLUSH(ah); +- DISABLE_REGWRITE_BUFFER(ah); + } + + udelay(1000); +@@ -468,7 +467,6 @@ static int ar9002_hw_get_radiorev(struct + REG_WRITE(ah, AR_PHY(0x20), 0x00010000); + + REGWRITE_BUFFER_FLUSH(ah); +- DISABLE_REGWRITE_BUFFER(ah); + + val = (REG_READ(ah, AR_PHY(256)) >> 24) & 0xff; + val = ((val & 0xf0) >> 4) | ((val & 0x0f) << 4); +@@ -627,6 +625,4 @@ void ar9002_hw_load_ani_reg(struct ath_h + } + + REGWRITE_BUFFER_FLUSH(ah); +- DISABLE_REGWRITE_BUFFER(ah); +- + } +--- a/drivers/net/wireless/ath/ath9k/ar9002_phy.c ++++ b/drivers/net/wireless/ath/ath9k/ar9002_phy.c +@@ -415,7 +415,6 @@ static void ar9002_hw_spur_mitigate(stru + REG_WRITE(ah, AR_PHY_MASK2_P_61_45, tmp_mask); + + REGWRITE_BUFFER_FLUSH(ah); +- DISABLE_REGWRITE_BUFFER(ah); + } + + static void ar9002_olc_init(struct ath_hw *ah) +--- a/drivers/net/wireless/ath/ath9k/calib.c ++++ b/drivers/net/wireless/ath/ath9k/calib.c +@@ -300,7 +300,6 @@ void ath9k_hw_loadnf(struct ath_hw *ah, + } + } + REGWRITE_BUFFER_FLUSH(ah); +- DISABLE_REGWRITE_BUFFER(ah); + } + + +--- a/drivers/net/wireless/ath/ath9k/eeprom_4k.c ++++ b/drivers/net/wireless/ath/ath9k/eeprom_4k.c +@@ -500,7 +500,6 @@ static void ath9k_hw_set_4k_power_cal_ta + } + + REGWRITE_BUFFER_FLUSH(ah); +- DISABLE_REGWRITE_BUFFER(ah); + } + } + +@@ -832,7 +831,6 @@ static void ath9k_hw_4k_set_txpower(stru + } + + REGWRITE_BUFFER_FLUSH(ah); +- DISABLE_REGWRITE_BUFFER(ah); + } + + static void ath9k_hw_4k_set_addac(struct ath_hw *ah, +--- a/drivers/net/wireless/ath/ath9k/hw.c ++++ b/drivers/net/wireless/ath/ath9k/hw.c +@@ -302,7 +302,6 @@ static void ath9k_hw_disablepcie(struct + REG_WRITE(ah, AR_PCIE_SERDES2, 0x00000000); + + REGWRITE_BUFFER_FLUSH(ah); +- DISABLE_REGWRITE_BUFFER(ah); + } + + /* This should work for all families including legacy */ +@@ -688,7 +687,6 @@ static void ath9k_hw_init_qos(struct ath + REG_WRITE(ah, AR_TXOP_12_15, 0xFFFFFFFF); + + REGWRITE_BUFFER_FLUSH(ah); +- DISABLE_REGWRITE_BUFFER(ah); + } + + static void ath9k_hw_init_pll(struct ath_hw *ah, +@@ -753,7 +751,6 @@ static void ath9k_hw_init_interrupt_mask + } + + REGWRITE_BUFFER_FLUSH(ah); +- DISABLE_REGWRITE_BUFFER(ah); + + if (AR_SREV_9300_20_OR_LATER(ah)) { + REG_WRITE(ah, AR_INTR_PRIO_ASYNC_ENABLE, 0); +@@ -897,7 +894,6 @@ static inline void ath9k_hw_set_dma(stru + REG_WRITE(ah, AR_TXCFG, regval | AR_TXCFG_DMASZ_128B); + + REGWRITE_BUFFER_FLUSH(ah); +- DISABLE_REGWRITE_BUFFER(ah); + + /* + * Restore TX Trigger Level to its pre-reset value. +@@ -945,7 +941,6 @@ static inline void ath9k_hw_set_dma(stru + } + + REGWRITE_BUFFER_FLUSH(ah); +- DISABLE_REGWRITE_BUFFER(ah); + + if (AR_SREV_9300_20_OR_LATER(ah)) + ath9k_hw_reset_txstatus_ring(ah); +@@ -1043,7 +1038,6 @@ static bool ath9k_hw_set_reset(struct at + REG_WRITE(ah, AR_RTC_RC, rst_flags); + + REGWRITE_BUFFER_FLUSH(ah); +- DISABLE_REGWRITE_BUFFER(ah); + + udelay(50); + +@@ -1082,7 +1076,6 @@ static bool ath9k_hw_set_reset_power_on( + udelay(2); + + REGWRITE_BUFFER_FLUSH(ah); +- DISABLE_REGWRITE_BUFFER(ah); + + if (!AR_SREV_9300_20_OR_LATER(ah)) + udelay(2); +@@ -1386,7 +1379,6 @@ int ath9k_hw_reset(struct ath_hw *ah, st + REG_WRITE(ah, AR_RSSI_THR, INIT_RSSI_THR); + + REGWRITE_BUFFER_FLUSH(ah); +- DISABLE_REGWRITE_BUFFER(ah); + + r = ath9k_hw_rf_set_freq(ah, chan); + if (r) +@@ -1398,7 +1390,6 @@ int ath9k_hw_reset(struct ath_hw *ah, st + REG_WRITE(ah, AR_DQCUMASK(i), 1 << i); + + REGWRITE_BUFFER_FLUSH(ah); +- DISABLE_REGWRITE_BUFFER(ah); + + ah->intr_txqs = 0; + for (i = 0; i < ah->caps.total_queues; i++) +@@ -1446,7 +1437,6 @@ int ath9k_hw_reset(struct ath_hw *ah, st + REG_WRITE(ah, AR_CFG_LED, saveLedState | AR_CFG_SCLK_32KHZ); + + REGWRITE_BUFFER_FLUSH(ah); +- DISABLE_REGWRITE_BUFFER(ah); + + /* + * For big endian systems turn on swapping for descriptors +@@ -1696,7 +1686,6 @@ void ath9k_hw_beaconinit(struct ath_hw * + REG_WRITE(ah, AR_NDP_PERIOD, TU_TO_USEC(beacon_period)); + + REGWRITE_BUFFER_FLUSH(ah); +- DISABLE_REGWRITE_BUFFER(ah); + + beacon_period &= ~ATH9K_BEACON_ENA; + if (beacon_period & ATH9K_BEACON_RESET_TSF) { +@@ -1724,7 +1713,6 @@ void ath9k_hw_set_sta_beacon_timers(stru + TU_TO_USEC(bs->bs_intval & ATH9K_BEACON_PERIOD)); + + REGWRITE_BUFFER_FLUSH(ah); +- DISABLE_REGWRITE_BUFFER(ah); + + REG_RMW_FIELD(ah, AR_RSSI_THR, + AR_RSSI_THR_BM_THR, bs->bs_bmissthreshold); +@@ -1770,7 +1758,6 @@ void ath9k_hw_set_sta_beacon_timers(stru + REG_WRITE(ah, AR_DTIM_PERIOD, TU_TO_USEC(dtimperiod)); + + REGWRITE_BUFFER_FLUSH(ah); +- DISABLE_REGWRITE_BUFFER(ah); + + REG_SET_BIT(ah, AR_TIMER_MODE, + AR_TBTT_TIMER_EN | AR_TIM_TIMER_EN | +@@ -2188,7 +2175,6 @@ void ath9k_hw_setrxfilter(struct ath_hw + REG_READ(ah, AR_RXCFG) & ~AR_RXCFG_ZLFDMA); + + REGWRITE_BUFFER_FLUSH(ah); +- DISABLE_REGWRITE_BUFFER(ah); + } + EXPORT_SYMBOL(ath9k_hw_setrxfilter); + +--- a/drivers/net/wireless/ath/ath9k/mac.c ++++ b/drivers/net/wireless/ath/ath9k/mac.c +@@ -40,7 +40,6 @@ static void ath9k_hw_set_txq_interrupts( + REG_WRITE(ah, AR_IMR_S2, ah->imrs2_reg); + + REGWRITE_BUFFER_FLUSH(ah); +- DISABLE_REGWRITE_BUFFER(ah); + } + + u32 ath9k_hw_gettxbuf(struct ath_hw *ah, u32 q) +@@ -530,7 +529,6 @@ bool ath9k_hw_resettxqueue(struct ath_hw + } + + REGWRITE_BUFFER_FLUSH(ah); +- DISABLE_REGWRITE_BUFFER(ah); + + if (qi->tqi_qflags & TXQ_FLAG_FRAG_BURST_BACKOFF_ENABLE) { + REG_WRITE(ah, AR_DMISC(q), +@@ -553,7 +551,6 @@ bool ath9k_hw_resettxqueue(struct ath_hw + | AR_D_MISC_POST_FR_BKOFF_DIS); + + REGWRITE_BUFFER_FLUSH(ah); +- DISABLE_REGWRITE_BUFFER(ah); + + /* + * cwmin and cwmax should be 0 for beacon queue +@@ -585,7 +582,6 @@ bool ath9k_hw_resettxqueue(struct ath_hw + AR_D_MISC_ARB_LOCKOUT_CNTRL_S)); + + REGWRITE_BUFFER_FLUSH(ah); +- DISABLE_REGWRITE_BUFFER(ah); + + break; + case ATH9K_TX_QUEUE_PSPOLL: |