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authorlars <lars@3c298f89-4303-0410-b956-a3cf2f4a3e73>2010-03-07 23:44:58 +0000
committerlars <lars@3c298f89-4303-0410-b956-a3cf2f4a3e73>2010-03-07 23:44:58 +0000
commit06c8bec13f8ca1f7627bd633ab998f82d05ac5ef (patch)
tree1dc451d073a726f0c8d7cb7d113709da0b064d05 /target/linux/xburst/files-2.6.32/arch
parentece5bacf603788d83adaa1d499767fbe39475d52 (diff)
[xburst] Add support for enabling/disabling the aic controllers clock.
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@20043 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/xburst/files-2.6.32/arch')
-rw-r--r--target/linux/xburst/files-2.6.32/arch/mips/jz4740/clock.c12
1 files changed, 9 insertions, 3 deletions
diff --git a/target/linux/xburst/files-2.6.32/arch/mips/jz4740/clock.c b/target/linux/xburst/files-2.6.32/arch/mips/jz4740/clock.c
index 12a54ed9f6..a780706bef 100644
--- a/target/linux/xburst/files-2.6.32/arch/mips/jz4740/clock.c
+++ b/target/linux/xburst/files-2.6.32/arch/mips/jz4740/clock.c
@@ -55,8 +55,8 @@
#define JZ_CLOCK_GATE_RTC BIT(2)
#define JZ_CLOCK_GATE_I2C BIT(3)
#define JZ_CLOCK_GATE_SPI BIT(4)
-#define JZ_CLOCK_GATE_AIC_PCLK BIT(5)
-#define JZ_CLOCK_GATE_AIC BIT(6)
+#define JZ_CLOCK_GATE_AIC BIT(5)
+#define JZ_CLOCK_GATE_I2S BIT(6)
#define JZ_CLOCK_GATE_MMC BIT(7)
#define JZ_CLOCK_GATE_ADC BIT(8)
#define JZ_CLOCK_GATE_CIM BIT(9)
@@ -626,7 +626,7 @@ static struct divided_clk jz4740_clock_divided_clks[] = {
.clk = {
.name = "i2s",
.parent = &jz_clk_ext.clk,
- .gate_bit = JZ_CLOCK_GATE_AIC,
+ .gate_bit = JZ_CLOCK_GATE_I2S,
.ops = &jz_clk_i2s_ops,
},
.reg = JZ_REG_CLOCK_I2S,
@@ -721,6 +721,12 @@ static struct clk jz4740_clock_simple_clks[] = {
.gate_bit = JZ_CLOCK_GATE_I2C,
.ops = &jz_clk_simple_ops,
},
+ {
+ .name = "aic",
+ .parent = &jz_clk_ext.clk,
+ .gate_bit = JZ_CLOCK_GATE_AIC,
+ .ops = &jz_clk_simple_ops,
+ },
};
static struct static_clk jz_clk_rtc = {