diff options
author | blogic <blogic@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2013-04-25 19:02:42 +0000 |
---|---|---|
committer | blogic <blogic@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2013-04-25 19:02:42 +0000 |
commit | a151168be27d24c80e5bb959040bae801965dbcf (patch) | |
tree | e4e39019b8f731972de25b14e1f093c8eaaf3713 /target/linux/ramips/patches-3.8/0105-MIPS-ralink-add-RT5350-sdram-register-defines.patch | |
parent | e8ac3affe018cbf45e8a8354631bfa600421fac0 (diff) |
ramips: sync kernel patches with the mips-next tree
Signed-off-by: John Crispin <blogic@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@36431 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ramips/patches-3.8/0105-MIPS-ralink-add-RT5350-sdram-register-defines.patch')
-rw-r--r-- | target/linux/ramips/patches-3.8/0105-MIPS-ralink-add-RT5350-sdram-register-defines.patch | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/target/linux/ramips/patches-3.8/0105-MIPS-ralink-add-RT5350-sdram-register-defines.patch b/target/linux/ramips/patches-3.8/0105-MIPS-ralink-add-RT5350-sdram-register-defines.patch new file mode 100644 index 0000000000..ccabcbd64b --- /dev/null +++ b/target/linux/ramips/patches-3.8/0105-MIPS-ralink-add-RT5350-sdram-register-defines.patch @@ -0,0 +1,32 @@ +From 31f4b3ca1c9bb4bcbbebbe5db5a33ac82f130d9c Mon Sep 17 00:00:00 2001 +From: John Crispin <blogic@openwrt.org> +Date: Mon, 25 Mar 2013 11:19:58 +0100 +Subject: [PATCH 105/137] MIPS: ralink: add RT5350 sdram register defines + +Add a few missing defines that are needed to make memory detection work on the +RT5350. + +Signed-off-by: John Crispin <blogic@openwrt.org> +Acked-by: Gabor Juhos <juhosg@openwrt.org> +Patchwork: http://patchwork.linux-mips.org/patch/5169/ +--- + arch/mips/include/asm/mach-ralink/rt305x.h | 8 ++++++++ + 1 file changed, 8 insertions(+) + +--- a/arch/mips/include/asm/mach-ralink/rt305x.h ++++ b/arch/mips/include/asm/mach-ralink/rt305x.h +@@ -97,6 +97,14 @@ static inline int soc_is_rt5350(void) + #define RT5350_SYSCFG0_CPUCLK_320 0x2 + #define RT5350_SYSCFG0_CPUCLK_300 0x3 + ++#define RT5350_SYSCFG0_DRAM_SIZE_SHIFT 12 ++#define RT5350_SYSCFG0_DRAM_SIZE_MASK 7 ++#define RT5350_SYSCFG0_DRAM_SIZE_2M 0 ++#define RT5350_SYSCFG0_DRAM_SIZE_8M 1 ++#define RT5350_SYSCFG0_DRAM_SIZE_16M 2 ++#define RT5350_SYSCFG0_DRAM_SIZE_32M 3 ++#define RT5350_SYSCFG0_DRAM_SIZE_64M 4 ++ + /* multi function gpio pins */ + #define RT305X_GPIO_I2C_SD 1 + #define RT305X_GPIO_I2C_SCLK 2 |