diff options
author | blogic <blogic@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2013-04-25 19:02:42 +0000 |
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committer | blogic <blogic@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2013-04-25 19:02:42 +0000 |
commit | a151168be27d24c80e5bb959040bae801965dbcf (patch) | |
tree | e4e39019b8f731972de25b14e1f093c8eaaf3713 /target/linux/ramips/patches-3.8/0103-MIPS-ralink-add-RT3352-usb-register-defines.patch | |
parent | e8ac3affe018cbf45e8a8354631bfa600421fac0 (diff) |
ramips: sync kernel patches with the mips-next tree
Signed-off-by: John Crispin <blogic@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@36431 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ramips/patches-3.8/0103-MIPS-ralink-add-RT3352-usb-register-defines.patch')
-rw-r--r-- | target/linux/ramips/patches-3.8/0103-MIPS-ralink-add-RT3352-usb-register-defines.patch | 34 |
1 files changed, 0 insertions, 34 deletions
diff --git a/target/linux/ramips/patches-3.8/0103-MIPS-ralink-add-RT3352-usb-register-defines.patch b/target/linux/ramips/patches-3.8/0103-MIPS-ralink-add-RT3352-usb-register-defines.patch deleted file mode 100644 index d99781bf7d..0000000000 --- a/target/linux/ramips/patches-3.8/0103-MIPS-ralink-add-RT3352-usb-register-defines.patch +++ /dev/null @@ -1,34 +0,0 @@ -From 5157985fbc0f071276b0c3381ac8ed191878358a Mon Sep 17 00:00:00 2001 -From: John Crispin <blogic@openwrt.org> -Date: Thu, 21 Mar 2013 19:01:49 +0100 -Subject: [PATCH 103/121] MIPS: ralink: add RT3352 usb register defines - -Add a few missing defines that are needed to make USB work on the RT3352 -and RT5350. - -Signed-off-by: John Crispin <blogic@openwrt.org> ---- - arch/mips/include/asm/mach-ralink/rt305x.h | 11 +++++++++++ - 1 file changed, 11 insertions(+) - ---- a/arch/mips/include/asm/mach-ralink/rt305x.h -+++ b/arch/mips/include/asm/mach-ralink/rt305x.h -@@ -144,4 +144,18 @@ static inline int soc_is_rt5350(void) - #define RT305X_GPIO_MODE_SDRAM BIT(8) - #define RT305X_GPIO_MODE_RGMII BIT(9) - -+#define RT3352_SYSC_REG_SYSCFG1 0x014 -+#define RT3352_SYSC_REG_CLKCFG1 0x030 -+#define RT3352_SYSC_REG_RSTCTRL 0x034 -+#define RT3352_SYSC_REG_USB_PS 0x05c -+ -+#define RT3352_CLKCFG1_UPHY0_CLK_EN BIT(18) -+#define RT3352_CLKCFG1_UPHY1_CLK_EN BIT(20) -+#define RT3352_RSTCTRL_UHST BIT(22) -+#define RT3352_RSTCTRL_UDEV BIT(25) -+#define RT3352_SYSCFG1_USB0_HOST_MODE BIT(10) -+ -+#define RT3352_SYSC_REG_SYSCFG0 0x010 -+#define RT3352_CLKCFG0_XTAL_SEL BIT(20) -+ - #endif |