diff options
author | blogic <blogic@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2013-07-14 18:00:34 +0000 |
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committer | blogic <blogic@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2013-07-14 18:00:34 +0000 |
commit | e0fb809dfa316826b479626280bfb63ad0959a7e (patch) | |
tree | 29b48b2691fa9b9bb934598aab3dd09bb8562f6e /target/linux/ramips/patches-3.8/0019-MIPS-ralink-fix-RT305x-clock-setup.patch | |
parent | 0c53c601b91a3ba896e47926e6458acac5d95f72 (diff) |
ralink: drop v3.8 support
Signed-off-by: John Crispin <blogic@opewnrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@37311 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ramips/patches-3.8/0019-MIPS-ralink-fix-RT305x-clock-setup.patch')
-rw-r--r-- | target/linux/ramips/patches-3.8/0019-MIPS-ralink-fix-RT305x-clock-setup.patch | 52 |
1 files changed, 0 insertions, 52 deletions
diff --git a/target/linux/ramips/patches-3.8/0019-MIPS-ralink-fix-RT305x-clock-setup.patch b/target/linux/ramips/patches-3.8/0019-MIPS-ralink-fix-RT305x-clock-setup.patch deleted file mode 100644 index ebecdf2629..0000000000 --- a/target/linux/ramips/patches-3.8/0019-MIPS-ralink-fix-RT305x-clock-setup.patch +++ /dev/null @@ -1,52 +0,0 @@ -From 853823a469a8123657bf32bc5e1843c40529a20d Mon Sep 17 00:00:00 2001 -From: John Crispin <blogic@openwrt.org> -Date: Fri, 22 Mar 2013 19:25:59 +0100 -Subject: [PATCH 19/79] MIPS: ralink: fix RT305x clock setup - -Add a few missing clocks. - -Signed-off-by: John Crispin <blogic@openwrt.org> -Acked-by: Gabor Juhos <juhosg@openwrt.org> -Patchwork: http://patchwork.linux-mips.org/patch/5167/ ---- - arch/mips/ralink/rt305x.c | 12 ++++++++++++ - 1 file changed, 12 insertions(+) - -diff --git a/arch/mips/ralink/rt305x.c b/arch/mips/ralink/rt305x.c -index 0a4bbdc..5d49a54 100644 ---- a/arch/mips/ralink/rt305x.c -+++ b/arch/mips/ralink/rt305x.c -@@ -124,6 +124,8 @@ struct ralink_pinmux gpio_pinmux = { - void __init ralink_clk_init(void) - { - unsigned long cpu_rate, sys_rate, wdt_rate, uart_rate; -+ unsigned long wmac_rate = 40000000; -+ - u32 t = rt_sysc_r32(SYSC_REG_SYSTEM_CONFIG); - - if (soc_is_rt305x() || soc_is_rt3350()) { -@@ -176,11 +178,21 @@ void __init ralink_clk_init(void) - BUG(); - } - -+ if (soc_is_rt3352() || soc_is_rt5350()) { -+ u32 val = rt_sysc_r32(RT3352_SYSC_REG_SYSCFG0); -+ -+ if (!(val & RT3352_CLKCFG0_XTAL_SEL)) -+ wmac_rate = 20000000; -+ } -+ - ralink_clk_add("cpu", cpu_rate); - ralink_clk_add("10000b00.spi", sys_rate); - ralink_clk_add("10000100.timer", wdt_rate); -+ ralink_clk_add("10000120.watchdog", wdt_rate); - ralink_clk_add("10000500.uart", uart_rate); - ralink_clk_add("10000c00.uartlite", uart_rate); -+ ralink_clk_add("10100000.ethernet", sys_rate); -+ ralink_clk_add("10180000.wmac", wmac_rate); - } - - void __init ralink_of_remap(void) --- -1.7.10.4 - |