diff options
| author | blogic <blogic@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2013-07-15 10:06:55 +0000 |
|---|---|---|
| committer | blogic <blogic@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2013-07-15 10:06:55 +0000 |
| commit | ff4e0c1d0851ea6a073c03b8f2502cfee2ff68ae (patch) | |
| tree | faa96127d83945d5237ce1c294b2316754727325 /target/linux/ramips/patches-3.10/0005-MIPS-ralink-make-mt7620-ram-detect-verbose.patch | |
| parent | f64b0644d8f3ea912f76c3123b92bdd9b4aeb13c (diff) | |
ramips: add ralink v3.10 support
Signed-off-by: John Crispin <blogic@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@37331 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ramips/patches-3.10/0005-MIPS-ralink-make-mt7620-ram-detect-verbose.patch')
| -rw-r--r-- | target/linux/ramips/patches-3.10/0005-MIPS-ralink-make-mt7620-ram-detect-verbose.patch | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/target/linux/ramips/patches-3.10/0005-MIPS-ralink-make-mt7620-ram-detect-verbose.patch b/target/linux/ramips/patches-3.10/0005-MIPS-ralink-make-mt7620-ram-detect-verbose.patch new file mode 100644 index 0000000000..c777419f12 --- /dev/null +++ b/target/linux/ramips/patches-3.10/0005-MIPS-ralink-make-mt7620-ram-detect-verbose.patch @@ -0,0 +1,39 @@ +From 3f6b346e1dd83c4f43d94aefa0520ffdfafd5f0b Mon Sep 17 00:00:00 2001 +From: John Crispin <blogic@openwrt.org> +Date: Mon, 20 May 2013 20:30:11 +0200 +Subject: [PATCH 05/33] MIPS: ralink: make mt7620 ram detect verbose + +Make the code print which of SDRAM, DDR1 or DDR2 was detected. + +Signed-off-by: John Crispin <blogic@openwrt.org> +--- + arch/mips/ralink/mt7620.c | 3 +++ + 1 file changed, 3 insertions(+) + +diff --git a/arch/mips/ralink/mt7620.c b/arch/mips/ralink/mt7620.c +index 0018b1a..ccdec5a 100644 +--- a/arch/mips/ralink/mt7620.c ++++ b/arch/mips/ralink/mt7620.c +@@ -214,16 +214,19 @@ void prom_soc_init(struct ralink_soc_info *soc_info) + + switch (dram_type) { + case SYSCFG0_DRAM_TYPE_SDRAM: ++ pr_info("Board has SDRAM\n"); + soc_info->mem_size_min = MT7620_SDRAM_SIZE_MIN; + soc_info->mem_size_max = MT7620_SDRAM_SIZE_MAX; + break; + + case SYSCFG0_DRAM_TYPE_DDR1: ++ pr_info("Board has DDR1\n"); + soc_info->mem_size_min = MT7620_DDR1_SIZE_MIN; + soc_info->mem_size_max = MT7620_DDR1_SIZE_MAX; + break; + + case SYSCFG0_DRAM_TYPE_DDR2: ++ pr_info("Board has DDR2\n"); + soc_info->mem_size_min = MT7620_DDR2_SIZE_MIN; + soc_info->mem_size_max = MT7620_DDR2_SIZE_MAX; + break; +-- +1.7.10.4 + |