diff options
| author | blogic <blogic@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2011-03-29 07:10:50 +0000 |
|---|---|---|
| committer | blogic <blogic@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2011-03-29 07:10:50 +0000 |
| commit | dcd71c4d2e01a6593cc3a3437b58cd1d0f8d71c0 (patch) | |
| tree | 17a2307d78def1e7a1f5e68739fc2d6ea481eb4e /target/linux/lantiq/patches/940-spi1.patch | |
| parent | 3df283247e736971b2bbaa1c04badcc3cf2f78ab (diff) | |
[lantiq]
* adds spi driver, thx daniel
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@26355 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/lantiq/patches/940-spi1.patch')
| -rw-r--r-- | target/linux/lantiq/patches/940-spi1.patch | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/target/linux/lantiq/patches/940-spi1.patch b/target/linux/lantiq/patches/940-spi1.patch new file mode 100644 index 0000000000..343db3d58e --- /dev/null +++ b/target/linux/lantiq/patches/940-spi1.patch @@ -0,0 +1,44 @@ +From: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> +Date: Thu, 3 Mar 2011 17:15:58 +0000 (+0100) +Subject: MIPS: lantiq: Add platform data for Lantiq SoC SPI controller driver +X-Git-Url: http://nbd.name/gitweb.cgi?p=lantiq.git;a=commitdiff_plain;h=3d21b04682ae8eb1c1965aba39d1796e8c5ad84b;hp=06b420500fe98e37662837e78d8e51aead8aea81 + +MIPS: lantiq: Add platform data for Lantiq SoC SPI controller driver + +Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> +--- + +--- a/arch/mips/include/asm/mach-lantiq/lantiq_platform.h ++++ b/arch/mips/include/asm/mach-lantiq/lantiq_platform.h +@@ -48,4 +48,13 @@ + + extern int (*lqpci_plat_dev_init)(struct pci_dev *dev); + ++ ++struct lq_spi_platform_data { ++ u16 num_chipselect; ++}; ++ ++struct lq_spi_controller_data { ++ unsigned gpio; ++}; ++ + #endif +--- a/arch/mips/include/asm/mach-lantiq/xway/xway.h ++++ b/arch/mips/include/asm/mach-lantiq/xway/xway.h +@@ -72,6 +72,7 @@ + #define LQ_PMU_BASE_ADDR (KSEG1 + 0x1F102000) + + #define PMU_DMA 0x0020 ++#define PMU_SPI 0x0100 + #define PMU_USB 0x8041 + #define PMU_LED 0x0800 + #define PMU_GPT 0x1000 +@@ -105,6 +106,7 @@ + + /*------------ SSC */ + #define LQ_SSC_BASE_ADDR (KSEG1 + 0x1e100800) ++#define LQ_SSC_SIZE 0x100 + + /*------------ MEI */ + #define LQ_MEI_BASE_ADDR (KSEG1 + 0x1E116000) |