diff options
| author | blogic <blogic@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2012-12-15 01:59:45 +0000 |
|---|---|---|
| committer | blogic <blogic@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2012-12-15 01:59:45 +0000 |
| commit | 7185dc2440c81feae80539ecc8d1e0c9e133497b (patch) | |
| tree | b01c98dfee8ccdd18862f3049d7dfdcca7828c3a /target/linux/lantiq/patches-3.7/0002-MIPS-lantiq-fix-bootselect-bits-on-XRX200-SoC.patch | |
| parent | 502a3e0f56d6af2fee94bfd4c6e05c8361ccde6c (diff) | |
[lantiq] add linux-v3.7
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@34687 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/lantiq/patches-3.7/0002-MIPS-lantiq-fix-bootselect-bits-on-XRX200-SoC.patch')
| -rw-r--r-- | target/linux/lantiq/patches-3.7/0002-MIPS-lantiq-fix-bootselect-bits-on-XRX200-SoC.patch | 71 |
1 files changed, 71 insertions, 0 deletions
diff --git a/target/linux/lantiq/patches-3.7/0002-MIPS-lantiq-fix-bootselect-bits-on-XRX200-SoC.patch b/target/linux/lantiq/patches-3.7/0002-MIPS-lantiq-fix-bootselect-bits-on-XRX200-SoC.patch new file mode 100644 index 0000000000..2a305b4afe --- /dev/null +++ b/target/linux/lantiq/patches-3.7/0002-MIPS-lantiq-fix-bootselect-bits-on-XRX200-SoC.patch @@ -0,0 +1,71 @@ +From 15753b6586710d788f36cfd5fbb98d0805b390ab Mon Sep 17 00:00:00 2001 +From: John Crispin <blogic@openwrt.org> +Date: Fri, 9 Nov 2012 13:31:51 +0100 +Subject: [PATCH 2/6] MIPS: lantiq: fix bootselect bits on XRX200 SoC + +The XRX200 SoC family has a different register layout for reading the boot +selection bits. + +Signed-off-by: John Crispin <blogic@openwrt.org> +Patchwork: http://patchwork.linux-mips.org/patch/4519 +--- + arch/mips/lantiq/xway/reset.c | 22 +++++++++++++++------- + 1 file changed, 15 insertions(+), 7 deletions(-) + +diff --git a/arch/mips/lantiq/xway/reset.c b/arch/mips/lantiq/xway/reset.c +index 22c55f7..2799212 100644 +--- a/arch/mips/lantiq/xway/reset.c ++++ b/arch/mips/lantiq/xway/reset.c +@@ -34,11 +34,12 @@ + /* reset cause */ + #define RCU_STAT_SHIFT 26 + /* boot selection */ +-#define RCU_BOOT_SEL_SHIFT 26 +-#define RCU_BOOT_SEL_MASK 0x7 ++#define RCU_BOOT_SEL(x) ((x >> 18) & 0x7) ++#define RCU_BOOT_SEL_XRX200(x) (((x >> 17) & 0xf) | ((x >> 8) & 0x10)) + + /* remapped base addr of the reset control unit */ + static void __iomem *ltq_rcu_membase; ++static struct device_node *ltq_rcu_np; + + /* This function is used by the watchdog driver */ + int ltq_reset_cause(void) +@@ -52,7 +53,11 @@ EXPORT_SYMBOL_GPL(ltq_reset_cause); + unsigned char ltq_boot_select(void) + { + u32 val = ltq_rcu_r32(RCU_RST_STAT); +- return (val >> RCU_BOOT_SEL_SHIFT) & RCU_BOOT_SEL_MASK; ++ ++ if (of_device_is_compatible(ltq_rcu_np, "lantiq,rcu-xrx200")) ++ return RCU_BOOT_SEL_XRX200(val); ++ ++ return RCU_BOOT_SEL(val); + } + + /* reset a io domain for u micro seconds */ +@@ -85,14 +90,17 @@ static void ltq_machine_power_off(void) + static int __init mips_reboot_setup(void) + { + struct resource res; +- struct device_node *np = +- of_find_compatible_node(NULL, NULL, "lantiq,rcu-xway"); ++ ++ ltq_rcu_np = of_find_compatible_node(NULL, NULL, "lantiq,rcu-xway"); ++ if (!ltq_rcu_np) ++ ltq_rcu_np = of_find_compatible_node(NULL, NULL, ++ "lantiq,rcu-xrx200"); + + /* check if all the reset register range is available */ +- if (!np) ++ if (!ltq_rcu_np) + panic("Failed to load reset resources from devicetree"); + +- if (of_address_to_resource(np, 0, &res)) ++ if (of_address_to_resource(ltq_rcu_np, 0, &res)) + panic("Failed to get rcu memory range"); + + if (request_mem_region(res.start, resource_size(&res), res.name) < 0) +-- +1.7.10.4 + |