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| author | florian <florian@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2012-06-17 16:17:29 +0000 |
|---|---|---|
| committer | florian <florian@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2012-06-17 16:17:29 +0000 |
| commit | 4666e9b56d1d587f6cc55e6609ddcd7127d46035 (patch) | |
| tree | ab78b31e2a8b3061e8e66012ae64fc9cab965bee /target/linux/lantiq/patches-3.3/0059-MIPS-lantiq-fixes-ar9-vr9-clock.patch | |
| parent | e200a200fa5c3f7cec184fa8694125f824397daa (diff) | |
[brcm63xx] fix SPI message control handling for BCM6338/6348
BCM6338 and BCM6338 have their MSG_CONTROL register width of 8-bits instead of
16-bits. We were previously using a 16-bits write which corrupted the first
byte of the TX FIFO. Also the message type was always set to Full-duplex even
in the case of half-duplex messages.
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@32409 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/lantiq/patches-3.3/0059-MIPS-lantiq-fixes-ar9-vr9-clock.patch')
0 files changed, 0 insertions, 0 deletions