diff options
| author | blogic <blogic@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2012-03-25 08:50:09 +0000 |
|---|---|---|
| committer | blogic <blogic@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2012-03-25 08:50:09 +0000 |
| commit | 4c8d6ad4d00835073b97d6bacdc119a58ac22350 (patch) | |
| tree | fcbc09d1188b157091e186d10871e28abf340864 /target/linux/lantiq/patches-3.2/0067-MIPS-lantiq-irqs-were-not-cleared-properly-on-boot.patch | |
| parent | bdd85a2ede796789cc19239466d5e3b06f329dc7 (diff) | |
[lantiq] bump kernel to 3.2.12
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@31060 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/lantiq/patches-3.2/0067-MIPS-lantiq-irqs-were-not-cleared-properly-on-boot.patch')
| -rw-r--r-- | target/linux/lantiq/patches-3.2/0067-MIPS-lantiq-irqs-were-not-cleared-properly-on-boot.patch | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/target/linux/lantiq/patches-3.2/0067-MIPS-lantiq-irqs-were-not-cleared-properly-on-boot.patch b/target/linux/lantiq/patches-3.2/0067-MIPS-lantiq-irqs-were-not-cleared-properly-on-boot.patch new file mode 100644 index 0000000000..a97259c260 --- /dev/null +++ b/target/linux/lantiq/patches-3.2/0067-MIPS-lantiq-irqs-were-not-cleared-properly-on-boot.patch @@ -0,0 +1,34 @@ +From 845d2430d74cf6e2326da95b9205258170b30c86 Mon Sep 17 00:00:00 2001 +From: John Crispin <blogic@openwrt.org> +Date: Tue, 20 Mar 2012 09:44:27 +0100 +Subject: [PATCH 67/70] MIPS: lantiq: irqs were not cleared properly on boot + +--- + arch/mips/lantiq/irq.c | 10 +++++----- + 1 files changed, 5 insertions(+), 5 deletions(-) + +diff --git a/arch/mips/lantiq/irq.c b/arch/mips/lantiq/irq.c +index 770a10c..d4e70b4 100644 +--- a/arch/mips/lantiq/irq.c ++++ b/arch/mips/lantiq/irq.c +@@ -327,12 +327,12 @@ void __init arch_init_irq(void) + panic("Failed to remap eiu memory\n"); + } + +- /* make sure all irqs are turned off by default */ +- for (i = 0; i < 5; i++) ++ for (i = 0; i < 5; i++) { ++ /* make sure all irqs are turned off by default */ + ltq_icu_w32(0, LTQ_ICU_IM0_IER + (i * LTQ_ICU_OFFSET)); +- +- /* clear all possibly pending interrupts */ +- ltq_icu_w32(~0, LTQ_ICU_IM0_ISR + (i * LTQ_ICU_OFFSET)); ++ /* clear all possibly pending interrupts */ ++ ltq_icu_w32(~0, LTQ_ICU_IM0_ISR + (i * LTQ_ICU_OFFSET)); ++ } + + mips_cpu_irq_init(); + +-- +1.7.7.1 + |