kernel: update linux 3.8 to 3.8.6

Signed-off-by: Gabor Juhos <juhosg@openwrt.org>

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@36215 3c298f89-4303-0410-b956-a3cf2f4a3e73

3 files changed, 11 insertions, 39 deletions

diff --git a/target/linux/cns3xxx/Makefile b/target/linux/cns3xxx/Makefile
index f094c70e45..c944d1c1a5 100644
--- a/target/linux/cns3xxx/Makefile
+++ b/target/linux/cns3xxx/Makefile
@@ -13,7 +13,7 @@ FEATURES:=squashfs fpu gpio pcie usb usbgadget
 CFLAGS:=-Os -pipe -march=armv6k -mtune=mpcore -mfloat-abi=softfp -mfpu=vfp -fno-caller-saves
 MAINTAINER:=Imre Kaloz <kaloz@openwrt.org>
 
-LINUX_VERSION:=3.8.3
+LINUX_VERSION:=3.8.6
 
 include $(INCLUDE_DIR)/target.mk
 
diff --git a/target/linux/cns3xxx/patches-3.8/010-move_virtual_io_space.patch b/target/linux/cns3xxx/patches-3.8/010-move_virtual_io_space.patch
index c7d89d5d0f..0d450765c9 100644
--- a/target/linux/cns3xxx/patches-3.8/010-move_virtual_io_space.patch
+++ b/target/linux/cns3xxx/patches-3.8/010-move_virtual_io_space.patch
@@ -1,24 +1,3 @@
---- a/arch/arm/mach-cns3xxx/core.c
-+++ b/arch/arm/mach-cns3xxx/core.c
-@@ -24,17 +24,7 @@ static struct map_desc cns3xxx_io_desc[]
- 	{
- 		.virtual	= CNS3XXX_TC11MP_TWD_BASE_VIRT,
- 		.pfn		= __phys_to_pfn(CNS3XXX_TC11MP_TWD_BASE),
--		.length		= SZ_4K,
--		.type		= MT_DEVICE,
--	}, {
--		.virtual	= CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT,
--		.pfn		= __phys_to_pfn(CNS3XXX_TC11MP_GIC_CPU_BASE),
--		.length		= SZ_4K,
--		.type		= MT_DEVICE,
--	}, {
--		.virtual	= CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT,
--		.pfn		= __phys_to_pfn(CNS3XXX_TC11MP_GIC_DIST_BASE),
--		.length		= SZ_4K,
-+		.length		= SZ_8K,
- 		.type		= MT_DEVICE,
- 	}, {
- 		.virtual	= CNS3XXX_TIMER1_2_3_BASE_VIRT,
 --- a/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h
 +++ b/arch/arm/mach-cns3xxx/include/mach/cns3xxx.h
 @@ -20,22 +20,22 @@
@@ -71,11 +50,11 @@
  #define RTC_INTR_STS_OFFSET			0x34
  
  #define CNS3XXX_MISC_BASE			0x76000000	/* Misc Control */
--#define CNS3XXX_MISC_BASE_VIRT			0xFFF07000	/* Misc Control */
+-#define CNS3XXX_MISC_BASE_VIRT			0xFB000000	/* Misc Control */
 +#define CNS3XXX_MISC_BASE_VIRT			0xFEF07000	/* Misc Control */
  
  #define CNS3XXX_PM_BASE				0x77000000	/* Power Management Control */
--#define CNS3XXX_PM_BASE_VIRT			0xFFF08000
+-#define CNS3XXX_PM_BASE_VIRT			0xFB001000
 +#define CNS3XXX_PM_BASE_VIRT			0xFEF08000
  
  #define PM_CLK_GATE_OFFSET			0x00
@@ -84,7 +63,7 @@
  #define PM_PLL_HM_PD_OFFSET			0x1C
  
  #define CNS3XXX_UART0_BASE			0x78000000	/* UART 0 */
--#define CNS3XXX_UART0_BASE_VIRT			0xFFF09000
+-#define CNS3XXX_UART0_BASE_VIRT			0xFB002000
 +#define CNS3XXX_UART0_BASE_VIRT			0xFEF09000
  
  #define CNS3XXX_UART1_BASE			0x78400000	/* UART 1 */
@@ -112,7 +91,7 @@
 +#define CNS3XXX_I2S_BASE_VIRT			0xFEF10000
  
  #define CNS3XXX_TIMER1_2_3_BASE			0x7C800000	/* Timer */
--#define CNS3XXX_TIMER1_2_3_BASE_VIRT		0xFFF10800
+-#define CNS3XXX_TIMER1_2_3_BASE_VIRT		0xFB003000
 +#define CNS3XXX_TIMER1_2_3_BASE_VIRT		0xFEF10800
  
  #define TIMER1_COUNTER_OFFSET			0x00
@@ -171,24 +150,17 @@
  
  #define CNS3XXX_PCIE0_MEM_BASE			0xA0000000	/* PCIe Port 0 IO/Memory Space */
  #define CNS3XXX_PCIE0_MEM_BASE_VIRT		0xE0000000
-@@ -227,19 +227,19 @@
+@@ -227,7 +227,7 @@
   * Testchip peripheral and fpga gic regions
   */
  #define CNS3XXX_TC11MP_SCU_BASE			0x90000000	/* IRQ, Test chip */
--#define CNS3XXX_TC11MP_SCU_BASE_VIRT		0xFF000000
+-#define CNS3XXX_TC11MP_SCU_BASE_VIRT		0xFB004000
 +#define CNS3XXX_TC11MP_SCU_BASE_VIRT		0xFEE00000
  
  #define CNS3XXX_TC11MP_GIC_CPU_BASE		0x90000100	/* Test chip interrupt controller CPU interface */
--#define CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT	0xFF000100
-+#define CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT	0xFEE00100
- 
- #define CNS3XXX_TC11MP_TWD_BASE			0x90000600
--#define CNS3XXX_TC11MP_TWD_BASE_VIRT		0xFF000600
-+#define CNS3XXX_TC11MP_TWD_BASE_VIRT		0xFEE00600
- 
- #define CNS3XXX_TC11MP_GIC_DIST_BASE		0x90001000	/* Test chip interrupt controller distributor */
--#define CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT	0xFF001000
-+#define CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT	0xFEE01000
+ #define CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT	(CNS3XXX_TC11MP_SCU_BASE_VIRT + 0x100)
+@@ -239,7 +239,7 @@
+ #define CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT	(CNS3XXX_TC11MP_SCU_BASE_VIRT + 0x1000)
  
  #define CNS3XXX_TC11MP_L220_BASE		0x92002000	/* L220 registers */
 -#define CNS3XXX_TC11MP_L220_BASE_VIRT		0xFF002000
diff --git a/target/linux/cns3xxx/patches-3.8/015-clkdev_support.patch b/target/linux/cns3xxx/patches-3.8/015-clkdev_support.patch
index 15e301a45b..5ffa4cb940 100644
--- a/target/linux/cns3xxx/patches-3.8/015-clkdev_support.patch
+++ b/target/linux/cns3xxx/patches-3.8/015-clkdev_support.patch
@@ -32,7 +32,7 @@
 +
  static struct map_desc cns3xxx_io_desc[] __initdata = {
  	{
- 		.virtual	= CNS3XXX_TC11MP_TWD_BASE_VIRT,
+ 		.virtual	= CNS3XXX_TC11MP_SCU_BASE_VIRT,
 @@ -277,3 +284,33 @@ void __init cns3xxx_l2x0_init(void)
  }