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authorjogo <jogo@3c298f89-4303-0410-b956-a3cf2f4a3e73>2013-09-06 19:01:17 +0000
committerjogo <jogo@3c298f89-4303-0410-b956-a3cf2f4a3e73>2013-09-06 19:01:17 +0000
commitc04562f816aebe1c2637754faca4f3e9b7999b06 (patch)
treeb31741327b2830918dbd45b4d440b49ec4cb125d /target/linux/brcm63xx/patches-3.9/408-bcm63xx_enet-enable-rgmii-clock-on-external-ports.patch
parent0ab0f78233f59ec6e2845726bd6dce2f504572af (diff)
brcm63xx: drop linux 3.9 support
It is EOL since quite a while, so no need to keep it around. Signed-off-by: Jonas Gorski <jogo@openwrt.org> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@37911 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/brcm63xx/patches-3.9/408-bcm63xx_enet-enable-rgmii-clock-on-external-ports.patch')
-rw-r--r--target/linux/brcm63xx/patches-3.9/408-bcm63xx_enet-enable-rgmii-clock-on-external-ports.patch53
1 files changed, 0 insertions, 53 deletions
diff --git a/target/linux/brcm63xx/patches-3.9/408-bcm63xx_enet-enable-rgmii-clock-on-external-ports.patch b/target/linux/brcm63xx/patches-3.9/408-bcm63xx_enet-enable-rgmii-clock-on-external-ports.patch
deleted file mode 100644
index ea11c4140f..0000000000
--- a/target/linux/brcm63xx/patches-3.9/408-bcm63xx_enet-enable-rgmii-clock-on-external-ports.patch
+++ /dev/null
@@ -1,53 +0,0 @@
-From d8237d704fc25eb2fc25ef4403608b78c6a6d4be Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Sun, 15 Jul 2012 20:08:57 +0200
-Subject: [PATCH 54/81] bcm63xx_enet: enable rgmii clock on external ports
-
----
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 13 +++++++++++++
- drivers/net/ethernet/broadcom/bcm63xx_enet.c | 12 ++++++++++++
- 2 files changed, 25 insertions(+), 0 deletions(-)
-
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -931,6 +931,19 @@
- #define ENETSW_PORTOV_FDX_MASK (1 << 1)
- #define ENETSW_PORTOV_LINKUP_MASK (1 << 0)
-
-+/* Port RGMII control register */
-+#define ENETSW_RGMII_CTRL_REG(x) (0x60 + (x))
-+#define ENETSW_RGMII_CTRL_GMII_CLK_EN (1 << 7)
-+#define ENETSW_RGMII_CTRL_MII_OVERRIDE_EN (1 << 6)
-+#define ENETSW_RGMII_CTRL_MII_MODE_MASK (3 << 4)
-+#define ENETSW_RGMII_CTRL_RGMII_MODE (0 << 4)
-+#define ENETSW_RGMII_CTRL_MII_MODE (1 << 4)
-+#define ENETSW_RGMII_CTRL_RVMII_MODE (2 << 4)
-+#define ENETSW_RGMII_CTRL_TIMING_SEL_EN (1 << 0)
-+
-+/* Port RGMII timing register */
-+#define ENETSW_RGMII_TIMING_REG(x) (0x68 + (x))
-+
- /* MDIO control register */
- #define ENETSW_MDIOC_REG (0xb0)
- #define ENETSW_MDIOC_EXT_MASK (1 << 16)
---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-@@ -2233,6 +2233,18 @@ static int bcm_enetsw_open(struct net_de
- priv->sw_port_link[i] = 0;
- }
-
-+ /* enable external ports */
-+ for (i = ENETSW_RGMII_PORT0; i < priv->num_ports; i++) {
-+ u8 rgmii_ctrl;
-+
-+ if (!priv->used_ports[i].used)
-+ continue;
-+
-+ rgmii_ctrl = enetsw_readb(priv, ENETSW_RGMII_CTRL_REG(i));
-+ rgmii_ctrl |= ENETSW_RGMII_CTRL_GMII_CLK_EN;
-+ enetsw_writeb(priv, rgmii_ctrl, ENETSW_RGMII_CTRL_REG(i));
-+ }
-+
- /* reset mib */
- val = enetsw_readb(priv, ENETSW_GMCR_REG);
- val |= ENETSW_GMCR_RST_MIB_MASK;