diff options
| author | jogo <jogo@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2013-04-23 13:55:36 +0000 |
|---|---|---|
| committer | jogo <jogo@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2013-04-23 13:55:36 +0000 |
| commit | e2428ebd83861f693ac94cbe2662021d4e7f3775 (patch) | |
| tree | 5ef4da4d4811465ed5574bd3d084fbf7cb928e21 /target/linux/brcm63xx/patches-3.8/023-MIPS-BCM63XX-fix-revision-ID-width.patch | |
| parent | e3dfb1052672f7359784de8d1002a8eafebc2b68 (diff) | |
bcm63xx: update patches with upstream submissions
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@36407 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/brcm63xx/patches-3.8/023-MIPS-BCM63XX-fix-revision-ID-width.patch')
| -rw-r--r-- | target/linux/brcm63xx/patches-3.8/023-MIPS-BCM63XX-fix-revision-ID-width.patch | 68 |
1 files changed, 68 insertions, 0 deletions
diff --git a/target/linux/brcm63xx/patches-3.8/023-MIPS-BCM63XX-fix-revision-ID-width.patch b/target/linux/brcm63xx/patches-3.8/023-MIPS-BCM63XX-fix-revision-ID-width.patch new file mode 100644 index 0000000000..0ee88e113c --- /dev/null +++ b/target/linux/brcm63xx/patches-3.8/023-MIPS-BCM63XX-fix-revision-ID-width.patch @@ -0,0 +1,68 @@ +From 609c69339a24bd034f5359dad14087276ce5a83f Mon Sep 17 00:00:00 2001 +From: Jonas Gorski <jogo@openwrt.org> +Date: Sun, 15 Jan 2012 14:41:22 +0100 +Subject: [PATCH 2/7] MIPS: BCM63XX: fix revision ID width + +The REVID is only 8 bit wide. + +Signed-off-by: Jonas Gorski <jogo@openwrt.org> +--- + arch/mips/bcm63xx/cpu.c | 4 ++-- + arch/mips/bcm63xx/setup.c | 2 +- + arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 2 +- + arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 2 +- + 4 files changed, 5 insertions(+), 5 deletions(-) + +--- a/arch/mips/bcm63xx/cpu.c ++++ b/arch/mips/bcm63xx/cpu.c +@@ -25,7 +25,7 @@ const int *bcm63xx_irqs; + EXPORT_SYMBOL(bcm63xx_irqs); + + static u16 bcm63xx_cpu_id; +-static u16 bcm63xx_cpu_rev; ++static u8 bcm63xx_cpu_rev; + static unsigned int bcm63xx_cpu_freq; + static unsigned int bcm63xx_memory_size; + +@@ -87,7 +87,7 @@ u16 __bcm63xx_get_cpu_id(void) + + EXPORT_SYMBOL(__bcm63xx_get_cpu_id); + +-u16 bcm63xx_get_cpu_rev(void) ++u8 bcm63xx_get_cpu_rev(void) + { + return bcm63xx_cpu_rev; + } +--- a/arch/mips/bcm63xx/setup.c ++++ b/arch/mips/bcm63xx/setup.c +@@ -126,7 +126,7 @@ static void __bcm63xx_machine_reboot(cha + const char *get_system_type(void) + { + static char buf[128]; +- snprintf(buf, sizeof(buf), "bcm63xx/%s (0x%04x/0x%04X)", ++ snprintf(buf, sizeof(buf), "bcm63xx/%s (0x%04x/0x%02X)", + board_get_name(), + bcm63xx_get_cpu_id(), bcm63xx_get_cpu_rev()); + return buf; +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h +@@ -18,7 +18,7 @@ + + void __init bcm63xx_cpu_init(void); + u16 __bcm63xx_get_cpu_id(void); +-u16 bcm63xx_get_cpu_rev(void); ++u8 bcm63xx_get_cpu_rev(void); + unsigned int bcm63xx_get_cpu_freq(void); + + #ifdef CONFIG_BCM63XX_CPU_6328 +--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h ++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h +@@ -10,7 +10,7 @@ + #define REV_CHIPID_SHIFT 16 + #define REV_CHIPID_MASK (0xffff << REV_CHIPID_SHIFT) + #define REV_REVID_SHIFT 0 +-#define REV_REVID_MASK (0xffff << REV_REVID_SHIFT) ++#define REV_REVID_MASK (0xff << REV_REVID_SHIFT) + + /* Clock Control register */ + #define PERF_CKCTL_REG 0x4 |