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authorflorian <florian@3c298f89-4303-0410-b956-a3cf2f4a3e73>2012-06-17 16:17:29 +0000
committerflorian <florian@3c298f89-4303-0410-b956-a3cf2f4a3e73>2012-06-17 16:17:29 +0000
commit4666e9b56d1d587f6cc55e6609ddcd7127d46035 (patch)
treeab78b31e2a8b3061e8e66012ae64fc9cab965bee /target/linux/brcm63xx/patches-3.3/311-MIPS-BCM63XX-add-MISC-register-set-definition.patch
parente200a200fa5c3f7cec184fa8694125f824397daa (diff)
[brcm63xx] fix SPI message control handling for BCM6338/6348
BCM6338 and BCM6338 have their MSG_CONTROL register width of 8-bits instead of 16-bits. We were previously using a 16-bits write which corrupted the first byte of the TX FIFO. Also the message type was always set to Full-duplex even in the case of half-duplex messages. git-svn-id: svn://svn.openwrt.org/openwrt/trunk@32409 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/brcm63xx/patches-3.3/311-MIPS-BCM63XX-add-MISC-register-set-definition.patch')
-rw-r--r--target/linux/brcm63xx/patches-3.3/311-MIPS-BCM63XX-add-MISC-register-set-definition.patch2
1 files changed, 1 insertions, 1 deletions
diff --git a/target/linux/brcm63xx/patches-3.3/311-MIPS-BCM63XX-add-MISC-register-set-definition.patch b/target/linux/brcm63xx/patches-3.3/311-MIPS-BCM63XX-add-MISC-register-set-definition.patch
index 83ccf62b9c..8d2d9b9da1 100644
--- a/target/linux/brcm63xx/patches-3.3/311-MIPS-BCM63XX-add-MISC-register-set-definition.patch
+++ b/target/linux/brcm63xx/patches-3.3/311-MIPS-BCM63XX-add-MISC-register-set-definition.patch
@@ -90,7 +90,7 @@ Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
#endif /* ! BCM63XX_IO_H_ */
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -1116,4 +1116,14 @@
+@@ -1123,4 +1123,14 @@
#define TRNG_THRES 0x0c
#define TRNG_MASK 0x10