diff options
| author | hauke <hauke@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2009-06-13 21:20:53 +0000 |
|---|---|---|
| committer | hauke <hauke@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2009-06-13 21:20:53 +0000 |
| commit | 318c9e430b7381f99c0746209a428a3e0008b9fd (patch) | |
| tree | 0276abfb54835688e678419ad60b71745cd78490 /target/linux/brcm47xx/patches-2.6.30/220-bcm5354.patch | |
| parent | 574adb08b8dfa7a703ddb8fd3b3e773fee337733 (diff) | |
[brcm47xx] Port to kernel 2.6.30.
There is an error in the unlzma system in the kernel.
A lzma compressed squashfs filesystem does not work for me.
This should compile and works for me on my Asus WL-500GP, please test it on more systems.
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@16441 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/brcm47xx/patches-2.6.30/220-bcm5354.patch')
| -rw-r--r-- | target/linux/brcm47xx/patches-2.6.30/220-bcm5354.patch | 42 |
1 files changed, 42 insertions, 0 deletions
diff --git a/target/linux/brcm47xx/patches-2.6.30/220-bcm5354.patch b/target/linux/brcm47xx/patches-2.6.30/220-bcm5354.patch new file mode 100644 index 0000000000..6aedfb2e59 --- /dev/null +++ b/target/linux/brcm47xx/patches-2.6.30/220-bcm5354.patch @@ -0,0 +1,42 @@ +--- a/drivers/ssb/driver_chipcommon.c ++++ b/drivers/ssb/driver_chipcommon.c +@@ -258,6 +258,8 @@ void ssb_chipco_resume(struct ssb_chipco + void ssb_chipco_get_clockcpu(struct ssb_chipcommon *cc, + u32 *plltype, u32 *n, u32 *m) + { ++ if ((chipco_read32(cc, SSB_CHIPCO_CHIPID) & SSB_CHIPCO_IDMASK) == 0x5354) ++ return; + *n = chipco_read32(cc, SSB_CHIPCO_CLOCK_N); + *plltype = (cc->capabilities & SSB_CHIPCO_CAP_PLLT); + switch (*plltype) { +@@ -281,6 +283,8 @@ void ssb_chipco_get_clockcpu(struct ssb_ + void ssb_chipco_get_clockcontrol(struct ssb_chipcommon *cc, + u32 *plltype, u32 *n, u32 *m) + { ++ if ((chipco_read32(cc, SSB_CHIPCO_CHIPID) & SSB_CHIPCO_IDMASK) == 0x5354) ++ return; + *n = chipco_read32(cc, SSB_CHIPCO_CLOCK_N); + *plltype = (cc->capabilities & SSB_CHIPCO_CAP_PLLT); + switch (*plltype) { +--- a/drivers/ssb/driver_mipscore.c ++++ b/drivers/ssb/driver_mipscore.c +@@ -161,6 +161,8 @@ u32 ssb_cpu_clock(struct ssb_mipscore *m + + if ((pll_type == SSB_PLLTYPE_5) || (bus->chip_id == 0x5365)) { + rate = 200000000; ++ } else if (bus->chip_id == 0x5354) { ++ rate = 240000000; + } else { + rate = ssb_calc_clock_rate(pll_type, n, m); + } +--- a/drivers/ssb/main.c ++++ b/drivers/ssb/main.c +@@ -1010,6 +1010,8 @@ u32 ssb_clockspeed(struct ssb_bus *bus) + + if (bus->chip_id == 0x5365) { + rate = 100000000; ++ } else if (bus->chip_id == 0x5354) { ++ rate = 120000000; + } else { + rate = ssb_calc_clock_rate(plltype, clkctl_n, clkctl_m); + if (plltype == SSB_PLLTYPE_3) /* 25Mhz, 2 dividers */ |