diff options
| author | hcg <hcg@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2007-07-29 04:26:11 +0000 |
|---|---|---|
| committer | hcg <hcg@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2007-07-29 04:26:11 +0000 |
| commit | 387e6f0185bffceece270085e61f36912551d440 (patch) | |
| tree | 08ac2f44ac0575561568561fce80716fe452c680 /target/linux/at91-2.6/patches-2.6.21/009-fdl-uartinit.patch | |
| parent | 4694b25d8f085c9f564a496237ae2b9354d7554d (diff) | |
Prepare for 2.6.22.1 kernel
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@8212 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/at91-2.6/patches-2.6.21/009-fdl-uartinit.patch')
| -rw-r--r-- | target/linux/at91-2.6/patches-2.6.21/009-fdl-uartinit.patch | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/target/linux/at91-2.6/patches-2.6.21/009-fdl-uartinit.patch b/target/linux/at91-2.6/patches-2.6.21/009-fdl-uartinit.patch new file mode 100644 index 0000000000..f2491f3496 --- /dev/null +++ b/target/linux/at91-2.6/patches-2.6.21/009-fdl-uartinit.patch @@ -0,0 +1,34 @@ +--- linux-2.6.21.1.orig/arch/arm/mach-at91/at91rm9200_devices.c 2007-05-28 12:22:29.000000000 +0200 ++++ linux-2.6.21.1/arch/arm/mach-at91/at91rm9200_devices.c 2007-05-28 16:44:36.000000000 +0200 +@@ -618,7 +618,6 @@ + + + #if defined(CONFIG_NEW_LEDS) +- + static struct platform_device at91_leds = { + .name = "at91_leds", + .id = -1, +@@ -724,6 +723,10 @@ + * We need to drive the pin manually. Default is off (RTS is active low). + */ + at91_set_gpio_output(AT91_PIN_PA21, 1); ++ at91_set_gpio_output(AT91_PIN_PB6, 1); /* DTR0 */ ++ at91_set_gpio_output(AT91_PIN_PB7, 1); /* RI0 */ ++ at91_set_gpio_input(AT91_PIN_PA19, 1); /* DCD0 */ ++ at91_set_deglitch(AT91_PIN_PA19, 1); + } + + static struct resource uart1_resources[] = { +@@ -835,6 +838,12 @@ + { + at91_set_B_periph(AT91_PIN_PA5, 1); /* TXD3 */ + at91_set_B_periph(AT91_PIN_PA6, 0); /* RXD3 */ ++ at91_set_B_periph(AT91_PIN_PB0, 0); /* RTS3 */ ++ at91_set_B_periph(AT91_PIN_PB1, 0); /* CTS3 */ ++ at91_set_gpio_output(AT91_PIN_PB29, 1); /* DTR0 */ ++ at91_set_gpio_output(AT91_PIN_PB2, 1); /* RI0 */ ++ at91_set_gpio_input(AT91_PIN_PA24, 1); /* DCD0 */ ++ at91_set_deglitch(AT91_PIN_PA24, 1); + } + + struct platform_device *at91_uarts[ATMEL_MAX_UART]; /* the UARTs to use */ |