diff options
author | juhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2013-03-04 09:40:44 +0000 |
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committer | juhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2013-03-04 09:40:44 +0000 |
commit | af050ad637452346501799ea906111a41e9e4e12 (patch) | |
tree | 4fb95ac5deffb6f79aca8b56815c804acfb5259b /target/linux/ar71xx/patches-3.8/003-spi-ath79-remove-superfluous-chip-select-code.patch | |
parent | 5c88b794d6bb3926e80b4ad66e1b51d6bb386a98 (diff) |
ar71xx: use backported SPI patches
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@35873 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ar71xx/patches-3.8/003-spi-ath79-remove-superfluous-chip-select-code.patch')
-rw-r--r-- | target/linux/ar71xx/patches-3.8/003-spi-ath79-remove-superfluous-chip-select-code.patch | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/target/linux/ar71xx/patches-3.8/003-spi-ath79-remove-superfluous-chip-select-code.patch b/target/linux/ar71xx/patches-3.8/003-spi-ath79-remove-superfluous-chip-select-code.patch new file mode 100644 index 0000000000..58272bdbf5 --- /dev/null +++ b/target/linux/ar71xx/patches-3.8/003-spi-ath79-remove-superfluous-chip-select-code.patch @@ -0,0 +1,33 @@ +From 622d87da7f99b29dde053881bf42c46de7572ce5 Mon Sep 17 00:00:00 2001 +From: Gabor Juhos <juhosg@openwrt.org> +Date: Thu, 27 Dec 2012 10:42:26 +0100 +Subject: [PATCH] spi/ath79: remove superfluous chip select code + +commit f1e8fc9898fd8ca78b7438d3c2e60028d3ae2a34 upstream. + +The spi_bitbang driver calls the chipselect function +of the driver from spi_bitbang_setup in order to +deselect the given SPI chip, so we don't have to +initialize the CS line here. + +Signed-off-by: Gabor Juhos <juhosg@openwrt.org> +Signed-off-by: Grant Likely <grant.likely@secretlab.ca> +--- + drivers/spi/spi-ath79.c | 6 ------ + 1 file changed, 6 deletions(-) + +--- a/drivers/spi/spi-ath79.c ++++ b/drivers/spi/spi-ath79.c +@@ -128,12 +128,6 @@ static int ath79_spi_setup_cs(struct spi + gpio_free(cdata->gpio); + return status; + } +- } else { +- if (spi->mode & SPI_CS_HIGH) +- sp->ioc_base |= AR71XX_SPI_IOC_CS0; +- else +- sp->ioc_base &= ~AR71XX_SPI_IOC_CS0; +- ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base); + } + + return 0; |