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authorjuhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73>2012-12-29 16:02:31 +0000
committerjuhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73>2012-12-29 16:02:31 +0000
commit4a618c3a136008ff90590bb90e83ccac59dec57e (patch)
treecb91bb95a326cda5f7ce9a4d3e3051176813584e /target/linux/ar71xx/patches-3.7/202-spi-ath79-remove-superfluous-chip-select-code.patch
parentab7d6eb3aab7cde972f756550d0e0afa5b59571c (diff)
ar71xx: add support for 3.7
Signed-off-by: Gabor Juhos <juhosg@openwrt.org> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@34920 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ar71xx/patches-3.7/202-spi-ath79-remove-superfluous-chip-select-code.patch')
-rw-r--r--target/linux/ar71xx/patches-3.7/202-spi-ath79-remove-superfluous-chip-select-code.patch30
1 files changed, 30 insertions, 0 deletions
diff --git a/target/linux/ar71xx/patches-3.7/202-spi-ath79-remove-superfluous-chip-select-code.patch b/target/linux/ar71xx/patches-3.7/202-spi-ath79-remove-superfluous-chip-select-code.patch
new file mode 100644
index 0000000000..eec3293d9e
--- /dev/null
+++ b/target/linux/ar71xx/patches-3.7/202-spi-ath79-remove-superfluous-chip-select-code.patch
@@ -0,0 +1,30 @@
+From 06752f9b169493cd1323f8337c147ad2dd31025c Mon Sep 17 00:00:00 2001
+From: Gabor Juhos <juhosg@openwrt.org>
+Date: Mon, 9 Jan 2012 15:03:28 +0100
+Subject: [PATCH 30/34] spi/ath79: remove superfluous chip select code
+
+The spi_bitbang driver calls the chipselect function
+of the driver from spi_bitbang_setup in order to
+deselect the given SPI chip, so we don't have to
+initialize the CS line here.
+
+Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
+---
+ drivers/spi/spi-ath79.c | 6 ------
+ 1 files changed, 0 insertions(+), 6 deletions(-)
+
+--- a/drivers/spi/spi-ath79.c
++++ b/drivers/spi/spi-ath79.c
+@@ -128,12 +128,6 @@ static int ath79_spi_setup_cs(struct spi
+ gpio_free(cdata->gpio);
+ return status;
+ }
+- } else {
+- if (spi->mode & SPI_CS_HIGH)
+- sp->ioc_base |= AR71XX_SPI_IOC_CS0;
+- else
+- sp->ioc_base &= ~AR71XX_SPI_IOC_CS0;
+- ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base);
+ }
+
+ return 0;