diff options
author | juhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2012-01-22 22:38:19 +0000 |
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committer | juhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73> | 2012-01-22 22:38:19 +0000 |
commit | e0b80e41eb0b24e76285b9355725d2f4f66ada50 (patch) | |
tree | dccbb34ba7bd86e0b13abd8226004f09f5766847 /target/linux/ar71xx/patches-3.2/203-spi-ath79-remove-superfluous-chip-select-code.patch | |
parent | 22b99f32a13348502bc0f33b93b70565e941d99c (diff) |
ar71xx: add initial support for 3.2
Tested on the following boards:
ALFA AP96
TL-MR3220 v1
TL-WR1043ND v1
TL-WR2543ND v1
TL-WR703N v1
TL-WR741ND v1
TL-WR741ND v4
WNDR3700 v1
WZR-HP-G300NH
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@29868 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ar71xx/patches-3.2/203-spi-ath79-remove-superfluous-chip-select-code.patch')
-rw-r--r-- | target/linux/ar71xx/patches-3.2/203-spi-ath79-remove-superfluous-chip-select-code.patch | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/target/linux/ar71xx/patches-3.2/203-spi-ath79-remove-superfluous-chip-select-code.patch b/target/linux/ar71xx/patches-3.2/203-spi-ath79-remove-superfluous-chip-select-code.patch new file mode 100644 index 0000000000..a2391be646 --- /dev/null +++ b/target/linux/ar71xx/patches-3.2/203-spi-ath79-remove-superfluous-chip-select-code.patch @@ -0,0 +1,30 @@ +From 7385ff2cb72d6a0107890760466b9564aa5204c1 Mon Sep 17 00:00:00 2001 +From: Gabor Juhos <juhosg@openwrt.org> +Date: Mon, 9 Jan 2012 15:03:28 +0100 +Subject: [PATCH 3/7] spi/ath79: remove superfluous chip select code + +The spi_bitbang driver calls the chipselect function +of the driver from spi_bitbang_setup in order to +deselect the given SPI chip, so we don't have to +initialize the CS line here. + +Signed-off-by: Gabor Juhos <juhosg@openwrt.org> +--- + drivers/spi/spi-ath79.c | 6 ------ + 1 files changed, 0 insertions(+), 6 deletions(-) + +--- a/drivers/spi/spi-ath79.c ++++ b/drivers/spi/spi-ath79.c +@@ -121,12 +121,6 @@ static int ath79_spi_setup_cs(struct spi + gpio_free(cdata->gpio); + return status; + } +- } else { +- if (spi->mode & SPI_CS_HIGH) +- sp->ioc_base |= AR71XX_SPI_IOC_CS0; +- else +- sp->ioc_base &= ~AR71XX_SPI_IOC_CS0; +- ath79_spi_wr(sp, AR71XX_SPI_REG_IOC, sp->ioc_base); + } + + return 0; |