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authorjuhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73>2010-03-08 12:10:14 +0000
committerjuhosg <juhosg@3c298f89-4303-0410-b956-a3cf2f4a3e73>2010-03-08 12:10:14 +0000
commitfae32e3e8619b61305598fffb5f4dcfc92b81e15 (patch)
treec42f8372d6c6b3047f086042e324fca18398b131 /target/linux/ar71xx/files/arch
parentfc01504bd3d32cdd9f7335a3362a2d7a0b0a9e45 (diff)
ar71xx: add ar71xx_gpio_function_setup
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@20053 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ar71xx/files/arch')
-rw-r--r--target/linux/ar71xx/files/arch/mips/ar71xx/gpio.c21
-rw-r--r--target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h1
2 files changed, 21 insertions, 1 deletions
diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/gpio.c b/target/linux/ar71xx/files/arch/mips/ar71xx/gpio.c
index c1990ad453..25b506cb54 100644
--- a/target/linux/ar71xx/files/arch/mips/ar71xx/gpio.c
+++ b/target/linux/ar71xx/files/arch/mips/ar71xx/gpio.c
@@ -1,7 +1,7 @@
/*
* Atheros AR71xx SoC GPIO API support
*
- * Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
+ * Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
@@ -109,6 +109,8 @@ void ar71xx_gpio_function_enable(u32 mask)
spin_lock_irqsave(&ar71xx_gpio_lock, flags);
ar71xx_gpio_wr(GPIO_REG_FUNC, ar71xx_gpio_rr(GPIO_REG_FUNC) | mask);
+ /* flush write */
+ (void) ar71xx_gpio_rr(GPIO_REG_FUNC);
spin_unlock_irqrestore(&ar71xx_gpio_lock, flags);
}
@@ -120,10 +122,27 @@ void ar71xx_gpio_function_disable(u32 mask)
spin_lock_irqsave(&ar71xx_gpio_lock, flags);
ar71xx_gpio_wr(GPIO_REG_FUNC, ar71xx_gpio_rr(GPIO_REG_FUNC) & ~mask);
+ /* flush write */
+ (void) ar71xx_gpio_rr(GPIO_REG_FUNC);
spin_unlock_irqrestore(&ar71xx_gpio_lock, flags);
}
+void ar71xx_gpio_function_setup(u32 set, u32 clear)
+{
+ unsigned long flags;
+
+ spin_lock_irqsave(&ar71xx_gpio_lock, flags);
+
+ ar71xx_gpio_wr(GPIO_REG_FUNC,
+ (ar71xx_gpio_rr(GPIO_REG_FUNC) & ~clear) | set);
+ /* flush write */
+ (void) ar71xx_gpio_rr(GPIO_REG_FUNC);
+
+ spin_unlock_irqrestore(&ar71xx_gpio_lock, flags);
+}
+EXPORT_SYMBOL(ar71xx_gpio_function_setup);
+
void __init ar71xx_gpio_init(void)
{
int err;
diff --git a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h
index 00e7cbc4b7..e9e68f16df 100644
--- a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h
+++ b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h
@@ -269,6 +269,7 @@ static inline u32 ar71xx_gpio_rr(unsigned reg)
void ar71xx_gpio_init(void) __init;
void ar71xx_gpio_function_enable(u32 mask);
void ar71xx_gpio_function_disable(u32 mask);
+void ar71xx_gpio_function_setup(u32 set, u32 clear);
/*
* DDR_CTRL block