summaryrefslogtreecommitdiff
path: root/target/linux/ar7/files/arch/mips
diff options
context:
space:
mode:
authorejka <ejka@3c298f89-4303-0410-b956-a3cf2f4a3e73>2007-09-11 13:18:51 +0000
committerejka <ejka@3c298f89-4303-0410-b956-a3cf2f4a3e73>2007-09-11 13:18:51 +0000
commit6e3ad40d8a2103761a81dd4cf89f5d7e667c8203 (patch)
tree1c55abebcb1ac857b55c5cd69c7d6b4cfa355226 /target/linux/ar7/files/arch/mips
parent2850c282296601b664f551127191ef1a3e9e6292 (diff)
Style cleanup
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@8744 3c298f89-4303-0410-b956-a3cf2f4a3e73
Diffstat (limited to 'target/linux/ar7/files/arch/mips')
-rw-r--r--target/linux/ar7/files/arch/mips/ar7/setup.c35
1 files changed, 10 insertions, 25 deletions
diff --git a/target/linux/ar7/files/arch/mips/ar7/setup.c b/target/linux/ar7/files/arch/mips/ar7/setup.c
index b3bd56e2ec..8ac7577771 100644
--- a/target/linux/ar7/files/arch/mips/ar7/setup.c
+++ b/target/linux/ar7/files/arch/mips/ar7/setup.c
@@ -1,8 +1,8 @@
/*
* $Id$
- *
+ *
* Copyright (C) 2006, 2007 OpenWrt.org
- *
+ *
* Carsten Langgaard, carstenl@mips.com
* Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved.
*
@@ -20,26 +20,12 @@
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
*/
#include <linux/init.h>
-#include <linux/sched.h>
#include <linux/ioport.h>
-#include <linux/pci.h>
-#include <linux/tty.h>
#include <linux/pm.h>
-#include <linux/serial_8250.h>
-#include <linux/serial_core.h>
-#include <linux/serial.h>
-#include <linux/serial_reg.h>
-
-#include <asm/cpu.h>
-#include <asm/irq.h>
-#include <asm/mips-boards/generic.h>
+
#include <asm/mips-boards/prom.h>
-#include <asm/dma.h>
-#include <asm/time.h>
-#include <asm/traps.h>
-#include <asm/io.h>
#include <asm/reboot.h>
-#include <asm/gdb-stub.h>
+#include <asm/time.h>
#include <asm/ar7/ar7.h>
extern void ar7_time_init(void);
@@ -49,9 +35,9 @@ static void ar7_machine_power_off(void);
static void ar7_machine_restart(char *command)
{
- volatile u32 *softres_reg = (u32 *)ioremap(AR7_REGS_RESET +
- AR7_RESET_SOFTWARE, 1);
- *softres_reg = 1;
+ u32 *softres_reg = (u32 *)ioremap(AR7_REGS_RESET +
+ AR7_RESET_SOFTWARE, 1);
+ writel(1, softres_reg);
}
static void ar7_machine_halt(void)
@@ -61,9 +47,9 @@ static void ar7_machine_halt(void)
static void ar7_machine_power_off(void)
{
- volatile u32 *power_reg = (u32 *)ioremap(AR7_REGS_POWER, 1);
- u32 power_state = *power_reg | (3 << 30);
- *power_reg = power_state;
+ u32 *power_reg = (u32 *)ioremap(AR7_REGS_POWER, 1);
+ u32 power_state = readl(power_reg) | (3 << 30);
+ writel(power_state, power_reg);
ar7_machine_halt();
}
@@ -109,7 +95,6 @@ void __init plat_mem_setup(void)
set_io_port_base(io_base);
prom_meminit();
-#warning FIXME: clock initialisation
ar7_init_clocks();
ioport_resource.start = 0;