Add ar7-2.6 port (marked as broken for now).

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@6600 3c298f89-4303-0410-b956-a3cf2f4a3e73

5 files changed, 423 insertions, 0 deletions

diff --git a/target/linux/ar7-2.6/files/include/asm-mips/ar7/ar7.h b/target/linux/ar7-2.6/files/include/asm-mips/ar7/ar7.h
new file mode 100644
index 0000000000..fe51a8d67b
--- /dev/null
+++ b/target/linux/ar7-2.6/files/include/asm-mips/ar7/ar7.h
@@ -0,0 +1,153 @@
+/*
+ * $Id$
+ * 
+ * Copyright (C) 2006, 2007 OpenWrt.org
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#ifndef __AR7_H__
+#define __AR7_H__
+
+#include <asm/addrspace.h>
+#include <linux/delay.h>
+
+#define AR7_REGS_BASE 0x08610000
+
+#define AR7_REGS_MAC0   (AR7_REGS_BASE + 0x0000)
+#define AR7_REGS_EMIF   (AR7_REGS_BASE + 0x0800)
+#define AR7_REGS_GPIO   (AR7_REGS_BASE + 0x0900)
+#define AR7_REGS_POWER  (AR7_REGS_BASE + 0x0a00)
+#define AR7_REGS_WDT    (AR7_REGS_BASE + 0x0b00)
+#define AR7_REGS_UART0  (AR7_REGS_BASE + 0x0e00)
+#define AR7_REGS_UART1  (AR7_REGS_BASE + 0x0f00)
+#define AR7_REGS_RESET  (AR7_REGS_BASE + 0x1600)
+#define AR7_REGS_VLYNQ0 (AR7_REGS_BASE + 0x1800)
+#define AR7_REGS_VLYNQ1 (AR7_REGS_BASE + 0x1C00)
+#define AR7_REGS_MDIO   (AR7_REGS_BASE + 0x1E00)
+#define AR7_REGS_IRQ    (AR7_REGS_BASE + 0x2400)
+#define AR7_REGS_MAC1   (AR7_REGS_BASE + 0x2800)
+
+#define  AR7_RESET_PEREPHERIAL 0x0
+#define  AR7_RESET_SOFTWARE    0x4
+#define  AR7_RESET_STATUS      0x8
+
+#define AR7_RESET_BIT_MDIO   22
+
+/* GPIO control registers */
+#define  AR7_GPIO_INPUT  0x0
+#define  AR7_GPIO_OUTPUT 0x4
+#define  AR7_GPIO_DIR    0x8
+#define  AR7_GPIO_ENABLE 0xC
+
+#define AR7_GPIO_BIT_STATUS_LED   8
+
+
+/* Interrupts */
+#define AR7_IRQ_UART0  15
+#define AR7_IRQ_UART1  16
+
+struct plat_cpmac_data {
+	int reset_bit;
+	int power_bit;
+	u32 phy_mask;
+	char dev_addr[6];
+};
+
+extern char *prom_getenv(char *envname);
+
+/* A bunch of small bit-toggling functions */
+static inline u32 get_chip_id(void)
+{
+	return *((u16 *)KSEG1ADDR(AR7_REGS_GPIO + 0x14));
+}
+
+static inline int ar7_cpu_freq(void)
+{
+	u16 chip_id = get_chip_id();
+	switch (chip_id) {
+	case 0x5:
+		return 150000000;
+	case 0x18:
+	case 0x2b:
+		return 211968000;
+	default:
+		return 150000000;
+	}
+}
+
+static inline int ar7_bus_freq(void)
+{
+	u16 chip_id = get_chip_id();
+	switch (chip_id) {
+	case 0x5:
+		return 125000000;
+	case 0x18:
+	case 0x2b:
+		return 105984000;
+	default:
+		return 125000000;
+	}
+}
+#define ar7_cpmac_freq ar7_bus_freq
+
+static inline int ar7_has_high_cpmac(void)
+{
+	u16 chip_id = get_chip_id();
+	switch (chip_id) {
+	case 0x18:
+	case 0x2b:
+		return 0;
+	default:
+		return 1;
+	}
+}
+#define ar7_has_high_vlynq ar7_has_high_cpmac
+
+static inline void ar7_device_enable(u32 bit)
+{
+	volatile u32 *reset_reg = (u32 *)KSEG1ADDR(AR7_REGS_RESET + AR7_RESET_PEREPHERIAL);
+	*reset_reg |= (1 << bit);	
+	mdelay(20);
+}
+
+static inline void ar7_device_disable(u32 bit)
+{
+	volatile u32 *reset_reg = (u32 *)KSEG1ADDR(AR7_REGS_RESET + AR7_RESET_PEREPHERIAL);
+	*reset_reg &= ~(1 << bit);
+	mdelay(20);
+}
+
+static inline void ar7_device_reset(u32 bit)
+{
+	ar7_device_disable(bit);
+	ar7_device_enable(bit);
+}
+
+static inline void ar7_device_on(u32 bit)
+{
+	volatile u32 *power_reg = (u32 *)KSEG1ADDR(AR7_REGS_POWER);
+	*power_reg |= (1 << bit);
+	mdelay(20);
+}
+
+static inline void ar7_device_off(u32 bit)
+{
+	volatile u32 *power_reg = (u32 *)KSEG1ADDR(AR7_REGS_POWER);
+	*power_reg &= ~(1 << bit);
+	mdelay(20);
+}
+
+#endif
diff --git a/target/linux/ar7-2.6/files/include/asm-mips/ar7/gpio.h b/target/linux/ar7-2.6/files/include/asm-mips/ar7/gpio.h
new file mode 100644
index 0000000000..73673feff6
--- /dev/null
+++ b/target/linux/ar7-2.6/files/include/asm-mips/ar7/gpio.h
@@ -0,0 +1,116 @@
+/*
+ * $Id$
+ * 
+ * Copyright (C) 2007 OpenWrt.org
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#ifndef __AR7_GPIO_H__
+#define __AR7_GPIO_H__
+#include <asm/ar7/ar7.h>
+
+#define AR7_GPIO_MAX 32
+
+extern int gpio_request(unsigned gpio, char *label);
+extern void gpio_free(unsigned gpio);
+
+/* Common GPIO layer */
+static inline int gpio_direction_input(unsigned gpio)
+{
+	void __iomem *gpio_dir = (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_DIR);
+
+	if (gpio >= AR7_GPIO_MAX)
+		return -EINVAL;
+
+	__raw_writel(__raw_readl(gpio_dir) | (1 << gpio), gpio_dir);
+
+	return 0;
+}
+
+static inline int gpio_direction_output(unsigned gpio)
+{
+	void __iomem *gpio_dir = (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_DIR);
+
+	if (gpio >= AR7_GPIO_MAX)
+		return -EINVAL;
+
+	__raw_writel(__raw_readl(gpio_dir) & ~(1 << gpio), gpio_dir);
+
+	return 0;
+}
+
+static inline int gpio_get_value(unsigned gpio)
+{
+	void __iomem *gpio_in = (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_INPUT);
+
+	if (gpio >= AR7_GPIO_MAX)
+		return -EINVAL;
+
+	return ((__raw_readl(gpio_in) & (1 << gpio)) != 0);
+}
+
+static inline void gpio_set_value(unsigned gpio, int value)
+{
+	void __iomem *gpio_out = (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_OUTPUT);
+	volatile unsigned tmp;
+
+	if (gpio >= AR7_GPIO_MAX)
+		return;
+
+	tmp = __raw_readl(gpio_out) & ~(1 << gpio);
+	if (value) 
+		tmp |= 1 << gpio;
+	__raw_writel(tmp, gpio_out);
+}
+
+static inline int gpio_to_irq(unsigned gpio)
+{
+	return -EINVAL;
+}
+
+static inline int irq_to_gpio(unsigned irq)
+{
+	return -EINVAL;
+}
+
+/* Board specific GPIO functions */
+static inline int ar7_gpio_enable(unsigned gpio)
+{
+	void __iomem *gpio_en =	(void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_ENABLE);
+
+	if (gpio >= AR7_GPIO_MAX)
+		return -EINVAL;
+
+	__raw_writel(__raw_readl(gpio_en) | (1 << gpio), gpio_en);
+
+	return 0;
+}
+
+static inline int ar7_gpio_disable(unsigned gpio)
+{
+	void __iomem *gpio_en =	(void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_ENABLE);
+
+	if (gpio >= AR7_GPIO_MAX)
+		return -EINVAL;
+
+	__raw_writel(__raw_readl(gpio_en) & ~(1 << gpio), gpio_en);
+
+	return 0;
+}
+
+#include <asm-generic/gpio.h>
+
+#endif
diff --git a/target/linux/ar7-2.6/files/include/asm-mips/ar7/mmzone.h b/target/linux/ar7-2.6/files/include/asm-mips/ar7/mmzone.h
new file mode 100644
index 0000000000..885fdb0cb0
--- /dev/null
+++ b/target/linux/ar7-2.6/files/include/asm-mips/ar7/mmzone.h
@@ -0,0 +1,29 @@
+/*
+ * $Id$
+ * 
+ * Copyright (C) 2007 OpenWrt.org
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+#ifndef _ASM_MACH_MMZONE_H
+#define _ASM_MACH_MMZONE_H
+
+extern pg_data_t __node_data[];
+#define NODE_DATA(nid)          (&__node_data[nid])
+#define NODE_MEM_MAP(nid)       (NODE_DATA(nid)->node_mem_map)
+#define pa_to_nid(addr) (((addr) >= ARCH_PFN_OFFSET << PAGE_SHIFT) ? 0 : -1)
+
+#endif /* _ASM_MACH_MMZONE_H */
diff --git a/target/linux/ar7-2.6/files/include/asm-mips/ar7/spaces.h b/target/linux/ar7-2.6/files/include/asm-mips/ar7/spaces.h
new file mode 100644
index 0000000000..367fe2d344
--- /dev/null
+++ b/target/linux/ar7-2.6/files/include/asm-mips/ar7/spaces.h
@@ -0,0 +1,33 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 1994 - 1999, 2000, 03, 04 Ralf Baechle
+ * Copyright (C) 2000, 2002  Maciej W. Rozycki
+ * Copyright (C) 1990, 1999, 2000 Silicon Graphics, Inc.
+ */
+#ifndef _ASM_AR7_SPACES_H
+#define _ASM_AR7_SPACES_H
+
+
+#define CAC_BASE		0x80000000
+#define IO_BASE			0xa0000000
+#define UNCAC_BASE		0xa0000000
+#define MAP_BASE		0xc0000000
+
+/*
+ * This handles the memory map.
+ * We handle pages at KSEG0 for kernels with 32 bit address space.
+ */
+#define PAGE_OFFSET		0x80000000UL
+#define ARCH_PFN_OFFSET	(0x14000000 >> PAGE_SHIFT)
+
+/*
+ * Memory above this physical address will be considered highmem.
+ */
+#ifndef HIGHMEM_START
+#define HIGHMEM_START		0x40000000UL
+#endif
+
+#endif /* __ASM_AR7_SPACES_H */
diff --git a/target/linux/ar7-2.6/files/include/asm-mips/ar7/vlynq.h b/target/linux/ar7-2.6/files/include/asm-mips/ar7/vlynq.h
new file mode 100644
index 0000000000..63894159ef
--- /dev/null
+++ b/target/linux/ar7-2.6/files/include/asm-mips/ar7/vlynq.h
@@ -0,0 +1,92 @@
+/*
+ * $Id$
+ * 
+ * Copyright (C) 2006, 2007 OpenWrt.org
+ * 
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ * 
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ * 
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
+ */
+
+
+#ifndef __VLYNQ_H__
+#define __VLYNQ_H__
+
+struct vlynq_mapping {
+	u32 size;
+	u32 offset;
+} __attribute__ ((packed));
+
+struct vlynq_device_id {
+	u32 id;
+};
+
+struct vlynq_regs;
+struct vlynq_device {
+	u32 id;
+	int irq;
+	int local_irq;
+	int remote_irq;
+	int clock_div;
+	u32 regs_start, regs_end;
+	u32 mem_start, mem_end;
+	u32 irq_start, irq_end;
+	void *priv;
+	struct vlynq_regs *local;
+	struct vlynq_regs *remote;
+	struct device dev;
+};
+
+struct vlynq_driver {
+	char *name;
+	int (*probe)(struct vlynq_device *dev);
+	int (*remove)(struct vlynq_device *dev);
+	struct device_driver driver;
+};
+
+#define to_vlynq_driver(drv) container_of(drv, struct vlynq_driver, driver)
+
+struct plat_vlynq_ops {
+	int (*on)(struct vlynq_device *dev);
+	void (*off)(struct vlynq_device *dev);
+};
+
+#define to_vlynq_device(device) container_of(device, struct vlynq_device, dev)
+
+extern struct bus_type vlynq_bus_type;
+
+extern int __vlynq_register_driver(struct vlynq_driver *driver, 
+				   struct module *owner);
+
+static inline int vlynq_register_driver(struct vlynq_driver *driver)
+{
+	return __vlynq_register_driver(driver, THIS_MODULE);
+}
+
+extern void vlynq_unregister_driver(struct vlynq_driver *driver);
+extern int vlynq_device_enable(struct vlynq_device *dev);
+extern void vlynq_device_disable(struct vlynq_device *dev);
+extern u32 vlynq_local_id(struct vlynq_device *dev);
+extern u32 vlynq_remote_id(struct vlynq_device *dev);
+extern void vlynq_set_local_mapping(struct vlynq_device *dev,
+				    u32 tx_offset,
+				    struct vlynq_mapping *mapping);
+extern void vlynq_set_remote_mapping(struct vlynq_device *dev, 
+				     u32 tx_offset, 
+				     struct vlynq_mapping *mapping);
+extern int vlynq_virq_to_irq(struct vlynq_device *dev, int virq);
+extern int vlynq_irq_to_virq(struct vlynq_device *dev, int irq);
+extern int vlynq_set_local_irq(struct vlynq_device *dev, int virq);
+extern int vlynq_set_remote_irq(struct vlynq_device *dev, int virq);
+
+#endif